JPH0433397B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention includes a light-emitting element and a light-receiving element, and emits pulsed light that is pulse-modulated from the light-emitting element, and reflects or transmits the object. The present invention relates to a light modulation type detection device such as a photoelectric switch or a photointerrupter that detects the presence or absence of an object by detecting the presence or absence of pulsed light incident on a light receiving element.

[Prior art]

A conventional optical modulation type detection device receives pulsed light projected from a light emitting element by being pulse driven by a pulse drive signal using a light receiving element, and samples the received pulsed light in synchronization with the pulse drive signal. It is common to sample pulses, input them to an integrating circuit, and output the resulting integrated output by switching it at a constant level using a Schmitt circuit. This type of optical modulation type detection device has the configuration shown in FIG. 5, and its operation is as follows.

By receiving the pulse signal generated from the oscillation circuit 22, the light emitting element drive circuit 23 outputs the sixth signal.
The light emission signal shown in Figure s is output. By receiving this light emission signal, the light emitting element 24 is pulse-driven and projects pulse-modulated light. This light is reflected by an object 32 passing between the light emitting element 24 and the light receiving element 25, or is transmitted through the object 32 and enters the light receiving element 25. Therefore, the light receiving element 25
The pulsed light incident on the object 32 shown in t in the same figure
It will be turned on and off by the passage of. By the way, in addition to the pulsed light from the light emitting element 24, the light receiving element 25 may receive, for example, disturbance light shown in FIG. As a result, these signals
It is amplified by the AC amplifier 26, and a received light signal shown in v in the figure appears on the output side thereof. This light reception signal is waveform-shaped by the determination circuit 27 to provide the determination output shown in w in the same figure, and then passed through the synchronization detection circuit 28 to be output from the synchronization detection circuit shown in x in the same figure. This output is integrated by the integrating circuit 29 to produce the integrated output shown in y in the figure, and further waveform-shaped again in the determination circuit 30, and through the output circuit 31, the output shown in z in the figure is obtained. Then, with this output, object 3
The presence or absence of 2 is determined.

However, in the above configuration, the integration circuit 29 with a long time constant is required in order to prevent malfunctions due to disturbance light, which slows down the response speed of the circuit. In addition, since the integration in the integrating circuit 29 is performed using the charging and discharging of a capacitor, there is a large variation in operating time due to variations in the elements.Furthermore, a large capacity capacitor is required, so it is difficult to use an IC, etc. This had become an obstacle to miniaturization.

Therefore, as a device capable of detecting the presence or absence of an object without using an integrating circuit with a long time constant as described above, a device disclosed in Japanese Utility Model Publication No. 56-42632 or Japanese Patent Application Laid-Open No.
The one disclosed in Publication No. 59-99386 was proposed earlier.

The former emits pulsed light from the light emitter based on periodic pulses, counts based on the light reception signal obtained from the light receiver due to the presence of an object, and detects the object when the count value reaches a predetermined value. It detects the presence of If a light receiving signal is generated from the light receiving section at a timing other than the synchronization pulse timing, the counter is reset to prevent false detection.

On the other hand, the latter calculates the AND of the outputs of each flip-flop that reads the received light signal at the timing of the rise and fall of the synchronization pulse, and determines whether the duration of the predetermined level of the obtained signal is longer than a predetermined time. The presence or absence of an object is detected by determining whether the object is present or not.

[Problem to be solved by the invention]

However, in both of the above configurations, an object can be detected only when a predetermined number of pulsed lights are continuously incident on the light receiving section due to the presence of the object and without any disturbance light. Therefore, there is a problem in that if disturbance light enters the light receiving section even temporarily when an object is present, the presence of the object may not be detected.

[Means to solve the problem]

In order to solve the above problems, the light modulation type detection device of the present invention makes pulsed light projected from a light emitting element synchronized with a pulse signal enter a light receiving element, and emits light by the light receiving signal obtained from the light receiving element. In a light modulation type detection device that detects an object intervening in an optical path between an element and a light receiving element, detecting the presence or absence of light reception by the light receiving element at the timing when the light emitting element emits light and when the light emitting element does not emit light, A light reception detection holding means holds the detection result, a counter that counts clock pulses at a predetermined period and can hold the count value, and an output signal alternates between high level and low level each time the count value of this counter reaches a set value. The output of the above-mentioned light reception detection holding means, the clock pulse and the output of the output reversing means are input to the output inversion means which inverts and outputs the output. When it is detected that the light receiving state changes from non-receiving to receiving light, or from receiving light to non-receiving, inputs a clock pulse to the counter to control the counter to perform counting;
When the output of the output inverting means is inverted, the counter is reset and the input of clock pulses to the counter is controlled to be cut off, and the light reception detection and holding means is used to control the clock pulse input to the light receiving element at the timing when the light emitting element is not emitting light. The present invention is characterized in that it includes state detection means for controlling the counter to hold the count value by cutting off the input of the clock pulse to the counter when light reception is detected.

[Effect]

According to the above configuration, when the light reception detection and holding means detects light reception at the light receiving element at a timing when the light emitting element is not emitting light, the state detection means cuts off the input of the clock pulse to the counter and outputs the clock pulse to the counter. The count value is controlled to be held. Therefore, if disturbance light temporarily enters the light-receiving element while an object is present, the count value of the counter at that time is retained, and when the disturbance light ceases, the count value continues to be retained. Counting resumes from the value. With such an operation, an object can be detected accurately and quickly even when disturbance light is temporarily incident.

〔Example〕

An embodiment of the present invention will be described below based on FIGS. 1 to 4.

As shown in FIG. 1, the light modulation type detection device according to the present invention includes an oscillation circuit 1 that generates a pulse signal, a light emitting element drive circuit 2 that drives a light emitting element 3 in response to the pulse signal, and a light emitting element drive circuit 2 that projects a pulsed light. A light emitting element 3 that receives the pulsed light and converts it photoelectrically, an AC amplifier 5 that amplifies the output of the light receiving element 4 and generates a received light signal, a determination circuit 6 that shapes the waveform of the output of the AC amplifier 5, and a received light signal. That is, it is comprised of a signal processing circuit 7 and an output circuit 8 that sample the judgment output and output a detection signal.

The signal processing circuit 7 described above has two detection points A and B which are synchronized with the pulse signal of the oscillation circuit 1 and have different timings, and its configuration is as shown in FIG. That is, the above detection point A,
two flip-flops 9 as light reception detection and holding means for respectively capturing and holding data in B;
10, two flip-flops 11, 12 forming a quaternary counter 20, this counter 20
The AND gate 13 to which the Q terminal outputs of the flip-flops 11 and 12 are input is used to detect when the count value of has reached a constant value, that is, "3" in this configuration. A flip-flop 14 that holds the flip-flop for a certain period of time, a flip-flop 15 that inverts the output based on the output of the flip-flop 14, the Q of this flip-flop 15, the terminal output and the flip-flop 1
an AND-OR gate 16 to which the Q of 0 and the terminal output are input; an AND gate 17 to which the terminal output of the flip-flop 9 and the clock pulse are input;
It consists of an AND gate 18 to which the AND gate 17 output and the AND-OR gate 16 output are input, and the AND gate 18 output is input to the flip-flop 11. And above
AND-OR gate 16 and AND gate 17,1
8 constitutes a state detection circuit 19 as state detection means. The AND gate 13 and flip-flops 14 and 15 constitute an output inverting means. The flip-flops 9 and 10 are R-S flip-flops with input gates, and when the timing signals A and B at the detection points A and B are at high level, the light reception signal, that is, the judgment output, is output from the S of the flip-flops 9 and 10, respectively. The signals are input to the terminals and each is set. It is configured to be reset by reset signals C and D input after a predetermined period.

In the above configuration, the light emission signal shown in FIG. 3a is obtained from the light emitting element driving circuit 2 in response to the pulse signal of the oscillation circuit 1, and in response to this, pulsed light is projected from the light emitting element 3. Light emitting element 3 and light receiving element 4
Due to the passage of the object 21 shown in b in the figure and the disturbance light shown in c in the figure, the light reception signal shown in d in the figure is output from the AC amplifier 5 through the light receiving element 4, the AC amplifier 5, and the determination circuit 6. Further, from the determination circuit 6, determination outputs shown in the figure e are obtained. This judgment output is input to the signal processing circuit 7 at the next stage.
This signal processing circuit 7 detects the presence or absence of disturbance light at the detection point A when the light emitting element 3 is not emitting light, and ignores the light reception signal at the detection point B when emitting light if there is disturbance light. Then, only when there is no disturbance light, the light reception signal at the detection point B at the time of light emission is detected, and the detection signal, that is, the output of the signal processing circuit shown in FIG. This signal is input to the output circuit 8 at the final stage, and becomes the output shown in g in the figure.
This output reveals the existence of the object 21.

Next, the operation of the signal processing circuit 7 will be described below. Note that the signals of each part in the signal processing circuit 7 shown in FIG. 2 are as shown in h to q of FIG. 4. When the light reception signal is at a low level at the sampling timing at the detection point A during non-emission, that is, at the non-emission timing A, that is, when there is no disturbance light, the flip-flop 9 is in a reset state, and the terminal output is always at a high level. . Therefore, the clock pulse shown in h in the figure that is input to the AND gate 17 is
7 and is input to AND gate 18.

On the other hand, at the sampling timing at the detection point B during light emission, that is, at the light emission timing B, assuming that the present device is of a reflective type, when there is no object 21, the light reception signal is at a low level and the flip-flop 10 is in a reset state. Therefore, the Q terminal output is held at low level and the terminal output is held at high level. At this time, assuming that the Q terminal output of flip-flop 15 is low level and the terminal output is high level, AND-OR
The output of the gate 16 becomes high level, and the above clock pulse passes through the AND gate 18 and becomes the Cl (clock) of the flip-flop that constitutes the counter 20.
input to the terminal. This adds 1 to the count value. When starting up this device, that is, counter 20
When the Q terminal outputs of flip-flops 11 and 12 are both at low level, the count value is "0". When the count value reaches "3" by counting the clock pulse three times, the Q terminal outputs of flip-flops 11 and 12 both become high level. Therefore, the output of AND gate 13 becomes high level, flip-flop 14 is set, and its Q terminal output becomes high level. As a result, flip-flop 15
The output is inverted, and at the same time the Q terminal output becomes high level and the terminal output becomes low level, counter 2
0, that is, flip-flops 11 and 12 are reset. Since the Q terminal output of the flip-flop 15 becomes high level and the terminal output becomes low level, the AND-OR gate 16 output becomes low level, and the AND gate 18 is turned off. Therefore, the input of the clock pulse to the counter 20 is blocked, and the count value of the counter 20 becomes "0".
will be retained as is.

Here, when the object 21 passes between the light emitting element 3 and the light receiving element 4, the pulsed light from the light emitting element 3 is reflected by the object 21 and enters the light receiving element 4.
As a result, at light emission timing B, the light reception signal becomes high level, the flip-flop 10 is set, the Q terminal output becomes high level, and the terminal output becomes low level. Also, flip-flop 1
Since the Q terminal output of 5 is at high level and the terminal output is at low level, AND-OR gate 16
The output becomes high level and the clock pulse
The signal is again input to the counter 20 through the AND gate 18. The counter 20 continues counting clock pulses until the count value reaches "3". When the count value reaches "3", flip-flop 1 is activated as in the above case.
5 is inverted, its Q terminal output becomes low level, and at the same time, the counter 20 is reset. Then, the output of the AND-OR gate 16 also becomes low level, and the AND gate 18 is turned off, so that the input of the clock pulse to the counter 20 is blocked, and the count value of the counter 20 remains at "0".

On the other hand, when disturbance light is incident on the light receiving element 4 in the absence of the object 21, the following operation is performed. Before the disturbance light enters, both flip-flops 9 and 10 have their Q terminal outputs at low level and terminal outputs at high level, and flip-flop 15 has their Q terminal output at low level.
It is assumed that the terminal output is high level, the output is low level, the AND-OR gate 16 output is low level, the clock pulse is blocked by AND gate 18, and the counter 20 has a count value of "0". . When disturbance light is incident here, the light reception signal becomes high level at non-emission timing A, and the flip-flop 9 is set. Therefore, the terminal output becomes low level and the clock pulse is blocked by AND gate 17. Therefore, at light emission timing B, the light reception signal becomes high level, the flip-flop 10 is set, the output of the AND-OR gate 16 becomes high level, and even if the AND gate 18 is turned on, the clock pulse is not input to the counter 20.
This signal will be ignored. As a result, the output of the flip-flop 15, that is, the output of the signal processing circuit 7 is
The signal processing circuit output has the waveform shown in q of the same figure. This signal is input to the output circuit 8 shown in FIG. 3, from which an output shown in g, which is not affected by disturbance light, is obtained.

By the way, as mentioned above, the non-emission timing A
When disturbance light occurs in the counter 20, the input of the clock pulse to the counter 20 is cut off, so that the counter 20 is held in the current state. That is, the count value of the counter 20 is held at the current count value. This behavior causes
If disturbance light temporarily enters the light-receiving element 4 while the object 21 is present, the count value of the counter 20 at that time is held, and when the disturbance light ceases, the count value that is continuously held is retained. Counting resumes from the value. Therefore, even if disturbance light is temporarily generated while the object 21 is present, the object 21 can be detected accurately and quickly.

〔Effect of the invention〕

As described above, the light modulation type detection device of the present invention has the following features:
A light reception detection holding means detects the presence or absence of light reception by the light receiving element at the timing of when the light emitting element emits light and when it does not emit light, and holds the detection result, and the clock pulse of a predetermined period is counted and the count value is a counter capable of holding a signal, an output inverting means that alternately inverts and outputs an output signal to a high level and a low level each time the count value of this counter reaches a set value, and an output of the above-mentioned light reception detection holding means, a clock pulse and With the output of the output reversing means as input, the light reception detection and holding means detects whether the light reception state of the light reception element changes from non-reception to light reception, or from light reception to non-reception at the timing when the light emitting element emits light. When detected, a clock pulse is input to the counter to control the counter to count, and when the output of the output inverting means is inverted, the counter is reset and the input of the clock pulse to the counter is cut off. When the light-receiving detection and holding means detects light reception at the light-receiving element at a timing when the light-emitting element is not emitting light, the input of the clock pulse to the counter is cut off and the count value is held by the counter. This configuration includes a state detecting means for controlling.

As a result, when ambient light temporarily enters the light receiving element while an object is present, the count value of the counter at that time is retained, and when the ambient light ceases, the counted value continues to be retained. Counting can be restarted from Therefore, even if disturbance light occurs temporarily, objects can be detected accurately and quickly.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention;
Figure 2 is a circuit diagram of the signal processing circuit shown in Figure 1;
FIG. 3 is a timing chart showing the signals of each part shown in FIG. 1, FIG. 4 is a timing chart showing the signals of each part shown in FIG. 2, FIG. 5 is a block diagram showing the conventional example, and FIG. is a timing chart showing signals of each part shown in FIG. 1 is an oscillation circuit, 3 is a light emitting element, 4 is a light receiving element,
7 is a signal processing circuit; 9 and 10 are flip-flops (light reception detection and holding means); 11 and 12 are flip-flops; 13 is an AND gate (output inversion means);
4 and 15 are flip-flops (output inversion means);
17 and 18 are AND gates, 16 is an AND-OR gate, 19 is a state detection circuit (state detection means), 2
0 is a counter.

Claims (1)

[Claims] 1. Pulsed light projected from a light emitting element in synchronization with a pulse signal is incident on a light receiving element, and the light reception signal obtained from the light receiving element causes an object intervening in the optical path between the light emitting element and the light receiving element to be detected. In the light modulation type detection device for detecting, a light reception detection holding means detects the presence or absence of light reception by the light receiving element at the timing when the light emitting element emits light and the time when the light emitting element does not emit light, and holds the detection result; a counter capable of counting clock pulses of a predetermined period and holding a count value; and an output inverting means for alternately inverting and outputting an output signal to a high level and a low level each time the count value of the counter reaches a set value; The output of the light reception detection holding means, the clock pulse and the output of the output inversion means are input, and the light reception state of the light receiving element changes from non-light receiving to light receiving by the light receiving detection holding means at the timing when the light emitting element emits light; Or, when a state in which light reception changes to non-light reception is detected, a clock pulse is input to the counter to control the counter to count, and when the output of the output inversion means is inverted, the counter is reset,
The clock pulse input to the counter is controlled to be cut off, and when light reception at the light receiving element is detected by the light reception detection holding means at a timing when the light emitting element is not emitting light, the clock pulse input to the counter is cut off. 1. A light modulation type detection device comprising: a state detection means for controlling the counter so that the count value is held by the counter.