JPH0433387A - Semiconductor laser and manufacture thereof - Google Patents

Abstract

PURPOSE:To narrow the width of an active layer under satisfactory controllability, and to suppress a decrease in the yield due to step cut in the case of a buried epitaxial layer, a buried leakage, etc., due to narrowing by forming the outside of a double channel in a forward mesa and an inside, i.e., a mesa stripe to become a light emitting unit vertically or in a reverse mesa shape. CONSTITUTION:A mesa stripe 9 including an active layer 3 and double channels 100 at both sides of the stripe are formed by etching to a part underneath the layer 3 with mixture solution of HCI:H2O2:CH3COOH. Here, an SiN film 21 to become a mask is deposited directly on a P-type InP clad 4 at the stripe 9 disposed at the center of the channel 100, while an SiN film mask 21 exists on a P-type InGaAsP cap layer 20 outside the double channel. Here, the close contact of an InP/SiN with etchant of (chloric acid + hydrogen peroxide) is excellent, side etching is small, and the stripe 9 at the center becomes a reverse mesa shape, but since a region formed through the region 20 has a higher etching speed of InGaAsP than that of InP, the side surface outside the channel becomes a forward taper.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to long-wavelength band high-output semiconductor lasers, which are essential as light sources in long-distance optical fiber communications. The development of semiconductor lasers with good high-temperature characteristics has become important, and the semiconductor lasers used in Asahi Optical Communications are mainly InGaAsP/InP-based semiconductor lasers that have an oscillation wavelength suitable for the low-loss region of optical fibers. Semiconductor laser ζ in this system Fundamental transverse mode oscillation Low threshold 4L The power (in this
The structure shown in the figure is a DC-PBH (Double Chan
nel-Plarar Burried Hetero
) type LD (Laser Diode), and has an advantageous structure in terms of high temperature and high output operation (for example, 0QE82-
98). Here, 1 is n-InP substrate, 2 is n-Ir+
P buffer #3 is an InGaAsP active layer (band gap wavelength λg = 1.3 μm), 4 is a P-InP clad layer, 5 is a P-InP embedded layer, 6 is a 7l-I71P embedded layer, and 7 is a P-InP embedded layer. 8 is P-InGaAsPD
contact layer (2g-1.3μm). The feature of this structure is that the mesa stripe 9 uses a normal embedded LD as the light emitting part.
After removing all the active layers 3 except for the buried layers (5 to 8)
In contrast, the active layer 3 only in the double channel region 10 adjacent to the mesa stripe 9 is removed, and the same quaternary layer as the active layer 3 is left in the buried region outside the mesa stripe 9. As a result, a part of the base layer of the PnPn type thyristor structure that constitutes the current sandwiching region is made of InGaAsP, so the breakover voltage is higher and the current amplification factor for Baker current is higher than that of a thyristor made of only 1nP. Since it is small, it is difficult to cause thyristor operation even when a large current is passed through it, and optical output saturation due to embedded leakage current is small, so high output operation and high temperature operation are possible. nI on substrate l
nP buffer layer 2, InGaAsP active layer 3, and P
- A plate in which the InP cladding layer was epitaxially grown in sequence, then the area other than the double channel region 10 was masked, and this region was etched to below the active layer 3. After the mask material was removed, P-InF was grown by liquid phase epitaxial growth.
3. n-InF3. n-InF3. P-InGa
Even when AsP8 is grown, in the case of liquid phase growth, the mesa stripe width is narrow (5 μm or less) and the mesa step is sufficiently high (2
μm or more), the growth layer is not stacked on the mesa stripe, so the P-InP buried layer 5, which is the first buried layer, and the n-InP buried layer, which is the second layer, are not stacked on the mesa stripe. Since no growth occurs, a current interpolation structure is automatically formed and the structure shown in FIG. 3 can be obtained. By the way, the problem here is the method of etching this tuple channel. When the stripe direction is set to the <011> direction, a negative resist is used as the mask material, and Br-methanol is used as the etching solution, the etching method is as shown in Figure 3. In this case, the side surfaces of the double channel form a so-called normal mesa shape, forming an obtuse angle with respect to the main surface (100).

This is because in the case of a resist mask, the side etch is large due to poor adhesion with the semiconductor layer, resulting in a mesa shape. However, if the mesa stripe including the active layer is a regular mesa, it is difficult to control the width of the active layer 3 to about 1 μm. In this case, the width of the upper side of the mesa stripe is about 0.5 to 0.7 μm, which causes problems in terms of mask peeling and controllability.
When uX is used as a and Br methanol is used as the etching liquid, the angle between the mesa side surface and the main surface becomes an acute angle, that is, an inverted mesa shape, as shown in FIG. In this case, the adhesion between the mask material and the semiconductor layer is good, and there is no problem in sandwiching the active layer width with good control.Since the outer side of the double channel also has an acute angle, the second buried growth is necessary. At this time, the P-InP buried layer 5 and the n-1nP buried layer 6 become thinner or break off in this area. This causes an increase in the threshold current of the LD.

Problems to be Solved by the Invention As mentioned above, in the conventional manufacturing method, when the shape of the double channel is a normal mesa, it is difficult to sandwich the width of the active layer.
There is a problem with controllability, and when an inverted mesa shape is used, the buried block layer is likely to break or become thinner in the stepped region outside the channel, and the LD characteristics may deteriorate due to the buried block layer. Means for Solving the Problems In order to overcome the above-mentioned problems, the present invention provides that the outer side of the double channel is a regular mesa, and the inner side, that is, the mesa stripe that becomes the light emitting part. is a double-channel buried semiconductor laser with a vertical or inverted mesa shape, and InGaAsP is used in the outer region to form a double channel.
Manufacturing of a semiconductor laser characterized by forming an insulating film mask on the InP cladding layer in the inner region, that is, the generation mesa stripe, on the cap layer, and etching the double channel region with a mixed solution containing hydrochloric acid and hydrogen peroxide solution. It's a method.

Effect: By the above means, the light-emitting mesa stripes have a vertical or inverted mesa shape, making it possible to sandwich and control the width of the active layer, and since the outer region is a normal mesa, it is possible to prevent leakage current during buried epitaxial layering. Also, when the etching solution containing hydrochloric acid and hydrogen peroxide masks the insulating film directly on InP, it forms an inverted mesa shape, but when the InGaAsP layer is the top layer, In this case, since it becomes a forward taper, such an asymmetric double channel structure can be formed by one etching.

Examples Examples of the present invention will be described below. FIG. 1 is a diagram of a buried cross-sectional structure of a semiconductor laser according to the present invention. Here, as in Fig. 3, 1 is the n-InP substrate, 2 is the n-InP substrate, and 2 is the n-InP substrate.
P buffy M! , 3 is InGaAsP activity N, 4 is P-
InP clad [5 is P-InP embedded JiiL6 is P-
InP implantation clothing 7 is P-InP implantation 8 is P-InG
aAsP: + > Tact layer Conventional example (Fig. 3 and 4)
The difference from the double channel 100 is that the side shape of the double channel 100 is an asymmetrical structure in which the inner side, that is, the side of the mesa stripe 9, has a reverse taper shape, while the outer side has a forward taper. Because of this shape, it is possible to form an active layer width of about 1 μm, which is necessary for singleizing the transverse mode, with good controllability.Also, since the outer side surface is forward tapered, it is possible to avoid step breaks in the buried epitaxial layers 5 and 6. Thinness is less likely to occur, embedded leakage is less likely to occur in this region, and low threshold single transverse mode oscillation can be obtained with high yield. is the same InG as active layer 3
The presence of the aAsP layer prevents the occurrence of leakage current due to thyristor turnover and enables high-output operation and high-temperature operation, which is the same in this embodiment. 4 First, in the first epitaxial growth, n-I is grown on the n-InP substrate l.
nP buffer layer (thickness d=5 μm) 2, InGaAs
P active layer (d=0.1 μm) 3, P-InP cladding layer (d=1 μm) 4, P-InGaAsP cap layer (d=0.1 μm) 20 are grown to have a width of 12 μm in the touch <011> direction. The P-1nGaAsP cap layer in this area was masked using H2S.
After removing the mask material using an etching solution of O4:H2O2:H20=1:1:5, the second
The structure shown in Figure (a) is obtained. Next, after depositing a SiN film 21 on the entire surface, P-In is deposited by ordinary photolithography.
A pair of striped patterns with a width of 5 μm and an interval of 2 μm was formed in the area where GaAsP20 was removed
After removing the SiN film 21 by - type dry etching, the resist is removed to obtain the structure shown in FIG. 2(b).

Next, HCI・H2O2:ChCOOH=3:l
Etching is performed to a depth of 3 .mu.m below the active layer 3 using a mixed solution of: 36 to form a mesa stripe 9 having a width of 1 .mu.m including the active layer and double channels 100 on both sides thereof, as shown in FIG. 2(C).

Here, in the mesa stripe 9 located at the center of the double channel 100, 5iN21 is deposited directly on the P-InP cladding 4 as a mask, whereas on the outside of the double channel, S is deposited on the P-InGaAsP cap layer 20.
An iN film mask 21 exists 4. Here, the adhesion of InP/SiN to a hydrochloric acid/hydrogen peroxide based etching solution is good, there is little side etching, and the mesa stripe 9 in the center has an inverted mesa shape. Since the etching rate of InGaAsP is faster than that of InP, the outer side surface of the double channel has a forward taper.
After removing 0, buried epitaxial growth is performed.1. <
P-InP buried layer 5, n-InP buried layer 6, P-I
Although it is possible to form the nP buried layer 7 and the P-1nGaAsP contact layer 8 to obtain the structure shown in FIG. As shown in Fig. 1, a channel with an asymmetric structure can be obtained, and there is almost no decrease in yield or deterioration of characteristics due to complication of the process.
Between the active layer and the cladding layer I
The same applies to the structure in which the nGaAsP optical waveguide layer is interposed, and the DFB type LD includes a diffraction grating above or below the active layer.
In addition, double channel machining/soching is based on the HC1+H20a+CHsCOOH system, but HC1+H2 (h+H3PO4, etc.) may also be used (HC1+H20a+CHsCOOH).
+H2O1! The composition of the etching solution is not limited to this, and the composition of the etching solution is not limited to this. This is a double-channel buried semiconductor laser consisting of a groove with an asymmetric structure, and the active layer width can be sandwiched with good control, and the yield can be reduced due to buried leakage due to step cutting or thinning in the buried epitaxial layer. This makes it possible to provide a high-output, high-temperature operation semiconductor laser that can suppress deterioration.

In addition, the method for manufacturing the semiconductor laser of the present invention is to mask the double channel with an insulating film, with InPFL on the inside and InGaAsP on the outside as the top layer, and then etching with an etching solution containing hydrochloric acid and hydrogen peroxide to eliminate such an asymmetric structure. It can be stably obtained through a very easy process.

[Brief explanation of drawings]

FIG. 1 shows the structure of a laser according to an embodiment of the present invention, and FIG.
) to (c) are the manufacturing process diagrams of the laser shown in Fig. 1, Fig. 3 and 4.
The figure shows the structure of a conventional laser.
Base maple 2...n-1nP buffer [3=InGaA
sP activity #4-...P-InP cladding #5.7...
...P-InP buried layer, 6...n-InP buried layer #
8...P-InGaAsP contact #9...
...Mesa stripe 100...double channel,
20...InGaAsP cap #21...S
iN style agent's name Patent attorney Shigetaka Awano Haka 1 Meika! Figure 20 (of) ZriIfLkAsf' and Inno71 layer/C'b) zH・～Enoki/lθθ double stain)V

Claims (2)

[Claims] (1) An active layer and a second conductive layer are formed on a semiconductor substrate of a first conductivity type or a semiconductor substrate having a semiconductor layer of a first conductivity type.
a striped first region including a cladding layer of a conductivity type, a striped groove formed adjacent to both sides of the first region or a striped groove reaching the semiconductor layer of the first conductivity type; a pair of striped second regions including a current blocking layer made of a conductivity type layer;
a third region located on both sides of the region and including the active layer and the current blocking layer, the shape of the side surface of the groove in the second region is vertical or inversely tapered at the boundary of the first region; , a semiconductor laser having a forward taper on the third region boundary side. (2) InG on an InP substrate whose main surface is the (100) plane.
aAsP active layer, InP cladding layer and top layer
a step of laminating a GaAsP cap layer; and a step of laminating a first region in a stripe shape in the <011> direction and a second region in a pair of stripes in the <011> direction adjacent to both sides of the first region. A step of removing the InGaAsP cap layer, masking the first region and a third region located outside the second region with an insulating film, and removing the semiconductor layer in the second region with hydrochloric acid and hydrogen peroxide. Manufacturing a semiconductor laser comprising the steps of: etching with a mixed solution containing water; and stacking current blocking layers of different conductivity types on the second and third regions after removing the insulating film. Method.