JPH0432811Y2 - - Google Patents

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Publication number
JPH0432811Y2
JPH0432811Y2 JP1986152554U JP15255486U JPH0432811Y2 JP H0432811 Y2 JPH0432811 Y2 JP H0432811Y2 JP 1986152554 U JP1986152554 U JP 1986152554U JP 15255486 U JP15255486 U JP 15255486U JP H0432811 Y2 JPH0432811 Y2 JP H0432811Y2
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JP
Japan
Prior art keywords
transistor
circuit
protection circuit
bridge
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986152554U
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Japanese (ja)
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JPS6359415U (en
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Priority to JP1986152554U priority Critical patent/JPH0432811Y2/ja
Publication of JPS6359415U publication Critical patent/JPS6359415U/ja
Application granted granted Critical
Publication of JPH0432811Y2 publication Critical patent/JPH0432811Y2/ja
Expired legal-status Critical Current

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  • Amplifiers (AREA)

Description

【考案の詳細な説明】 (1) 考案の目的 [産業上の利用分野] 本考案はトランジスタ増幅器、特に4個のトラ
ンジスタをブリツジ形に接続した増幅器の辺の短
絡等に困る過電流によるトランジスタの破壊を防
止する保護回路に関するものである。
[Detailed explanation of the invention] (1) Purpose of the invention [Field of industrial application] This invention is designed to solve the problem of transistor amplifiers, especially amplifiers in which four transistors are connected in a bridge configuration, due to short circuits on the sides of the transistors caused by overcurrent. This invention relates to a protection circuit that prevents destruction.

[従来技術] 第2図は従来から実施されている4個のトラン
ジスタによるブリツジ形増幅器の概念図で、トラ
ンジスタQ1,Q2,Q3,Q4の夫々のエミツタとコ
レクタを順次環状に接続し、Q1,Q3のコレクタ
の接続点に電源の(+)を、Q2,Q4のコレクタ
の接続点に電源の(−)を夫々接続し、Q1とQ2
のエミツターとコレクタの接続点に負荷となる電
動機のA端子を、Q3とQ4のエミツターとコレク
タとの接続点を電動機のB端子に夫々接続してあ
る。
[Prior Art] Figure 2 is a conceptual diagram of a conventional bridge type amplifier using four transistors, in which the emitters and collectors of transistors Q 1 , Q 2 , Q 3 , and Q 4 are sequentially connected in a ring. Then, connect the (+) power supply to the connection point of the collectors of Q 1 and Q 3 , and the (-) power supply to the connection point of the collectors of Q 2 and Q 4 , respectively.
The A terminal of the motor serving as a load is connected to the connection point between the emitter and collector of Q3, and the connection point of the emitter and collector of Q3 and Q4 is connected to the B terminal of the motor.

又各トランジスタのベース1,2,3,4には
入力制御回路Sの出力が接続してあり、分配回路
Sに入力する制御指令により各トランジスタの通
電状態を制御し電動機Mの回転を制御するもので
ある。
Furthermore, the output of the input control circuit S is connected to the bases 1, 2, 3, and 4 of each transistor, and the energization state of each transistor is controlled by the control command input to the distribution circuit S, thereby controlling the rotation of the electric motor M. It is something.

いま電動機Mを時計方向に回転させるには制御
回路Sの1,4から出力し、トランジスタQ1
Q4をONとして電動機MにA→Bと通電し、時計
方向に回転せしめ、反時計方向に回転させる場合
は分配回路Sの2,3から出力しトランジスタ
Q3,Q2をONとして電動機MにB→Aと通電し、
反時計方向に回転せしめる。制御回路Sより出力
が出なければトランジスタは全部OFFとなり電
動機Mは停止する。
Now, in order to rotate the electric motor M clockwise, the outputs are output from the control circuit S 1 and 4, and the transistors Q 1 ,
When Q 4 is turned on, the motor M is energized from A to B to rotate clockwise, and when rotating counterclockwise, the output is output from 2 and 3 of the distribution circuit S and the transistor
Turn on Q 3 and Q 2 and energize motor M from B to A.
Rotate counterclockwise. If no output is output from the control circuit S, all transistors are turned off and the motor M is stopped.

[考案が解決しようとする問題点] ところが第2図の回路では電動機Mをある方向
から急に逆転させる場合、例えば時計方向から反
時計方向に逆転させる時はトランジスタQ1,Q4
をOFFとし次にQ3,Q2をONにするのであるが、
Q1が完全にOFFとならない間にQ2がONとなる
ことがあり、Q1,Q2を介して電源が短絡される
こととなり、Q1,Q2に大きな電流が流れトラン
ジスタが破壊されるという問題があつた。
[Problem to be solved by the invention] However, in the circuit shown in Fig. 2, when the motor M is suddenly reversed from a certain direction, for example from clockwise to counterclockwise, transistors Q 1 and Q 4 are used.
is turned OFF and then Q 3 and Q 2 are turned ON.
Q 2 may turn ON while Q 1 is not completely OFF, causing the power supply to be shorted through Q 1 and Q 2 , causing a large current to flow through Q 1 and Q 2 and destroying the transistor. There was a problem.

上記のような問題を解決するための従来技術に
おいては、ブリツジの辺を構成するトランジスタ
の一個以上について、例えば第2図においてトラ
ンジスタQ2のエミツタと電源の(−)との間に
電流検出用抵抗を直列に介挿し、該抵抗の電圧で
駆動される第5のトランジスタのコレクタをQ2
のベースに、第5のトランジスタのベースをQ2
のエミツタに、第5のトランジスタのエミツタを
電源の(−)に接続した第1の保護回路う設けた
ものがある。ところがこの保護回路は、電流検出
抵抗で発生した電圧が第5のトランジスタを動作
させる電圧以上であれば該トランジスタが動作し
てQ2のベース電流を低下させて不導通とし短絡
より保護することができるが、Q2のエミツタ電
流が減少して電流検出用抵抗の電圧降下即ちQ5
のベース電圧が低下すると再度Q2のエミツター
電流が上昇するという動作を繰返し、Q2の電力
損失が大きくなり、過電流が長時間続く場合には
ブリツジを構成するトランジスタが過熱するとい
う問題がある。又、これを回避する為に、電流検
出値を低い値に設定すると電流検出部の損失が大
きくなり実用的ではない。
In the conventional technology for solving the above-mentioned problems, for one or more of the transistors constituting the sides of the bridge , for example, in FIG. A resistor is inserted in series, and the collector of the fifth transistor driven by the voltage of the resistor is Q 2
and the base of the fifth transistor Q 2
There is a device in which a first protection circuit is provided at the emitter of the fifth transistor by connecting the emitter of the fifth transistor to the (-) terminal of the power supply. However, in this protection circuit, if the voltage generated in the current detection resistor is higher than the voltage that activates the fifth transistor, the transistor operates, lowering the base current of Q 2 and making it non-conducting to protect against a short circuit. However, the emitter current of Q 2 decreases and the voltage drop of the current detection resistor, that is, Q 5
When the base voltage of Q 2 decreases, the emitter current of Q 2 increases again, which repeats the process, increasing the power loss of Q 2 , and if the overcurrent continues for a long time, the transistors that make up the bridge will overheat. . Furthermore, in order to avoid this, if the current detection value is set to a low value, the loss of the current detection section becomes large, which is not practical.

(2) 考案の構成 [問題点を解決するための手段] 本考案は上記のような問題を解決する為に、従
来技術で実施されている第1の保護回路と共に、
上記電流検出用抵抗の電圧を、第1のホトカプラ
と時間遅れ回路及び第2のホトカプラを介して、
増幅器の入力制御回路を制御する第2の過電流保
護回路とより構成したことが特徴である。
(2) Structure of the invention [Means for solving the problem] In order to solve the above problems, the present invention, together with the first protection circuit implemented in the prior art,
The voltage of the current detection resistor is passed through the first photocoupler, the time delay circuit, and the second photocoupler,
A feature of the present invention is that it includes a second overcurrent protection circuit that controls the input control circuit of the amplifier.

[作用] 本考案の過電流保護回路はブリツジの辺を構成
するトランジスタの電流を検出した電圧で直接制
御する構成の第1の保護回路と、検出した電圧を
ホトカプラと時間遅れ回路とを介した第2の保護
回路とを備えているので、短時間で大電流の過電
流の保護は第1の保護回路で、又長時間継続する
過電流は第2の保護回路で夫々分担して保護の動
作を行うことができるので夫々の単独の保護回路
のみの場合の欠点が補完され、より確実な過電流
の保護回路を構成できる。
[Operation] The overcurrent protection circuit of the present invention has a first protection circuit configured to directly control the current of the transistor forming the bridge side using the detected voltage, and a first protection circuit configured to directly control the current of the transistor forming the bridge side, and a first protection circuit configured to directly control the current of the transistor forming the bridge side, and a first protection circuit configured to directly control the current of the transistor forming the bridge side, and a first protection circuit configured to directly control the current of the transistor forming the side of the bridge. The first protection circuit protects against large overcurrents in a short period of time, and the second protection circuit protects against overcurrents that continue for a long time. Since the protection circuits can operate, the drawbacks of using only a single protection circuit can be compensated for, and a more reliable overcurrent protection circuit can be constructed.

[考案の実施例] 第1図に本考案を適用したトランジスタ増幅器
の過電流保護回路の一実施例を示す。
[Embodiment of the invention] FIG. 1 shows an embodiment of an overcurrent protection circuit for a transistor amplifier to which the invention is applied.

第1図においてトランジスタQ1,Q2がブリツ
ジの辺を構成しQ2のエミツターと電源の(−)
との間に電流検出用抵抗R1が直列に介挿されQ2
のベースと電源の(−)とに第5のトランジスタ
Q5のコレクタとエミツタが夫々接続されQ5のベ
ースをQ2のエミツターに接続し第1の保護回路
を形成する。
In Figure 1, transistors Q 1 and Q 2 form the sides of the bridge, with the emitter of Q 2 and the (-) side of the power supply.
A current detection resistor R 1 is inserted in series between Q 2 and
A fifth transistor is connected to the base of the power source and the (-) of the power source.
The collector and emitter of Q5 are connected respectively, and the base of Q5 is connected to the emitter of Q2 to form a first protection circuit.

次に抵抗R1の電圧を抵抗R2を介して第1のホ
トカプラP1に入力し、該ホトカプラの出力を時
間遅れ回路に入力す。時間遅れ回路AND回路U1
の第1の入力端子に抵抗R3を介して上記の第1
のホトカプラP1の出力を入力し、U1の第2の入
力端子には抵抗R5,R6とダイオードDとコンデ
ンサCとよりなる時間遅れ回路を介して上記のホ
トカプラの出力を入力し、該AND回路U1の出力
をラツチ回路U2を介してAND回路U3の一方に入
力し、U3の他の一方の入力には電動機制御回路
の起動指令信号を入力し、AND回路U3の出力を
第2のホトカプラP2に入力し、該ホトカプラの
出力をブリツジ形増幅器の制御回路Sを介してブ
リツジのトランジスタQ2のベースに入力する回
路により第2の保護回路を形成する。
Next, the voltage of the resistor R1 is inputted to the first photocoupler P1 via the resistor R2 , and the output of the photocoupler is inputted to the time delay circuit. Time delay circuit AND circuit U 1
the above first input terminal through the resistor R 3 to the first input terminal of
The output of the above photocoupler P1 is inputted to the second input terminal of U1 via a time delay circuit consisting of resistors R5 , R6 , diode D, and capacitor C. The output of the AND circuit U 1 is inputted to one side of the AND circuit U 3 via the latch circuit U 2 , and the start command signal of the motor control circuit is inputted to the other input of U 3 . A second protection circuit is formed by a circuit that inputs the output of the photocoupler P2 to the second photocoupler P2 , and inputs the output of the photocoupler to the base of the bridge transistor Q2 via the control circuit S of the bridge type amplifier.

第1の保護回路はトランジスタQ2に過電流が
流れ電流検出用抵抗R1の電圧がトランジスタQ5
をONとするベース電圧VBE以上となるとトラン
ジスタQ5がONとなりQ2のベースを(−)電位に
落してQ2をOFFにして電源短絡のような過電流
よりトランジスタを保護する。
In the first protection circuit, overcurrent flows through transistor Q 2 and voltage across current detection resistor R 1 flows through transistor Q 5.
When the base voltage exceeds VBE, transistor Q5 turns on, lowering the base of Q2 to (-) potential, turning Q2 off, and protecting the transistor from overcurrents such as short circuits in the power supply.

次に電流検出抵抗R1の電圧がVBEに達しない
でかつホトカプラの動作電圧を超えて継続して過
電流が流れた場合はR1の電圧が第1のホトカプ
ラP1に入力し、該ホトカプラの出力が時間遅れ
回路のAND回路U1の第1の端子に抵抗R3を介し
て直接に、又抵抗R5とダイオードDとコンデン
サCで形成された遅れ回路を介して第2の端子に
入力する構成であるので、AND回路U1の出力は
第2の電圧がある時間遅れて第1の端子と同じ電
圧となつてから出力することとなる。
Next, if the voltage of current detection resistor R1 does not reach VBE and an overcurrent continues to flow exceeding the operating voltage of the photocoupler, the voltage of R1 is input to the first photocoupler P1 , and the photocoupler The output of is directly connected to the first terminal of the AND circuit U1 of the time delay circuit via the resistor R3 , and to the second terminal via the delay circuit formed by the resistor R5 , the diode D, and the capacitor C. Since it is configured to input, the output of the AND circuit U1 is output after the second voltage becomes the same voltage as the first terminal after a certain time delay.

AND回路U1出力が出るとラツチ回路U2で保持
されAND回路U3の第2の端子に入力し、U3の第
1の端子に入力されている電動機制御回路の起動
指令を遮断し、U3の出力はHレベルとなり第2
のホトカプラP2には電流が流れずブリツジ回路
の制御回路Sより出力が出ずQ2のベース電流を
OFFとし、トランジスタQ1,Q2による電源短絡
を防止し併せてトランジスタの破壊を防止する保
護回路として動作するものである。
When the AND circuit U 1 output is output, it is held by the latch circuit U 2 and input to the second terminal of the AND circuit U 3 , and the start command of the motor control circuit input to the first terminal of U 3 is cut off. The output of U 3 becomes H level and the second
No current flows through the photocoupler P 2 , and no output is output from the control circuit S of the bridge circuit, so the base current of Q 2
It is turned OFF and operates as a protection circuit that prevents power supply short circuit caused by transistors Q 1 and Q 2 and also prevents destruction of the transistors.

上記のように第1の保護回路は保護すべきトラ
ンジスタの電流を検出した抵抗の電圧がVBE以
上になると直接保護回路の第5のトランジスタ
Q5を駆動する構成であるから応答が速く、電動
機の逆転等の際に生じ易いトランジスタQ1,Q2
の同時導通による電源の短絡を防止するのに効果
がある。一方、第2の保護回路は電流検出用抵抗
R1の電圧がVBE以下でかつホトカプラの動作電
圧以上であり、上記時間遅れ回路の時定数以上継
続する場合に作動し、トランジスタQ2をOFFと
して過電流からトランジスタを保護する。
As mentioned above, when the voltage of the resistor that detects the current of the transistor to be protected becomes higher than VBE, the first protection circuit directly activates the fifth transistor of the protection circuit.
Since the configuration drives Q 5 , the response is fast, and transistors Q 1 and Q 2 that are likely to occur when the motor is reversed, etc.
This is effective in preventing short-circuits in the power supply due to simultaneous conduction. On the other hand, the second protection circuit is a current detection resistor.
When the voltage of R 1 is below VBE and above the operating voltage of the photocoupler and continues for longer than the time constant of the time delay circuit, it is activated and turns off transistor Q 2 to protect the transistor from overcurrent.

又、電動機の起動時等ある時間経過後に定常電
流に戻る性質の過電流の場合は定常電流に戻る時
間より上記の時間遅れ回路の時定数を遅らせて設
定することによりAND回路U1から出力が出る前
に定常電流に戻りホトカプラP1から出力が出な
くなり、このような過電流には反応しないように
することができるのが特徴であり、過電流の大き
さと継続時間により作動させる保護回路を自動的
に選択し、過電流の性質に適合した保護の動作を
させることができる。
In addition, in the case of an overcurrent that returns to a steady current after a certain period of time, such as when starting a motor, the output from the AND circuit U 1 can be delayed by setting the time constant of the above-mentioned time delay circuit to be delayed from the time when the current returns to a steady state. The feature is that the current returns to a steady state before the output occurs, and no output is output from photocoupler P 1 , making it possible to prevent it from reacting to such overcurrents.A protection circuit is activated depending on the magnitude and duration of the overcurrent. It is possible to automatically select and operate the protection appropriate to the nature of the overcurrent.

[考案の効果] 本考案によるトランジスタ増幅器の保護回路は
上記のような構成であるので、電流検出用抵抗の
電圧がVBE以上となる大きな過電流の場合は第
1の保護回路で直接トランジスタQ5を動作させ
Q2のベースを(−)電位に落しQ2をOFFとし極
めて速い反応でトランジスタを保護する一方、実
際の動作中に生ずる過電流の多くは起動電流のよ
うに一過性で短時間に定常電流に戻る形のものが
多いので第2の保護回路の時定数を適切に設定す
ることにより、第2の保護回路で選択して保護す
ることができる。又第2の保護回路は主増幅器の
回路と過電流検出回路との間にホトカプラを介挿
してあるので両方の回路を絶縁することができる
効果がある。
[Effect of the invention] Since the protection circuit of the transistor amplifier according to the invention has the above-mentioned configuration, in the case of a large overcurrent where the voltage of the current detection resistor exceeds VBE, the first protection circuit directly connects the transistor Q5 . make it work
While the base of Q 2 is dropped to (-) potential and Q 2 is turned OFF to protect the transistor with an extremely fast reaction, most of the overcurrent that occurs during actual operation is transient like the starting current and becomes steady in a short period of time. Since there are many types that return to current, by appropriately setting the time constant of the second protection circuit, it is possible to select and protect the second protection circuit. Further, since the second protection circuit has a photocoupler inserted between the main amplifier circuit and the overcurrent detection circuit, it has the effect of insulating both circuits.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案を実施したトランジスタ増幅器
の保護回路の回路図で、第2図は従来より実施さ
れているブリツジ形増幅器の概念図である。 符号の説明、Q1,Q2,Q3,Q4,Q5……トラン
ジスタ、R1,R2,R3,R4,R5,R6,R7……抵
抗、C……コンデンサ、D……ダイオード、P1
P2……ホトカプラ、M……電動機、U1……AND
回路、U2……ラツチ回路、U3……AND回路、S
……入力制御回路。
FIG. 1 is a circuit diagram of a protection circuit for a transistor amplifier embodying the present invention, and FIG. 2 is a conceptual diagram of a conventional bridge type amplifier. Explanation of symbols, Q 1 , Q 2 , Q 3 , Q 4 , Q 5 ... Transistor, R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 ... Resistor, C ... Capacitor , D...diode, P 1 ,
P 2 ...Photocoupler, M...Electric motor, U 1 ...AND
Circuit, U 2 ... Latch circuit, U 3 ... AND circuit, S
...Input control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 4個のトランジスタの夫々のエミツタとコレク
タを順次接続してブリツジを形成し、該ブリツジ
の一対の対角に電源を、他の一対の対角に負荷装
置を夫々接続したブリツジ形増幅器で、上記ブリ
ツジの一辺を構成する少なくとも一個のトランジ
スタQ2のエミツタと電源の間に適宜の抵抗R2
直列に介挿し、上記トランジスタQ2のベースと
電源の間に第5のトランジスタQ5のコレクタと
エミツタを接続し、該第5のトランジスタQ5
ベースを上記抵抗R2と上記トランジスタQ2のエ
ミツタとの接続点に接続した第1の保護回路を設
けたトランジスタ増幅器の保護回路において、上
記第5のトランジスタQ5のベースを第1のホト
カプラP1の入力端子に接続し、上記ホトカプラ
P1の出力を時間遅れ回路を介してラツチ回路U2
に入力し、該ラツチ回路U2の出力と主制御回路
の出力とをAND回路U3を介して第2のホトカプ
ラP2に入力し、該ホトカプラP2の出力を上記ブ
リツジ形増幅器の入力制御回路Sを介して上記ブ
リツジの辺を構成するトランジスタQ2のベース
に入力する回路を形成した第2の保護回路とによ
り構成されることを特徴とするトランジスタ増幅
器の保護回路。
A bridge-type amplifier in which the emitters and collectors of each of four transistors are sequentially connected to form a bridge, a power supply is connected to one pair of diagonals of the bridge, and a load device is connected to the other pair of diagonals, and the above-mentioned An appropriate resistor R 2 is inserted in series between the emitter of at least one transistor Q 2 constituting one side of the bridge and the power supply, and a collector of a fifth transistor Q 5 is inserted between the base of the transistor Q 2 and the power supply. In the protection circuit for a transistor amplifier, the protection circuit includes a first protection circuit in which the emitter of the transistor Q 2 is connected to the emitter of the transistor Q 2 and the base of the fifth transistor Q 5 is connected to the connection point between the resistor R 2 and the emitter of the transistor Q 2 . Connect the base of the transistor Q5 of No. 5 to the input terminal of the first photocoupler P1 , and
The output of P 1 is passed through the time delay circuit to the latch circuit U 2
The output of the latch circuit U 2 and the output of the main control circuit are input to the second photocoupler P 2 via the AND circuit U 3 , and the output of the photocoupler P 2 is used to control the input of the bridge amplifier. 1. A protection circuit for a transistor amplifier, characterized in that it is constituted by a second protection circuit forming a circuit that is input to the base of a transistor Q2 constituting a side of the bridge via a circuit S.
JP1986152554U 1986-10-06 1986-10-06 Expired JPH0432811Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986152554U JPH0432811Y2 (en) 1986-10-06 1986-10-06

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986152554U JPH0432811Y2 (en) 1986-10-06 1986-10-06

Publications (2)

Publication Number Publication Date
JPS6359415U JPS6359415U (en) 1988-04-20
JPH0432811Y2 true JPH0432811Y2 (en) 1992-08-06

Family

ID=31070639

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986152554U Expired JPH0432811Y2 (en) 1986-10-06 1986-10-06

Country Status (1)

Country Link
JP (1) JPH0432811Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58136274A (en) * 1982-02-03 1983-08-13 Matsushita Electric Ind Co Ltd Protecting circuit for motor controller
JPS58154378A (en) * 1982-03-09 1983-09-13 Japan Servo Co Ltd Control circuit for motor
JPS58159675A (en) * 1982-03-17 1983-09-22 Matsushita Electric Ind Co Ltd Protecting circuit for motor controller

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079819U (en) * 1983-11-08 1985-06-03 パイオニア株式会社 Load current limit circuit
JPS60144312U (en) * 1984-03-02 1985-09-25 株式会社日立製作所 Transistor overcurrent protection circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58136274A (en) * 1982-02-03 1983-08-13 Matsushita Electric Ind Co Ltd Protecting circuit for motor controller
JPS58154378A (en) * 1982-03-09 1983-09-13 Japan Servo Co Ltd Control circuit for motor
JPS58159675A (en) * 1982-03-17 1983-09-22 Matsushita Electric Ind Co Ltd Protecting circuit for motor controller

Also Published As

Publication number Publication date
JPS6359415U (en) 1988-04-20

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