JPH04326748A - Detecting method for temperature of semiconductor device - Google Patents

Abstract

PURPOSE:To accurately detect a temperature of a semiconductor device. CONSTITUTION:A semiconductor device 1 is used in a state that a constant current is supplied to a drain D of a MOS transistor Tr2 associated in the device 1 and a constant voltage is supplied to a gate G, and a drain voltage VD is measured by a voltmeter 15 in this state. As a temperature of the device 1 rises, the temperature of the transistor Tr2 also rises. An ON resistance of the transistor Tr2 is increased as the temperature rises, and the drain voltage is also rises in proportion to it. Then, the temperature of the device 1 is detected by measuring the voltage VD.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting the temperature of a semiconductor device.

0002

2. Description of the Related Art The electrical characteristics of a semiconductor device change depending on changes in junction temperature (hypothetical temperature inside the semiconductor), and the various ratings and characteristics of a semiconductor are not guaranteed outside a predetermined range of junction temperature. Therefore, when using a semiconductor device, it is necessary to use it under conditions where the temperature of the semiconductor device does not rise above a predetermined temperature. In the case of semiconductor devices such as NPN power transistors through which a large current flows, the temperature tends to rise during use, so it is necessary to detect the temperature of the semiconductor device during use to prevent the temperature of the semiconductor device from exceeding a predetermined value. There is.

Conventionally, as shown in FIG. 5, a semiconductor device with a temperature detection function uses an insulating film 22 such as a silicon oxide film (SiO2) formed to cover the surface of a semiconductor substrate 21.
On top, a P+ type polycrystalline silicon (polysilicon) layer 2
A structure in which a plurality of PN junction type polysilicon diodes are connected in series by alternately forming 3 and N+ type polysilicon layers 24 adjacent to each other is known. In this way, the P+ type polysilicon layer 23 and the N+
Since the forward characteristics of the PN junction diode made of the polysilicon layer 24 depend on temperature, the temperature of the semiconductor substrate 21 can be detected by measuring the forward voltage of the diode having the above configuration. .

0004

[Problems to be Solved by the Invention] The above-mentioned PN junction type polysilicon diode is formed by diffusing P type impurities and N type impurities using different masks. It is very difficult to accurately form a PN junction at the boundary with layer 24. Therefore, there is a problem in that variations in the forward voltage of the polysilicon diode inevitably increase, making it difficult to accurately detect temperature.

The present invention has been made in view of the above-mentioned problems, and its object is to provide a method for detecting temperature of a semiconductor device, which enables highly accurate temperature detection.

[0006]

[Means for Solving the Problems] In order to achieve the above object, in the invention as set forth in claim 1, a semiconductor device is provided with MO
Incorporating an S transistor, applying a constant voltage to the gate of the MOS transistor and inputting a constant current to the drain of the MOS transistor, measure the drain voltage of the MOS transistor, and calculate the drain voltage based on the temperature change of the on-resistance of the MOS transistor. The temperature of the semiconductor device is detected by the change in the temperature of the semiconductor device.

[0007] Furthermore, in the invention described in claim 2, a MOS transistor is incorporated in a semiconductor device, and a constant voltage is applied to the gate of the MOS transistor, and a constant voltage is input to the drain of the MOS transistor. The source current is measured, and the temperature of the semiconductor device is detected based on the change in the source current based on the temperature change in the on-resistance of the MOS transistor.

[0008]

[Operation] In the invention described in claim 1, the semiconductor device is used with a constant current being supplied to the drain and a constant voltage being supplied to the gate of the MOS transistor incorporated in the semiconductor device, and the drain voltage is measured. . The on-resistance of a MOS transistor increases continuously as the temperature rises, and the drain voltage also increases in proportion to it. Therefore, the temperature of the semiconductor device can be detected by measuring the drain voltage.

In the invention described in claim 2, the semiconductor device is used with a constant voltage being supplied to the drain and gate of the MOS transistor incorporated in the semiconductor device, and the source current of the MOS transistor is be measured. The on-resistance of a MOS transistor increases continuously as the temperature rises, and the source current decreases in proportion to the increase in temperature. Therefore, the temperature of the semiconductor device can be detected by measuring the source current.

0010

【Example】

(Embodiment 1) A first embodiment embodying the present invention will be described below with reference to FIGS. 1 and 2. As shown in FIG. 2, the semiconductor device 1 includes NPs formed on one substrate (chip) 2.
N power transistor Tr1 and N-type MOS for temperature detection
It is composed of a transistor Tr2. That is, N
An N-type MOS transistor Tr is disposed on an N-type silicon substrate 2, which becomes the collector region 3 of the PN power transistor Tr1.
A P well region 4 serving as a substrate for the transistor 2 and a base region 5 made of a P layer of an NPN power transistor Tr1 are formed. A drain region 6 and a source region 7 made of an N+ layer are formed in the P well region 4.
A thin oxide film (SiO2) is formed on the surface of the P well region 4 between the source region 7 and the source region 7, and a gate electrode 8 made of polysilicon is formed thereon. Further, within the base region 5, an emitter region 9 made of an N+ layer is formed. The source region 7 and P well region 4 of the MOS transistor Tr2 are short-circuited by an electrode, and
d and is connected to the emitter E of the NPN power transistor Tr1 by a wiring 10. The surfaces of the collector region 3, P-well region 4, and base region 5 are covered with an oxide film (SiO2) 11 except for the electrode forming portions.

When manufacturing the semiconductor device 1, a MOS
P-well region 4 of transistor Tr2 is formed at the same time as base region 5 of NPN power transistor Tr1 is formed. That is, an oxide film 11 is formed on the surface of an N-type silicon substrate 2, diffusion windows for a P-well region and a base region are opened at predetermined locations in the oxide film 11, and P-well regions are formed by diffusing P-type impurities. 4 and base region 5 are formed simultaneously. Further, the drain region 6 and source region 7 of the MOS transistor Tr2 are formed at the same time as the emitter region 9 of the NPN power transistor Tr1. That is, after diffusing P-type impurities, an oxide film is formed on the surfaces of P-well region 4 and base region 5, diffusion windows for the drain region, source region, and emitter region are opened at predetermined locations in the oxide film, and N-type impurities are diffused. By doing so, drain region 6, source region 7 and emitter region 9 are formed at the same time. Therefore, even if the temperature detection MOS transistor Tr2 is incorporated into the semiconductor device 1, the manufacturing process is the same as that of the NPN power transistor Tr1, except for the formation of the gate of the MOS transistor Tr2, and manufacturing is relatively easy.

When the semiconductor device 1 configured as described above is used for drive control of a load, as shown in FIG.
N power transistor Tr1 has its collector C as load 1
2 to the power supply Vcc, and the emitter E to ground. A drive circuit 13 that supplies a drive current for driving the NPN power transistor Tr1 is connected to the base B.

The drain D of the MOS transistor Tr2 is connected to the constant current source Icc, and the source is connected to the gra via the emitter E.
nd, respectively. The gate G is connected to a second drive circuit 14 that applies a predetermined gate voltage VG. Further, a voltmeter 15 is connected to the drain D, and a voltmeter 15 is connected to the drain D.
The output signal of 5 is input to the control device 16. Control device 1
6 calculates the temperature based on the voltage measured by the voltmeter 15, and controls the first drive circuit 13 so that the temperature of the semiconductor device 1 does not rise above a predetermined temperature.

When the base current IB is supplied from the first drive circuit 13 to the base B of the NPN power transistor Tr1, the NPN power transistor Tr1 is turned on and current flows to the load 12. On the other hand, when the gate voltage VG is input to the MOS transistor Tr2, the MOS
The transistor Tr2 is turned on, and the drain voltage VD is output from the drain D. MOS transistor Tr
A constant drain current ID is always supplied to the drain D of the MOS transistor Tr2 from the constant current source Icc, and the gate voltage VG is also constant, so if the on-resistance of the MOS transistor Tr2 is constant, the drain voltage VD is also kept constant. but,
Since the NPN power transistor Tr1 is for large current, it generates heat when in the on state, and the temperature of the entire semiconductor device 1 increases. As the temperature of the semiconductor device 1 increases, the on-resistance of the MOS transistor Tr2 also increases, and the drain voltage VD also increases in proportion to the on-resistance. Note that the gate voltage VG may be either a pulse voltage or a normal DC voltage.

Drain voltage VD is measured by voltmeter 15, and control device 16 calculates the temperature of semiconductor device 1 based on the drain voltage VD. Then, a control signal is output from the control device 16 to the first drive circuit 13 to control the base current IB so that the temperature of the semiconductor device 1 does not rise above a predetermined temperature. This prevents the NPN power transistor Tr1 from overheating and reliably prevents the transistor from being destroyed due to thermal runaway. The on-resistance of the MOS transistor Tr2 is quite large, and the temperature coefficient representing the rate of increase in the on-resistance as the temperature rises is also large, so that accurate temperature detection is possible. Also, the drain voltage VD
is constantly monitored, and the on-resistance of the MOS transistor Tr2 changes continuously as the temperature changes, making it possible to detect the entire range of temperature in the usage state of the semiconductor device 1.

(Embodiment 2) Next, a second embodiment will be explained with reference to FIGS. 3 and 4. As shown in FIG. 3, the semiconductor device 1 used in this embodiment also has an NPN power transistor Tr1 and an N-type MOS transistor Tr2 on one substrate (chip) 2, similar to the semiconductor device 1 of the previous embodiment. is provided. Then, P of the MOS transistor Tr2
Since the well region 4 is connected to the ground as in the previous embodiment, the wiring 10 connects the NPN power transistor Tr.
1, but the source region 7 is connected to the emitter E of P
The source S is formed independently without being short-circuited to the well region 4.

When using the semiconductor device 1 configured as described above, as shown in FIG.
cc and emitter E are connected to ground, respectively. A drive circuit 13 that supplies a drive current for driving the NPN power transistor Tr1 is connected to the base B.
connected to. On the other hand, the drain D of the MOS transistor Tr2 is connected to the constant voltage source Vcc2, and the source S is connected to the sense resistor R.
s to ground, respectively. The gate G is connected to a second drive circuit 14 that applies a predetermined gate voltage VG. Further, a voltmeter 17 that measures the voltage between the terminals of the sense resistor Rs is connected to the control device 16 that controls the drive circuit 13, and an output signal of the voltmeter 17 is input to the control device 16. That is, in the above embodiment, the MOS
Whereas a constant current is supplied to the drain D of the transistor Tr2, a constant voltage is supplied to the drain D in this embodiment.

Similar to the embodiment described above, when the NPN power transistor Tr1 is turned on, the temperature of the semiconductor device 1 rises, and the on-resistance of the MOS transistor Tr2 rises, the source current Is decreases. Then, the sense voltage V based on the source current Is flowing through the sense resistor Rs
s changes continuously as the temperature of the semiconductor device 1 increases. A sense voltage Vs for indirectly detecting the source current Is is measured by a voltmeter 17, and the control device 1
6 calculates the temperature of the semiconductor device 1 based on the sense voltage Vs. Then, based on a control signal from the control device 16, the base current IB is controlled so that the temperature of the semiconductor device 1 does not rise above a predetermined temperature, as in the previous embodiment.

It should be noted that the present invention is not limited to the above-mentioned embodiments. For example, in the second embodiment, the sense resistor Rs may be formed of polysilicon or the like and incorporated into the semiconductor device 1, or an NPN power transistor may be used instead of the sense resistor Rs. For example, an N-type SIT (static induction transistor) disclosed in Japanese Patent Application Laid-Open No. 1-270276 may be used. Further, in both embodiments, the temperature is calculated by the control device 16 based on the outputs of the voltmeters 15 and 17, but it is possible to drive the temperature by using a value corresponding to the temperature or by associating the voltage itself with the temperature without calculating the temperature. The circuit 13 may also be controlled. Furthermore, the MOS transistor Tr2 is NP
Instead of always keeping the N transistor Tr1 in the on state, it may be turned on only when the temperature of the semiconductor device 1 is detected.

[0020]

As described in detail above, according to the present invention, a MOS transistor having a large on-resistance and a large temperature coefficient of temperature change is incorporated into a semiconductor device, and its drain voltage or source current is measured. Since the temperature of the semiconductor device is detected, highly accurate temperature detection is possible.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a first embodiment.

FIG. 2 is a diagram showing the structure of a semiconductor device.

FIG. 3 is a diagram showing the structure of a semiconductor device according to a second embodiment.

FIG. 4 is a circuit diagram when similarly using a semiconductor device.

FIG. 5 is a diagram showing the structure of a conventional temperature detection device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1... Semiconductor device, 12... Load, 13... First drive circuit,
14... Second drive circuit, 15... Voltmeter, 17... Voltmeter,
Tr1...NPN power transistor, Tr2...MOS transistor, Icc...constant current source, Rs...Sense resistor,
Vcc2...constant voltage source, VG...gate voltage, VD...drain voltage, Is...source current.

Claims (2)

[Claims] Claim 1: A MOS transistor is built into a semiconductor device, a constant voltage is applied to the gate of the MOS transistor, a constant current is input to the drain of the MOS transistor, and the drain voltage of the MOS transistor is measured.
A temperature detection method for a semiconductor device that detects the temperature of the semiconductor device from the relationship between the on-resistance of an OS transistor and the temperature. 2. A MOS transistor is built into a semiconductor device, a constant voltage is applied to the gate of the MOS transistor, a constant voltage is input to the drain of the MOS transistor, and the source current of the MOS transistor is measured.
A temperature detection method for a semiconductor device that detects the temperature of the semiconductor device from the relationship between the on-resistance of an S transistor and the temperature.