JPH04322157A - Thyristor converter - Google Patents

Abstract

PURPOSE:To effectively protect against a partial commutation failure at the time of insufficient gamma and at the time of invasion of an overvoltage in a relatively simple structure by providing means for detecting forward voltages of thyristors by voltage detectors to form an AND signal, an OR signal of forward voltage signals. CONSTITUTION:Light emitting elements 81-8N, light guides 101-10N, photodetectors 111-11N detect forward voltage signals of thyristors at a ground level. An OR circuit 13, an AND circuit 14 respectively take OR and AND of forward voltage signals FV1-FVN of the respective thyristors. If there is the signal FVO and no FVA signal during a protective period after a conducting period PHS of a thyristor converter is ended, a first forcible firing signal FP1 is generated. A second forcible firing signal FP2 is momentarily generated when the FVA is eliminated due to an overvoltage, etc., after both the FVO and FVA once become existent within the protective period after the period PHS of the converter is ended (to protect against a normal insufficient gamma). (to protect when an overvoltage is invaded)

Description

[Detailed description of the invention]

[Purpose of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thyristor conversion device capable of protecting a high voltage thyristor conversion device for DC power transmission from overvoltage immediately after energization ends.

0002

[Prior Art] A thyristor converter used for DC power transmission, etc., which is composed of a large number of thyristors connected in series or in series-parallel, recovers only gradually with forward voltage characteristics immediately after energization ends, so it (hereinafter referred to as margin angle) is applied, and then the forward voltage is applied (margin angle constant control).

However, in the unlikely event that the margin angle becomes smaller than a predetermined value (linked to element turn-off time, etc.) due to some transient factor (system voltage drop, voltage distortion, external lightning overvoltage intrusion, etc.). In this case, this is detected and a so-called forced ignition protection is performed in which a ignition pulse is given to all thyristors at the same time.

[0004] This is because a large number of residual carriers exist inside the thyristor immediately after energization ends, and forward recovery does not occur until these residual carriers disappear, and the forward recovery characteristics vary widely depending on the device. This is because the following problems occur. During a short reverse voltage period, elements that recover normally and elements that do not recover coexist (partial commutation failure phenomenon). As a result, the entire circuit voltage is applied only to the element that recovers normally, causing damage to that element. That is, (1) If a voltage with an abnormal forward recovery voltage is applied from the outside during the forward recovery process, the thyristor will self-ignite (or break over), and if the voltage or current is large at this time, it will be damaged. (2) In the case of series connection, there are variations in the forward recovery characteristics, so when a voltage with an abnormal forward recovery voltage is applied from the outside, the self-ignition will be inconsistent (partial commutation failure), and the phenomenon in (1) will occur. As a result, the number of cases of device damage increases. In order to prevent such abnormal phenomena, as mentioned above, (
1) At steady state, γ constant control, control where γ is above a certain value. (2) Forced ignition during a transient period - When γ<γ0 (predetermined value) occurs during a transient period, a pulse is forcibly supplied to all thyristor elements. etc. are controlled and protected. In the conventional forced ignition protection described above, a determination is made based on whether the margin angle γ is larger than a predetermined value γ0.

In other words, only the margin angle period is considered. However, forward voltage (commercial frequency) is applied to the thyristor converter after the margin angle, but if an overvoltage in the form of a lightning impulse or switching impulse is superimposed during this period, a phenomenon (partial commutation failure) may occur, resulting in a dangerous situation. This may lead to a situation where the device is damaged. This means that the margin angle γ is a predetermined value γ0 (approximately 400 μs to 600 μs > element turn-off time T
This is because even if the voltage is sufficiently larger than g), carriers remain inside the thyristor near the end of γ, and the thyristor cannot withstand a forward voltage higher than a certain voltage.

This phenomenon will be explained with reference to FIGS. 4 to 6. FIG. 4 shows the main circuit configuration of a thyristor converter used for DC power transmission, etc., and FIG. 5 shows details of the arm configuration of the converter itself. 1 is a thyristor converter, 2 is a converter transformer, and 3 is a smoothing DC reactor. With this configuration, the thyristor converter 1 converts power from alternating current to direct current or from direct current to alternating current. Since this type of thyristor converter 1 usually has a high voltage, it is composed of a large number of series thyristors 41 to 4N, as shown in FIG. (N
is the number of series, for example 100 to 200) 51 to 5N
is a voltage divider circuit to equalize each thyristor voltage, and 7
1 to 7N are light guides that transmit light ignition signals of the thyristors from a ground level gate control device (not shown). 61 to 6M are the di/dt and dv/d of the thyristor
This is a reactor for suppressing t. (M≦N)

0
007]

FIG. 6 shows an example in which an impulse-like overvoltage is applied to a thyristor converter having such a structure immediately after energization ends. FIG. 6 shows an example in which the converter in question is operated as an inverse converter, where (a) shows the arm voltage and (b) shows the arm current. Normally, the voltage and current waveforms are as shown by the solid line, and the thyristor converter can operate normally. (γ≧γ0)

[0008]
However, t=t1 (Δt=t1 −t0 approximately 0
~ several hundred μs), when an impulse-like overvoltage is applied as shown by the dotted line, each thyristor may not be able to withstand this overvoltage (V0) because carriers still remain in each thyristor (partial self-ignition = partial Commutation failure) This phenomenon is caused by V0
, dV0/dt, and the smaller Δt, the more likely it is to occur. Table 1 shows the results depending on the magnitude of V0, the magnitude of dV0/dt, and the magnitude of Δt.

[0009]

[Table 1]

Cases A and C do not cause excessive stress on the thyristor and require little protection. On the other hand, in case B, partial commutation failure occurs and some of the thyristors are damaged due to overvoltage. Therefore, in this case B, protection is absolutely necessary. However, in the conventional forced ignition protection, the margin angle γ was compared with a predetermined value γ0, and forced ignition was performed under the condition of γ≦γ0, but as shown in Fig. 6, a forward voltage was applied (t=t0). ) and beyond cannot be protected at all. Therefore, if an impulsive overvoltage enters during the period Δt (0 to several hundred μs), there is a risk of damaging some or all of the thyristor elements. The present invention provides a thyristor converter device that can protect the thyristor converter from such risks. [Structure of the invention]

[0011]

[Means for Solving the Problems] In order to achieve the above object, the present invention detects the forward voltage of each thyristor using a voltage detector provided on the high potential side of each thyristor, as shown in FIG. A means for sending forward voltage signals Fv1...FvN to a gate control device at ground level by a guide to generate an AND signal (FvA), and forward voltage signals Fv1...Fv
(1) If there is an Fv0 signal but no FvA signal within the protection period after the end of the conduction period PHS of the thyristor conversion device, the first Forced ignition signal FP
1 is generated. (Protection against normal γ deficiency)

(2) Conduction period P of the thyristor conversion device
After both Fv0 and FvA once become present within the protection period after the end of HS, when the FvA signal disappears due to overvoltage or the like, the second forced ignition signal FP2 is instantaneously generated. (protection when overvoltage intrudes). In both (1) and (2) above, protection is performed only for T=T1 (protection period) after the PHS signal disappears.

[0013]

[Operation] The above-described configuration provides (1) protection against partial commutation failure when γ is insufficient; (2) It is possible to protect against partial commutation failure when overvoltage enters, and it is possible to simultaneously provide conventional protection against gamma shortage and overvoltage protection immediately after commutation without adding any special equipment. can.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. 1, in which the same parts as in FIG. 5 are denoted by the same symbols. In the figure, 81 to 8N, 101 to 10N, 111 to 11
N is a light emitting element, a light guide, and a light receiving element for detecting the forward voltage signal of each thyristor at ground level, and 91 to 9N are diodes to prevent reverse voltage from being applied to the light emitting element, 121 ~12N is a light receiving amplifier for forward voltage signals. 13 and 14 are OR configurations of the forward voltage signals Fv1 to FvN of each thyristor, respectively;
These are an OR circuit and an AND circuit for an AND configuration. 1
5 and 16 are inverting circuits. 18 and 22 are monomulti circuits that output signals with pulse widths T1 and T2, respectively;
17 is an on-delay circuit having a delay time TD. 19 and 20 are AND circuits, 21 is an OR circuit, and 23 is a pulse amplifier circuit. 241 to 24N are light emitting elements that photoelectrically convert the output of the pulse amplifier circuit 23, and provide a forced firing signal to each thyristor through the light guides 71 to 7N. In such a configuration, within T=T1 time after PHS, FvA is "absent" and Fv0 is "present".
and Fv0 After TD Under the AND condition of the latter signal, the first
A forced ignition FP1 is generated. On the other hand, after PHS T=T
Within 1 hour, the second forced firing FP2 is generated under the conditions that Fv0 is "present" and FvA is "instantaneous from present to absent".

The first and second forced ignition signals FP1
, FP2 are all monomulti circuits 22 with a pulse width T
=T2 is converted into a forced ignition signal FP0' and input to the pulse amplifier circuit 23. Here, on-delay circuit 17
The time TD is determined as follows. Constant operation (
This is a time delay for correcting the time delay of each Fv (due to voltage imbalance, operational variation of the forward voltage detection circuit, etc.) at the commercial frequency), and is an approximate number depending on the applied thyristor converter constant, the performance of the forward voltage detection circuit, etc. It is about 10 μs to more than 100 μs. That is, this time TD is used to prevent the first forced firing FP1 signal, which is unstable in constant operation.

Next, the time T of the monomulti circuits 18 and 22
1, T2 will be explained. First, T1 is a protection period, which is determined corresponding to the time required for the thyristor to sufficiently recover its forward withstand voltage. T1 depends on the thyristor operating conditions, but in the case of high voltage and large current thyristors used for DC power transmission, it is approximately 500 to 1000μ.
s range.

Next, T2 is a pulse width that allows all thyristors to fire when a forced firing signal is given to each thyristor at the same time, and is approximately 30 μs to 50 μs.
s or more is sufficient.

The operation of the embodiment having such a configuration will be explained with reference to the time chart shown in FIG. FIG. 2 is divided into three operating modes. In mode (1), γ is also sufficiently large (γ>γ
o) is in a normal state with no overvoltage intrusion. Therefore, neither the first nor second forced ignition signals FP1 and FP2 are generated. In mode (2), γ is small (γ<γo
) state (however, there is no overvoltage intrusion) t = t1
In this example, Fv1 is detected, but FvN is not detected. Therefore, Fv0 is “1” and FvA is “0”
At time t=t1 +TD, the first forced firing signals FP1 and FP0' are generated. Mode (3) is γ
is sufficiently large (γ>γo), but overvoltage invades and t=
This is an example in which FvN changes from "1" to "0" at t2. Therefore, at t=t2, the output of the differentiating circuit 25 is "1"
, Fv0 becomes "1" and the second forced firing signal FP2
and FP0' signals are generated. That is, in mode (2), normal partial commutation failure protection when γ is insufficient, and in mode (3),
), partial commutation failure protection during overvoltage intrusion is achieved.

FIG. 3 shows the configuration of another embodiment of the present invention. 3, the difference from FIG. 1 is that the AND circuit 27 and dv
/dt (positive voltage increase rate applied to the thyristor) determination circuit 28 is only added. In this example, the Fv0 signal is used as the dv/dt input. (If necessary, the dv/dt of the thyristor converter arm or the dv/dt of the thyristor of the arm is independently detected and input to the discrimination circuit 28.) The input of the AND circuit 27 is dv/dt. dt
28, the output of the mono multi circuit 18, and Fv0. That is, within the protection period (T1) after the end of the PHS signal, the dv
/dt signal “present” (=dv/dt is above a predetermined value) and Fv
0, a third forced ignition signal FP3 is generated under the condition of ``present'', and as a result, FP0' is generated, and the thyristors are ignited all at once.

According to another embodiment of the invention, the protection period (T
1) The third forced ignition signal can be generated without delay in partial commutation failure when overvoltage (lightning, switching impulse, etc.) enters. To prevent a protection delay due to a delay in the on-delay TD of a generating circuit for generating the first forced ignition signal FP1 in Fig. 1, especially when a positive lightning or switching impulse is applied while a reverse voltage is applied to the thyristor. Can be done.

[0021] The dv/dt discrimination circuit detects the difference between 2 and 3 dv/dt during normal operation (when there is no overvoltage).
It may be set to about double or more. Note that the FvA signal is
Although it was explained as an AND signal of v (Fv1 ~ FvN), from the viewpoint of unstable operation or considering that the thyristor is damaged with probability, the output signal is set under the conditions of N-1 or N-2 out of N. You may also choose to release it.

[0022]

As explained above, according to the present invention, the conventional partial commutation failure protection when γ is insufficient and the partial commutation failure protection when overvoltage enters can be reliably achieved with a relatively simple configuration. be able to. That is, recent thyristor converters for DC power transmission typically use the Fv signal of each thyristor for ignition. Furthermore, since the Fv signal of each thyristor is used for thyristor failure monitoring, there is no need to add an Fv detection circuit to all the thyristors for the purpose of the present invention. Furthermore, all of the logic decisions for the partial commutation failure protection of the present invention can be implemented in a relatively simple circuit within the ground level gate control device. In addition, the partial commutation failure protection of the present invention due to insufficient γ is not prospective protection based on conventional margin angle monitoring, but is protection based on actual partial commutation failure detection. can sometimes be reliably protected.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing an embodiment of the present invention.

FIG. 2 is a time chart diagram for explaining the operation of the present invention.

FIG. 3 is a configuration diagram showing another embodiment of the present invention.

FIG. 4 is a main circuit configuration diagram of a thyristor converter.

FIG. 5 is a configuration diagram of an arm of a thyristor converter.

FIG. 6 is a diagram for explaining partial commutation failure when overvoltage enters during inverter operation.

[Explanation of symbols]

41 to 4N...Thyristor, 51 to 5N...Voltage dividing circuit, 61 to 6M...Reactor, 71 to 7N, 1
01 ~10N...Light guide, 81 ~8N, 2
41 to 24N...Light emitting element, 91 to 9N...Diode, 111 to 11N...Light receiving element, 121 to 12
N... Light receiving amplifier, 13, 21... OR circuit, 14, 19,
20...AND circuit, 15, 16...inverting circuit, 17...on delay circuit, 18, 22...mono multi circuit, 23...pulse amplifier, Fv0...Fv OR signal, FvA...Fv AND signal, PHS...conduction period signal, FP1, FP2,F
P0,FP0'...forced ignition signal, 25...differentiation circuit,
26...Gate control device, 27...AND circuit, 28...dv
/dt discrimination circuit.

Claims (2)

[Claims] 1. A thyristor conversion device comprising an arm of thyristors in series or parallel, comprising: a forward voltage detection means for detecting a forward voltage signal of a thyristor provided in each thyristor unit or a specific thyristor unit; forward voltage OR signal calculating means for generating an OR signal of the forward voltage signals from the forward voltage detecting means; forward voltage AND signal calculating means for generating an AND signal of the forward voltage signals from the forward voltage detecting means; and a conduction period of the thyristor conversion device. The condition of being within the protection period after termination, the previous forward voltage OR signal, and the forward voltage O
means for generating a first forced firing signal based on an AND condition of the on-delay signal of the R signal and the forward voltage AND signal; and a condition that the thyristor conversion device is within a protection period after the conduction period ends. , a thyristor conversion device comprising means for generating a second forced firing signal under an AND condition of a differential signal of an inverted signal of the forward voltage AND signal and the forward voltage OR signal. 2. A thyristor conversion device comprising an arm of thyristors in series or parallel, comprising: forward voltage detection means for detecting a forward voltage signal of a thyristor provided in each thyristor unit or a specific thyristor unit; Forward voltage OR signal calculation means for generating an OR signal of forward voltage signals from the forward voltage detection means; Forward voltage AND signal calculation means for generating an AND signal of forward voltage signals from the forward voltage detection means; - a dV/dt determination means provided in the system for determining whether dV/dt is a predetermined times larger than that in constant operation; a condition that the thyristor conversion device is within the protection period after the conduction period ends; and the previous forward voltage OR. means for generating a first forced firing signal under an AND condition of the on-delay signal of the forward voltage OR signal and the forward voltage AND signal; means for generating a second forced firing signal under an AND condition of a differential signal of an inverted signal of the forward voltage AND signal and the forward voltage OR signal; and an end of the conduction period of the thyristor conversion device. The condition that the latter is within the protection period, that dV/dt is a predetermined times larger than that of constant operation, and the A of the above-mentioned forward voltage OR signal.
A thyristor conversion device comprising means for generating a third forced firing signal under an ND condition.