JPH04320357A - Wiring board and manufacture thereof - Google Patents

Wiring board and manufacture thereof

Info

Publication number
JPH04320357A
JPH04320357A JP3088100A JP8810091A JPH04320357A JP H04320357 A JPH04320357 A JP H04320357A JP 3088100 A JP3088100 A JP 3088100A JP 8810091 A JP8810091 A JP 8810091A JP H04320357 A JPH04320357 A JP H04320357A
Authority
JP
Japan
Prior art keywords
wiring board
film
insulating film
wiring
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3088100A
Other languages
Japanese (ja)
Other versions
JP3143948B2 (en
Inventor
Yoshio Honma
喜夫 本間
Shinichi Minami
眞一 南
Kazuhiro Komori
小森 和宏
Akiko Mutou
武藤 朗子
Kenji Hinode
憲治 日野出
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP03088100A priority Critical patent/JP3143948B2/en
Publication of JPH04320357A publication Critical patent/JPH04320357A/en
Application granted granted Critical
Publication of JP3143948B2 publication Critical patent/JP3143948B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To suppress production of dust particle by employing such insulating film as the additive contained therein exists only in the form of compound of silicon or oxygen in the vicinity of the surface of the insulating film and setting the minimum milling dimensions of elements mounted on a wiring board lower than a predetermined value. CONSTITUTION:Such insulating film is employed as the additives contained therein exist only in the form of a compound of silicon or oxygen at least in the vicinity of the surface of the film or the concentration of the additive on the surface of the insulating film is equal to or lower than that at other parts in the film. Furthermore, minimum milling dimensions of elements mounted on a wiring board are set smaller than 0.8mum. At first, a BPSG film is formed and subjected to heat treatment for fluidisation. It is then processed in hydrogen environment in order to stabilize the characteristics or enhance the reliability, followed by oxidization process.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は微細な導体配線パターン
を形成するに好適な配線基板およびその製造方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board suitable for forming fine conductor wiring patterns and a method of manufacturing the same.

【0002】0002

【従来の技術】半導体集積回路や配線基板の高密度に伴
って、半導体素子などの相互接続に用いる配線もしくは
そのための配線基板についても微細化,高密度化の要求
が高まっている。複数層の配線を有する、高密度の配線
基板を形成するための最大の課題の一つが配線の積層に
ともなって大きくなる段差による悪影響を如何にして克
服するか、であることは良く知られている。例えば、ジ
ャーナル・オブ・エレクトロケミカル・ソサィエティの
第135巻第10号、2557−2562ページ(19
88年発行)(J. Electrochem. So
c. Vol. 135 No.10, p2557−
p2562  1988)の論文には、プレーナマグネ
トロンカソードを用いたバイアススパッタ法によって下
地段差を吸収して表面が平坦なSiO2 膜を形成する
ことにより、高密度のアルミニウム合金(以下Alと記
す)からなる2層の配線を形成する技術について述べら
れている。これらはAlの融点よりも十分に低い温度で
保護絶縁膜を形成しようとするものである。
2. Description of the Related Art As the density of semiconductor integrated circuits and wiring boards increases, there is an increasing demand for miniaturization and higher density of wiring used for interconnection of semiconductor elements and wiring boards therefor. It is well known that one of the biggest challenges in forming a high-density wiring board with multiple layers of wiring is how to overcome the negative effects of the height difference that increases as the wiring is stacked. There is. For example, Journal of the Electrochemical Society, Vol. 135, No. 10, pp. 2557-2562 (19
Published in 1988) (J. Electrochem. So
c. Vol. 135 No. 10, p2557-
p. 2562 (1988) describes that a SiO2 film made of a high-density aluminum alloy (hereinafter referred to as Al) was formed by absorbing the underlying level difference and forming a SiO2 film with a flat surface by a bias sputtering method using a planar magnetron cathode. Techniques for forming layer wiring are described. These are intended to form a protective insulating film at a temperature sufficiently lower than the melting point of Al.

【0003】これに対して配線導体層が金属の珪化物(
以下シリサイドと記す)等の、より高融点の材料からな
る場合、これらを被覆する絶縁膜の形成もしくはその安
定化の為に、より高い温度を用いることができる。ただ
し、素子特性への影響を少なくする為には、やはり熱処
理温度はできるだけ低い方が望ましい。
On the other hand, the wiring conductor layer is made of metal silicide (
When the material is made of a material with a higher melting point such as silicide (hereinafter referred to as silicide), a higher temperature can be used to form or stabilize an insulating film covering the material. However, in order to reduce the influence on device characteristics, it is desirable that the heat treatment temperature be as low as possible.

【0004】この様な比較的高温で形成され、広く利用
されている絶縁膜として代表的なものにリン(P)およ
びボロン(B)を添加物として含むガラス(Boro 
Phospho−Silicate Glass。以下
、BPSGと記す)が知られており、平坦化効果を有す
る素子や金属の珪化物(シリサイドとよばれる)や多結
晶Siなどからなる配線の保護膜として広く用いられて
いる。一般にはPやBを添加しながら集積回路用素子や
配線の上に化学気相成長法(以下、CVD法と記す)に
よって膜を形成した後、850〜950℃の範囲で熱処
理すると膜が流動し、表面が平坦化する。
A typical insulating film that is formed at a relatively high temperature and is widely used is glass containing phosphorus (P) and boron (B) as additives.
Phospho-Silicate Glass. BPSG (hereinafter referred to as BPSG) is known and is widely used as a protective film for elements having a flattening effect and wiring made of metal silicide (referred to as silicide), polycrystalline Si, or the like. In general, a film is formed by chemical vapor deposition (hereinafter referred to as CVD) on integrated circuit elements or wiring while adding P or B, and then heat-treated in the range of 850 to 950°C to cause the film to flow. The surface becomes flat.

【0005】またPやB以外にも、ゲルマニウム(Ge
),砒素(As)、などの添加物を加えると更に流動化
のために必要な温度を低下させられると考えられている
。さらに、素子の特性向上や安定化の為に、水素を含む
雰囲気(以下、水素雰囲気と記す)中で熱処理を施す場
合もある。この水素雰囲気中の熱処理により、素子に用
いられているSiN膜などの窒素を含むSi化合物の層
や高融点材料からなる配線の電気特性が改善されるため
である。さらに基板表面の必要箇所に接続孔を形成して
、素子と配線もしくは配線と配線との接続をはかる。
In addition to P and B, germanium (Ge
), arsenic (As), etc., are believed to further reduce the temperature required for fluidization. Furthermore, in order to improve and stabilize the characteristics of the element, heat treatment may be performed in an atmosphere containing hydrogen (hereinafter referred to as hydrogen atmosphere). This is because this heat treatment in a hydrogen atmosphere improves the electrical characteristics of a layer of a Si compound containing nitrogen, such as a SiN film, and wiring made of a high melting point material used in the element. Further, connection holes are formed at necessary locations on the surface of the substrate to connect elements and wiring or wiring to wiring.

【0006】[0006]

【発明が解決しようとする課題】しかるに、上記従来技
術で形成されたBPSG膜中に接続孔を形成するために
フッ酸を含むエッチ液を用いたり、接続孔を形成した後
、上層の配線層を形成する前処理としてフッ酸を含む液
によってライトエッチすると、基板表面には不定形の粒
子が異物として残留することがわかった。この異物はP
の濃度のみでなく、Bの濃度によっても発生状況が変わ
る。一般にB濃度が高くなると異物は大きくなる傾向を
示す。また、この異物はエッチ後の基板の洗浄や乾燥の
方法に依存して様々な形状となって残留する。従来用い
られていた、基板の回転乾燥機の様に、基板を回転させ
ることによって乾燥させる効果を主体とする乾燥方法を
用いた場合には、一般に異物は小さい。また、一般には
非常に微細でありかつ厚さも薄いために、白色光源を用
いる光学顕微鏡によってはBPSG膜自身の干渉色と区
別して異物を観察することは困難である。かなり発生の
度合いが激しい場合でも、色むらとなって見える程度で
、エッチ深さのばらつきとして判断されてしまう場合が
ほとんどであり、異物の発生は必ずしも知られていなか
った。また、従来の配線基板では配線や接続孔がそれほ
ど小さくなかった為に、これらの異物が存在してもただ
ちには不良発生とは結びつかなかった。
[Problems to be Solved by the Invention] However, it is difficult to use an etchant containing hydrofluoric acid to form contact holes in the BPSG film formed by the above-mentioned conventional technique, or to remove the upper wiring layer after forming the contact holes. It was found that when light etching is performed with a solution containing hydrofluoric acid as a pretreatment for forming a substrate, irregularly shaped particles remain as foreign matter on the substrate surface. This foreign object is P
The occurrence situation changes not only depending on the concentration of B but also on the concentration of B. Generally, as the B concentration increases, foreign particles tend to become larger. Moreover, this foreign material remains in various shapes depending on the method of cleaning and drying the substrate after etching. When using a drying method that mainly dries the substrate by rotating it, such as a conventional rotary dryer for substrates, the foreign matter is generally small. Further, since foreign substances are generally very fine and thin, it is difficult to observe foreign substances by distinguishing them from the interference color of the BPSG film itself using an optical microscope using a white light source. Even when the degree of occurrence of foreign matter is quite severe, in most cases it is only visible as uneven color and is determined to be a variation in etch depth, and the occurrence of foreign matter is not necessarily known. Furthermore, since the wiring and connection holes in conventional wiring boards were not so small, the presence of these foreign substances did not immediately lead to the occurrence of defects.

【0007】しかしながら、近年になって、基板の大型
化や、基板を回転させると空気中の異物が付着し易いこ
とが知られるようになったために、回転乾燥法に代わっ
て、加熱もしくは蒸気,ガスによる乾燥方法を用いる場
合が多くなった。この様な乾燥法を用いると異物は大き
くなる傾向にあり、通常の光学顕微鏡によっても観察さ
れるほど極度に大型化する場合もあり、また、配線基板
に用いられる半導体集積回路用素子や配線の加工寸法が
微細化するとこれら異物の存在が配線の剥離や電気的導
通不良(接続抵抗の増加やばらつきの増加が主体)の原
因となり、その存在は無視できないものとなった。加え
て、これらの異物の一部はエッチ液や洗浄液槽の内部に
浮遊し、他の基板のエッチや洗浄の際にそれらに付着し
、不良発生の原因となることが判明した。
However, in recent years, as substrates have become larger and it has become known that rotating substrates tends to attract foreign matter in the air, heating, steam, or Drying methods using gas are increasingly used. When this type of drying method is used, foreign particles tend to grow in size, sometimes so large that they can be observed even with a normal optical microscope. As processing dimensions become finer, the presence of these foreign substances causes peeling of wiring and poor electrical continuity (mainly due to increased connection resistance and variation), and their presence cannot be ignored. In addition, it has been found that some of these foreign substances float inside the etching liquid or cleaning liquid tank and adhere to other substrates during etching or cleaning, causing defects.

【0008】なお、この様にして発生した異物は水分の
存在する雰囲気中に長時間保存しておくと、次第に反応
して酸化物となる。この様な状態になると、一見して異
物が消失したかの状態を呈するが、実際には膜表面に異
物が空気中の水分などと反応して形成されたと思われる
薄い層として付着し、残存しているために、この上に配
線金属層を設けると腐食の原因となるなど、やはり配線
の信頼性低下の原因となることがわかった。この様に、
配線の微細化にともなって従来のBPSG膜をエッチし
た際に発生する異物は不良発生の大きな原因となりつつ
あり、この問題の解決は今後重要さを増すと考えられる
[0008] If the foreign matter generated in this way is stored for a long time in an atmosphere containing moisture, it will gradually react and become an oxide. In such a state, it appears that the foreign matter has disappeared, but in reality, the foreign matter adheres to the membrane surface as a thin layer that is thought to have been formed by reacting with moisture in the air, and the remaining foreign matter appears to have disappeared. Because of this, it was found that providing a wiring metal layer on top of this would cause corrosion, which would reduce the reliability of the wiring. Like this,
As wiring becomes finer, foreign particles generated when etching conventional BPSG films are becoming a major cause of defects, and solving this problem is thought to become more important in the future.

【0009】なお、発明者らはこの異物は水やフッ酸を
含む液には溶けないものの、適切なエッチ液を選べば溶
解させられることを見いだした。例えば、BPSG膜を
エッチした際の異物は、硝酸やアンモニア水には溶解す
る。従って接続孔形成の際に発生する異物はこれらの液
を用いて膜表面を洗浄すれば除くことができる。ただし
、孔の底部に露出した基板や下層配線の表面はこれらの
液と反応して変質し、後で形成する上層配線との電気的
接続特性の劣化を招く場合がある。従って、再度フッ酸
を含む液でライトエッチする事が望ましいが、異物も再
度発生してしまう。素子が微細化し、その接続孔も微小
になった場合はやはり障害となる。
The inventors have discovered that although this foreign material is not soluble in water or a solution containing hydrofluoric acid, it can be dissolved by selecting an appropriate etchant. For example, foreign substances generated when a BPSG film is etched are dissolved in nitric acid or aqueous ammonia. Therefore, foreign matter generated during formation of the connecting hole can be removed by cleaning the membrane surface using these liquids. However, the surfaces of the substrate and lower layer wiring exposed at the bottom of the hole may react with these liquids and change in quality, resulting in deterioration of electrical connection characteristics with upper layer wiring to be formed later. Therefore, it is desirable to perform light etching again using a solution containing hydrofluoric acid, but foreign matter will be generated again. When devices become smaller and their connection holes become smaller, this becomes a problem.

【0010】なお、水素雰囲気中のアニールを施さない
場合は、Pが還元される事はなく、従ってフッ酸系のエ
ッチ液による異物の発生も見られないが、後述のXPS
分析法を用いるとやはり表面に高濃度の酸化もしくは化
合状態のPを含む層が存在する事がわかった。この様な
Pを高濃度に含む層が存在すると、その上に形成された
配線層は腐食したり、接着性が劣化したりする可能性が
高くなる。
Note that if annealing in a hydrogen atmosphere is not performed, P will not be reduced, and therefore no foreign matter will be generated due to the hydrofluoric acid etchant.
Using an analytical method, it was found that a layer containing a high concentration of oxidized or combined P was present on the surface. If such a layer containing a high concentration of P exists, there is a high possibility that the wiring layer formed thereon will corrode or the adhesiveness will deteriorate.

【0011】Pの他にはゲルマニウム(Ge),砒素(
As),アンチモン(Sb),モリブデン(Mo),タ
ングステン(W)の少なくともいずれか一者が含まれて
いる場合にもほぼ同様な現象が起こることを確認した。
In addition to P, germanium (Ge) and arsenic (
It was confirmed that almost the same phenomenon occurs when at least one of As), antimony (Sb), molybdenum (Mo), and tungsten (W) is included.

【0012】本発明の目的は、上記添加物を含む絶縁膜
を有する配線基板において、該絶縁膜のエッチの際の異
物発生が抑制された配線基板およびその製造方法を提供
することにある。
An object of the present invention is to provide a wiring board having an insulating film containing the above-mentioned additives, in which generation of foreign matter during etching of the insulating film is suppressed, and a method for manufacturing the same.

【0013】[0013]

【課題を解決するための手段】上記目的は、P,Ge,
As,Sb,Mo,Wからなる群から選ばれた少なくと
も一種類の物質(以下、選ばれた物質を添加物と記す)
を含む絶縁膜が少なくとも一部に被着された配線基板に
おいて、該絶縁膜中に含まれる添加物が少なくとも膜表
面の近傍において実質的にすべてシリコン(以下、Si
と記す)や酸素との化合物として存在しているか、もし
くは該添加物を含む該絶縁膜の表面の該添加物の濃度が
膜の内部の他の部分の濃度と同等以下である絶縁膜が用
いられており、かつ該配線基板に含まれる素子の最小加
工寸法が0.8μm以下である配線基板により達成され
る。なお、上記の膜表面の近傍とは、その上に形成され
る配線層の被着の前処理のフッ化水素を含む液(以下、
フッ酸と記す)を用いてエッチされる膜表面からの深さ
と同程度の部分を指す。通常は10−50nmの範囲で
ある場合が多い。近年の高集積化された集積回路におい
てはこの深さは浅くなる傾向にある。配線層形成前の状
態において、該絶縁膜の少なくとも表面近傍において添
加物は化合状態にあることが特徴である。それよりも深
い部分においてはやはり添加物は化合状態にある方が製
造工程上安定であるが、非化合状態にあっても良い。
[Means for solving the problem] The above purpose is to
At least one substance selected from the group consisting of As, Sb, Mo, and W (hereinafter, the selected substance will be referred to as an additive)
In a wiring board on which at least a portion of an insulating film containing a
(denoted as ) or as a compound with oxygen, or an insulating film is used in which the concentration of the additive on the surface of the insulating film containing the additive is equal to or lower than the concentration in other parts of the film. This is achieved by a wiring board in which the minimum processing dimensions of elements included in the wiring board are 0.8 μm or less. Note that the vicinity of the film surface mentioned above refers to a solution containing hydrogen fluoride (hereinafter referred to as "hydrogen fluoride-containing solution") used for pretreatment of depositing a wiring layer to be formed thereon.
Refers to the same depth from the film surface that is etched using hydrofluoric acid (denoted as hydrofluoric acid). Usually, it is in the range of 10-50 nm in many cases. In recent years, this depth tends to become shallower in highly integrated circuits. The additive is characterized in that it is in a combined state at least near the surface of the insulating film before the wiring layer is formed. In a deeper part, it is more stable for the manufacturing process if the additive is in a combined state, but it may be in an uncombined state.

【0014】さらに、上記目的は、配線基板に用いられ
る上記添加物を含む絶縁膜を形成する工程と、還元性雰
囲気中で該基板を熱処理する工程と、その後該基板を酸
化処理する工程とを有する配線基板の製造方法により達
成される。
Furthermore, the above object includes the steps of forming an insulating film containing the additive used in a wiring board, heat-treating the board in a reducing atmosphere, and then oxidizing the board. This is achieved by a method of manufacturing a wiring board having the following method.

【0015】[0015]

【作用】一般にSi酸化膜(SiO2 膜)中のPは膜
中に固溶(Siと直接に結合)しているものを除き、過
剰の分はP2O5等の酸化物として存在すると信じられ
てきた。しかし、発明者らはこの考え方が必ずしも正し
くないことを見いだした。
[Function] It has been generally believed that the excess P in Si oxide films (SiO2 films) exists as oxides such as P2O5, except for those that are solidly dissolved in the film (bonded directly with Si). . However, the inventors have discovered that this idea is not necessarily correct.

【0016】半導体集積回路用素子等を含む配線基板に
おいては能動素子や配線が微細化されるにつれて、その
特性安定化,信頼性向上の為に、BPSG膜形成後に水
素を含む雰囲気中で熱処理を施すことが必要となってき
た。特に素子(能動素子や配線を含む)の一部に窒素を
含む化合物、例えばSiの窒化物(窒化珪素膜;SiN
と記す)、Siの窒化酸化物(オキシナイトライド物)
が用いられている場合、これらの窒素を含む化合物から
なる薄膜を水素を含む雰囲気中で熱処理すると電気絶縁
性の向上や、漏れ電流の低減が実現されるためである。 ところがその反面、発明者らはこの様な熱処理を施され
たBPSG膜中のPの一部は還元されて実質的にPに相
当する不安定な物質(以下、非酸化のPと記す)に変化
してしまう事を見いだした。さらに他の添加物が加えら
れた膜の場合にはやはりそれらが還元されて非酸化状態
となり、エッチの際に膜表面に残存する事を見いだした
As active elements and wiring become finer in wiring boards including semiconductor integrated circuit elements, etc., heat treatment in an atmosphere containing hydrogen is required after forming the BPSG film in order to stabilize the characteristics and improve reliability. It has become necessary to do so. In particular, some elements (including active elements and wiring) may contain nitrogen-containing compounds, such as Si nitride (silicon nitride film; SiN).
), Si nitride oxide (oxynitride)
This is because when these nitrogen-containing compounds are used, heat treatment of a thin film made of these nitrogen-containing compounds in an atmosphere containing hydrogen improves electrical insulation and reduces leakage current. However, on the other hand, the inventors found that some of the P in the BPSG film subjected to such heat treatment was reduced to an unstable substance substantially equivalent to P (hereinafter referred to as non-oxidized P). I found out that things are changing. Furthermore, in the case of films to which other additives were added, they were found to be reduced to a non-oxidized state and remain on the film surface during etching.

【0017】この様なBPSG膜をフッ化水素水溶液(
以下フッ酸と記す。通常は50%の水溶液として供給さ
れている)を含む液でエッチすると膜表面にエッチ残渣
が発生したり、もしくはPの濃度の高い薄い層が形成さ
れる。これらの残渣もしくは表面のP濃度の高い層は、
配線基板の信頼性を大幅に損なうことも見いだした。本
発明は以上に述べたように、絶縁膜に含まれるPなどの
添加物が実質的にすべてSiや酸素などとの化合物とし
て存在し、非酸化のPの状態では含まれない膜となって
いることを特徴とする。加えて、この様なBPSG膜や
その他の添加物を含む膜の表面近傍の添加物の濃度が、
膜内部の他の部分の濃度以下であることを特徴とする。 さらに、この様なBPSG膜を実現し、さらに配線基板
の製造を良品率が高く、かつ効率よく行える処理機能を
備えた装置を提供することを特徴とする。以上に詳しく
説明したPの他に、添加物がGe,As,Sb,Moで
ある場合もほぼ同等の化学的状態の変化を示し、また本
発明の方法によって問題を解決できる事を見いだした。 なお、酸化処理の条件について述べると、酸素濃度が高
い方が、また酸化処理時間が長い方が、さらにその温度
の高い方が、添加物を酸化させる効果が深くまでおよぶ
。一般には酸素濃度が5%以上、処理温度は430℃以
上、時間が20分以上であれば、20nm程度の深さま
での間に含まれる添加物を酸化することができる。
[0017] Such a BPSG film was coated with a hydrogen fluoride aqueous solution (
Hereinafter referred to as hydrofluoric acid. When etching with a solution containing (usually supplied as a 50% aqueous solution), an etch residue is generated on the film surface or a thin layer with a high concentration of P is formed. These residues or layers with high P concentration on the surface are
It was also found that the reliability of wiring boards was significantly impaired. As described above, in the present invention, substantially all of the additives such as P contained in the insulating film exist as compounds with Si, oxygen, etc., and the film does not contain P in the non-oxidized state. It is characterized by the presence of In addition, the concentration of additives near the surface of such BPSG films and films containing other additives is
It is characterized by a concentration lower than that of other parts inside the membrane. Furthermore, it is a feature of the present invention to provide an apparatus that realizes such a BPSG film and has a processing function that allows manufacturing of wiring boards with a high yield rate and with high efficiency. It has been found that in addition to P as described in detail above, when the additive is Ge, As, Sb, or Mo, almost the same change in chemical state is exhibited, and the problem can be solved by the method of the present invention. Regarding the conditions of the oxidation treatment, the higher the oxygen concentration, the longer the oxidation treatment time, and the higher the temperature, the deeper the effect of oxidizing the additives. Generally, if the oxygen concentration is 5% or more, the treatment temperature is 430° C. or more, and the time is 20 minutes or more, it is possible to oxidize the additives contained within a depth of about 20 nm.

【0018】ただし、所定の配線形成後にさらに水素雰
囲気中の熱処理を行う事によって結合された添加物の一
部を非酸化の状態に変換しても良いが、この様な膜の表
面では膜の内部と比較すると、添加物の濃度は低減され
ている。
However, some of the bonded additives may be converted into a non-oxidized state by further performing heat treatment in a hydrogen atmosphere after the formation of the predetermined wiring; however, on the surface of such a film, Compared to the interior, the concentration of additives is reduced.

【0019】添加物が化合物として絶縁膜中に存在する
場合は、膜中の添加物の化合物はフッ酸系の液によるエ
ッチの際に、液中に溶出してしまうために、異物として
基板表面に集積することはない。この様な膜を用いるこ
とにより、従来は良品率が低下する傾向の強かった、最
小加工寸法が0.8μm 以下の配線や半導体集積回路
を含む配線基板についても殆ど良品率を低下させること
なく製造することが可能となる。
If the additive is present as a compound in the insulating film, the additive compound in the film will be eluted into the solution during etching with a hydrofluoric acid solution, so that it will be deposited on the substrate surface as foreign matter. It does not accumulate in By using such a film, it is now possible to manufacture wiring boards containing wiring and semiconductor integrated circuits with a minimum processing size of 0.8 μm or less, with almost no decrease in the yield rate, which previously had a strong tendency to decrease. It becomes possible to do so.

【0020】代表的な例としてBPSG膜を例に取って
説明する。絶縁膜に添加する材料としてはPが最も広く
用いられており、かつその濃度も高いために、本発明の
効果も大きいためである。
[0020] As a typical example, a BPSG film will be explained. This is because P is the most widely used material added to insulating films and has a high concentration, so the effects of the present invention are large.

【0021】化学気層成長法(以下、CVD法と記す)
によって形成した直後のBPSG膜中のBやPの状態に
ついては従来、詳しい解析結果がみられない。BPSG
膜は形成しただけの状態では不安定であり、平坦化効果
もないために、一般には配線基板の製造過程の適当な段
階で流動化のための高温の熱処理を施すことは前述の通
りである。この熱処理雰囲気は還元性(水素を主に含む
雰囲気;水素雰囲気と記している)や酸化性、もしくは
不活性ガス雰囲気のいずれでも良い。しかるに一般に酸
化性雰囲気を用いて熱処理した場合には、界面準位や漏
れ電流(リーク電流)の増加など、配線基板中の集積回
路用素子の特性劣化を招くことがわかった。これは主と
して素子に用いられたSiN膜や高融点材料配線層の電
気的特性が劣化するためである事がわかった。この窒化
珪素膜などの劣化によって例えば、トランジスタ特性の
劣化や不揮発性メモリ素子の記憶特性劣化,メモリ素子
に用いられるキャパシタの電荷保持特性の劣化,さらに
は隣接高融点材料配線の漏れ電流の増加などが起こる。 従って流動化の熱処理雰囲気は還元性雰囲気を用いるか
、もしくは流動化の熱処理後に、再度還元性雰囲気の熱
処理を行うことが必要となる。一般に温度は600℃以
上が用いられる。しかるに前述の様に、この様な還元性
の雰囲気で比較的高温の熱処理を行うと、BPSG膜中
のPの一部は母材であるSiと結合しているものを除き
、非酸化のPに変化し、水やフッ酸に対して難溶となる
。この様な膜をフッ酸系のエッチ液を用いてその表面を
エッチすると、膜表面には非酸化のPを主成分とした異
物もしくはPの濃度の高い層が形成される。しかしなが
ら、この層は従来は異物として殆ど認識されることがな
かった。これらの異物は微小もしくは薄いために通常の
白色光源を用いた顕微鏡による観察によっては殆ど検知
できなかったためである。これに対して、発明者らは単
色の光源を用いて観察したところ、同一倍率であっても
、異物が容易に観察できることを見いだした。また、B
PSG膜中のP濃度を4mol% 以下とすればこの様
な異物の発生は抑制できることも見いだした。一般にS
iO2 中に固溶できるPの濃度は4mol% とされ
ている現象と一致する。ただし、4mol% 以下のP
を含むBPSG膜では流動化を起こさせることが困難で
、平坦化の為に用いるには適していない。
[0021] Chemical vapor deposition method (hereinafter referred to as CVD method)
Until now, there have been no detailed analysis results regarding the state of B and P in the BPSG film immediately after it is formed. BPSG
As mentioned above, the film is unstable and has no flattening effect when it is just formed, so high-temperature heat treatment for fluidization is generally performed at an appropriate stage in the wiring board manufacturing process. . This heat treatment atmosphere may be a reducing (atmosphere mainly containing hydrogen; referred to as a hydrogen atmosphere), an oxidizing atmosphere, or an inert gas atmosphere. However, it has been found that heat treatment in an oxidizing atmosphere generally leads to deterioration of the characteristics of integrated circuit elements in the wiring board, such as an increase in interface states and leakage current. It has been found that this is mainly due to the deterioration of the electrical characteristics of the SiN film and high melting point material wiring layer used in the device. This deterioration of the silicon nitride film causes, for example, deterioration of transistor characteristics, deterioration of storage characteristics of nonvolatile memory elements, deterioration of charge retention characteristics of capacitors used in memory elements, and even an increase in leakage current of adjacent high-melting point material wiring. happens. Therefore, it is necessary to use a reducing atmosphere as the heat treatment atmosphere for fluidization, or to perform heat treatment in a reducing atmosphere again after the heat treatment for fluidization. Generally, a temperature of 600°C or higher is used. However, as mentioned above, when heat treatment is performed at a relatively high temperature in such a reducing atmosphere, some of the P in the BPSG film becomes non-oxidized P, except for that bonded to the base material Si. It becomes slightly soluble in water and hydrofluoric acid. When the surface of such a film is etched using a hydrofluoric acid-based etchant, foreign matter mainly composed of non-oxidized P or a layer with a high concentration of P is formed on the film surface. However, this layer has heretofore been hardly recognized as a foreign substance. This is because these foreign substances are so small or thin that they can hardly be detected by observation using a microscope using a normal white light source. In contrast, when the inventors observed using a monochromatic light source, they found that foreign matter could be easily observed even at the same magnification. Also, B
It has also been found that the generation of such foreign substances can be suppressed by setting the P concentration in the PSG film to 4 mol% or less. Generally S
This coincides with the phenomenon that the concentration of P that can be dissolved in iO2 is 4 mol%. However, P below 4 mol%
It is difficult to cause fluidization in a BPSG film containing .

【0022】これに対して本発明では、同一のPやBを
含む膜であっても、少なくとも絶縁膜の表面近傍部分で
はPを実質的に完全に酸化物もしくは水酸化物の状態と
して膜中に分布させる為に、配線金属層の形成前処理と
してフッ酸系の液によるエッチ処理を行っても異物を発
生させることがない。この様な膜とするための一つの方
法の例を、図1に示す。同図において、まず第1にBP
SG膜を形成する。次に流動化の為の熱処理を行う。第
3番目に特性安定化もしくは高信頼化のための水素雰囲
気中の雰囲気熱処理を行う。第4番目に本発明の特徴で
ある酸化処理を行う。処理条件としては、700℃以下
の、望ましくは650℃以下の温度で、酸化性雰囲気の
中で膜に熱処理を施すことに相当する酸化処理を行って
BPSG膜中の不安定なPを酸化してしまう。酸化性熱
処理雰囲気としては少なくとも酸素濃度は1%以上、望
ましくは20%以上のガスを用いる。熱処理温度は40
0℃以上であれば少なくとも有効であり、430℃以上
が特に望ましいことが確認された。この様な比較的低温
の熱処理を行うことにより、非酸化のPは酸化され、安
定な状態で膜中に存在し続ける。フッ酸系等のエッチ液
でエッチされた場合も異物となって発生することはない
。膜表面にP濃度の高い層が形成されることもない。 なお、熱処理温度は可能な限り低いことが望ましい。酸
化性雰囲気での熱処理温度が高くなると、流動化の場合
の熱処理と同様に、素子の特性劣化を招き、せっかくの
還元性雰囲気下の熱処理の効果を減じてしまう。これに
対して650℃以下の温度であればそのような特性劣化
は無視し得る程に少なくなり、400〜450℃にまで
低下させると、特性劣化は殆ど見られなくなる。同様に
、実質的に400℃程度で酸化性の雰囲気に相当する処
理、例えば基板を加熱しながら酸化プラズマ処理を施す
などの手段、を用いれば同等の効果が得られる。もう一
つの手法としては300℃程度に基板を加熱し、これに
オゾンや必要に応じて紫外光を照射する方法も有効であ
る。また酸素やオゾンに代えて酸素を含むガスのプラズ
マを用いても良い。
On the other hand, in the present invention, even if the films contain the same P and B, at least in the vicinity of the surface of the insulating film, P is substantially completely converted into an oxide or hydroxide in the film. Even if an etching treatment using a hydrofluoric acid solution is performed as a pre-treatment for forming the wiring metal layer in order to distribute the wiring metal layer, no foreign matter is generated. An example of one method for producing such a film is shown in FIG. In the figure, first of all, BP
Form an SG film. Next, heat treatment is performed for fluidization. Thirdly, atmospheric heat treatment in a hydrogen atmosphere is performed to stabilize characteristics or increase reliability. Fourth, oxidation treatment, which is a feature of the present invention, is performed. The processing conditions include performing an oxidation treatment equivalent to heat-treating the film in an oxidizing atmosphere at a temperature of 700°C or lower, preferably 650°C or lower, to oxidize unstable P in the BPSG film. I end up. As the oxidizing heat treatment atmosphere, a gas having an oxygen concentration of at least 1% or more, preferably 20% or more is used. The heat treatment temperature is 40
It was confirmed that a temperature of 0°C or higher is at least effective, and a temperature of 430°C or higher is particularly desirable. By performing such heat treatment at a relatively low temperature, non-oxidized P is oxidized and continues to exist in the film in a stable state. Even when etched with an etchant such as hydrofluoric acid, no foreign matter is generated. A layer with high P concentration is not formed on the film surface. Note that it is desirable that the heat treatment temperature be as low as possible. If the heat treatment temperature in an oxidizing atmosphere becomes high, as in the case of heat treatment for fluidization, the characteristics of the element will deteriorate, reducing the effect of the heat treatment in a reducing atmosphere. On the other hand, if the temperature is below 650°C, such characteristic deterioration becomes negligible, and if the temperature is lowered to 400 to 450°C, almost no characteristic deterioration is observed. Similarly, the same effect can be obtained by using a treatment that corresponds to an oxidizing atmosphere at substantially 400° C., such as performing oxidizing plasma treatment while heating the substrate. Another effective method is to heat the substrate to about 300° C. and irradiate it with ozone or, if necessary, ultraviolet light. Further, instead of oxygen or ozone, plasma of a gas containing oxygen may be used.

【0023】この様なPの酸化、非酸化の化学状態の違
いはエッチした際の異物発生の有無だけでなく、例えば
XPS分析法(X ray Probe Spectr
oscopy)などを用いる事によって判定できる。発
明者らの解析によれば、BPSG膜を例にとると、酸化
されたPを主に含む膜にX線が照射された場合に発生す
る2次電子のエネルギーは135,187および192
eVの近傍にピークが観察される(Siの2次電子のエ
ネルギーを103.4eV として校正した場合)。た
だし、酸化状態のPの膜の場合は187,192eVの
ピークは著しく弱いため、もしくはBのピークと重なる
ために検出困難な場合がある。しかるに非酸化のPを含
む膜から発生する2次電子のエネルギーは約130,1
87eVの、かなり強いピークが現われる。酸化状態の
Pを主に含む膜からの187eVのピークは弱く、非酸
化状態のPを主に含む膜からの187eVのピークは相
対的に強い。さらに、形成しただけのBPSG膜や、そ
れを酸化雰囲気中や不活性ガス雰囲気中で流動化させた
膜の表面にはほぼ酸化された状態のPが検出される。ま
た、さらに高温の水素アニールを施したBPSG膜表面
にはXPS法によってはPは検出されなくなるが、この
膜の表面をフッ酸系の液によってエッチすると、表面に
は非酸化のPを主成分とする異物もしくは非酸化のPを
高濃度に含む層が存在する様になる。
The difference in the chemical state of oxidized and non-oxidized P is determined not only by the presence or absence of foreign matter during etching, but also by, for example, XPS analysis (X ray probe spectroscopy).
This can be determined by using a method such as oscopy. According to the inventors' analysis, taking a BPSG film as an example, when a film mainly containing oxidized P is irradiated with X-rays, the energy of the secondary electrons generated is 135, 187, and 192.
A peak is observed near eV (when the energy of secondary electrons of Si is calibrated as 103.4 eV). However, in the case of an oxidized P film, the peak at 187 and 192 eV is extremely weak or overlaps with the B peak, so it may be difficult to detect. However, the energy of secondary electrons generated from a film containing non-oxidized P is approximately 130.1
A rather strong peak of 87 eV appears. The peak at 187 eV from a film mainly containing P in an oxidized state is weak, and the peak at 187 eV from a film mainly containing P in a non-oxidized state is relatively strong. Furthermore, P in a substantially oxidized state is detected on the surface of a BPSG film that has just been formed or a film that has been fluidized in an oxidizing atmosphere or an inert gas atmosphere. In addition, P is no longer detected by the XPS method on the surface of the BPSG film that has been subjected to high-temperature hydrogen annealing, but when the surface of this film is etched with a hydrofluoric acid solution, the surface contains non-oxidized P as the main component. A layer containing a high concentration of foreign matter or non-oxidized P comes to exist.

【0024】これに対して本発明のBPSG膜では表面
にはPが検出されないか、検出されても膜の内部の濃度
よりは高くない。配線基板に含まれる素子特性は高温の
水素雰囲気中の熱処理によって改善されており、その際
に生じる非酸化のPはその後の低温の酸化処理によって
酸化状態に変換してあるために、素子特性の改善と、非
酸化のPによる悪影響の抑制とを両立させる事ができる
。また水素雰囲気中の熱処理によってBPSG膜表面の
添加物の濃度が低下するために、その上に形成される配
線層の信頼性をも改善する事ができる。
On the other hand, in the BPSG film of the present invention, P is not detected on the surface, or even if it is detected, the concentration is not higher than the concentration inside the film. The characteristics of the elements included in the wiring board are improved by heat treatment in a high-temperature hydrogen atmosphere, and the non-oxidized P generated at that time is converted into an oxidized state by the subsequent low-temperature oxidation treatment, so the characteristics of the elements are improved. It is possible to achieve both improvement and suppression of the adverse effects of non-oxidized P. Furthermore, since the concentration of additives on the surface of the BPSG film is reduced by heat treatment in a hydrogen atmosphere, the reliability of the wiring layer formed thereon can also be improved.

【0025】以上に述べたように本発明によれば、BP
SG膜の流動特性や、配線基板中の素子の特性劣化を招
くことなく、しかも異物や表面のP高濃度層の存在しな
い配線基板が実現可能となる。この様な熱処理による、
添加物の酸化・非酸化の化学状態の変化については本発
明に記した他の添加物にたいしてもほぼ同様である。た
だし、Pに比べると他の添加物の濃度は低いために、あ
まり目だった影響は現れない。しかし、素子や高融点材
料からなる配線が極度に微細化するとやはり無視できな
いものとなる。さらに、この様な水素雰囲気中の熱処理
および酸化処理を行った後に装置から取り出し、別な装
置を用いてフッ酸を含む液によるエッチを行うと、工程
が煩雑となるばかりでなく、運搬に伴う異物の付着など
、配線基板製造の良品率低下の原因ともなる。そこで上
記の酸化処理とエッチ処理とを同一装置内で行える装置
をも開発した。この結果、処理が簡略化されたばかりで
なく、異物による良品率の低下も抑制できた。
As described above, according to the present invention, BP
It becomes possible to realize a wiring board without causing deterioration of the flow characteristics of the SG film or the characteristics of elements in the wiring board, and without the presence of foreign matter or a high concentration layer of P on the surface. Through such heat treatment,
Changes in the oxidized/non-oxidized chemical state of the additive are substantially the same for the other additives described in the present invention. However, since the concentrations of other additives are lower than P, there is no noticeable effect. However, when elements and interconnections made of high-melting point materials become extremely fine, they cannot be ignored. Furthermore, if after such heat treatment and oxidation treatment in a hydrogen atmosphere, the equipment is taken out and etched with a solution containing hydrofluoric acid using another equipment, not only will the process be complicated, but the Adhesion of foreign matter may also cause a decrease in the yield rate in wiring board manufacturing. Therefore, we have developed a device that can perform the above oxidation treatment and etching treatment in the same device. As a result, not only the process was simplified, but also the decrease in the yield rate due to foreign matter was suppressed.

【0026】配線基板の製造において、基板が集積回路
用素子を含む半導体基板である場合、接続孔形成後に露
出した基板表面を清浄化する処理としては、化学反応を
主体とした処理、例えばフッ酸を含む液や蒸気を用いた
ライトエッチ、を用いることはほとんどの場合に避けら
れない。プラズマやイオンによる処理を用いると接続孔
底部に露出した基板材料の結晶性を低下させたり、プラ
ズマ処理に伴う再付着現象によって汚染したりする為で
ある。この様な問題を避けるためには、プラズマ等の処
理を用いる場合にもできるだけ化学反応性を高め、プラ
ズマのエネルギーに伴う損傷や汚染を抑制することが必
要となる。しかるに化学反応を主体とする処理では反応
の選択性が高いために、その処理条件では反応しない膜
中の物質が表面に蓄積してしまう。従ってやはりフッ酸
を含む液や蒸気を用いたライトエッチと同様な結果にい
たる。この様な反応しなかった、もしくはその後の洗浄
によって除去されなかった異物が素子や配線に及ぼす影
響は、それらが微細化されるに従って深刻となる。
In the manufacture of wiring boards, when the board is a semiconductor substrate containing integrated circuit elements, the treatment for cleaning the exposed substrate surface after forming connection holes is a treatment mainly based on a chemical reaction, such as hydrofluoric acid. In most cases, it is unavoidable to use a light etch using a liquid or steam containing This is because if plasma or ion treatment is used, the crystallinity of the substrate material exposed at the bottom of the contact hole may be reduced, or contamination may occur due to redeposition phenomenon accompanying plasma processing. In order to avoid such problems, it is necessary to increase the chemical reactivity as much as possible even when using plasma treatment and to suppress damage and contamination caused by plasma energy. However, in treatments based on chemical reactions, the selectivity of the reaction is high, so substances in the film that do not react under the treatment conditions accumulate on the surface. Therefore, the result is similar to that of light etching using a liquid or steam containing hydrofluoric acid. The effects of foreign particles that have not reacted or been removed by subsequent cleaning on elements and wiring become more serious as they become finer.

【0027】これに対して本発明の配線基板やその製造
方法においては膜中の添加物がエッチ液やその後の洗浄
液(水)に溶解する性質を有するために、従来の絶縁膜
膜に発生する様な問題は生じない。特にBPSG膜にお
いてこの問題は深刻であり、かつ本発明の効果も大きい
On the other hand, in the wiring board and its manufacturing method of the present invention, since the additives in the film have the property of being dissolved in the etchant and subsequent cleaning solution (water), the additives that occur in the conventional insulating film are No such problems will occur. This problem is especially serious in BPSG films, and the effects of the present invention are also significant.

【0028】[0028]

【実施例】以下、本発明を実施例により詳細に説明する
[Examples] The present invention will be explained in detail below with reference to Examples.

【0029】(実施例1)紫外線消去型不揮発性メモリ
集積回路(以下、LSIと記す)に適用した例について
説明する。なお、紫外線消去型不揮発性メモリ(以下E
PROMと述べる)については、例えば、電子情報通信
学会技術研究報告  論文番号SSDM−11に記載さ
れている。この素子の保護膜としてB濃度が4mol%
、P濃度が6mol%のBPSG膜を被着して、850
℃窒素雰囲気中で熱処理を施し、BPSG膜を流動化さ
せて膜表面を平坦化した。次いで、素子の情報の記憶保
持特性を十分に良好なものとするために、この後で水素
雰囲気中、900℃で熱処理を施した。これにより基板
のMOS(金属/酸化物/Siの層からなる半導体素子
)に用いられるSiN膜もしくはオキシナイトライド膜
(Siの酸化物と窒化物が混じった膜)の漏れ電流が減
少するなどの、電気特性改善が図れるからである。
(Embodiment 1) An example in which the present invention is applied to an ultraviolet erasable nonvolatile memory integrated circuit (hereinafter referred to as LSI) will be explained. In addition, ultraviolet erasable nonvolatile memory (hereinafter referred to as E
PROM) is described in, for example, the Institute of Electronics, Information and Communication Engineers Technical Research Report Paper No. SSDM-11. The B concentration is 4 mol% as a protective film for this element.
, by depositing a BPSG film with a P concentration of 6 mol%,
A heat treatment was performed in a nitrogen atmosphere to fluidize the BPSG film and flatten the film surface. Next, in order to make the information storage characteristics of the device sufficiently good, heat treatment was performed at 900° C. in a hydrogen atmosphere. This reduces the leakage current of SiN films or oxynitride films (films containing Si oxide and nitride) used in substrate MOS (semiconductor elements consisting of metal/oxide/Si layers). This is because electrical characteristics can be improved.

【0030】この様な基板に対して、さらに素子と配線
との接続孔を形成し、配線導体層の形成前処理として、
フッ酸:フッ化アンモニウム液=1:20(体積比。い
ずれも50%水溶液)のバッファエッチ液により基板表
面をエッチすると、水洗、乾燥の後、素子表面には異物
が発生してしまう。エッチ量はBPSG膜に換算して約
20nmである。
[0030] In such a substrate, connection holes between elements and wiring are further formed, and as a pre-treatment for forming a wiring conductor layer,
When the substrate surface is etched with a buffered etch solution of hydrofluoric acid: ammonium fluoride solution = 1:20 (volume ratio; both are 50% aqueous solutions), foreign matter will be generated on the element surface after washing with water and drying. The etching amount is approximately 20 nm in terms of the BPSG film.

【0031】この対策として、本発明では水素アニール
の後、再度、20%の酸素を含むガス雰囲気中で熱処理
温度をパラメータとして酸化処理を施した。処理時間は
30分である。検討結果を図2に示す。EPROM特性
の目安としては、書換回数が少ないときの10年後の書
き込み側のしきい電圧Vthの経時変化(以下、プリサ
イクル特性と記す)と、100,000 回書換後の1
0年後の消去側のしきい電圧の経時変化(以下、100
,000 サイクル特性と記す)との差(以下、メモリ
ウィンドウと記す)によって評価する。メモリウィンド
ウは0.35V 以上が必要とされる。同図において9
00℃の水素アニールを施して電極を形成したのみの場
合はプリサイクル特性は曲線21,100,000サイ
クル特性は曲線21′として現す。 同様に水素アニール後に800℃の酸化熱処理を行った
場合の曲線をそれぞれ22および22′として現す。ま
た650℃の酸化熱処理を行った場合の特性を曲線23
および23′として現す。なお酸化熱処理が450℃の
場合の特性は曲線21および21′にほぼ一致した。ま
ず、800℃の酸化熱処理を行った場合、10年後のメ
モリウィンドウは負となる。即ち特性劣化が激しく、使
用に耐えない。酸化熱処理が650℃の時にはメモリウ
ィンドウは0.3V に改善された。ただし、上記の仕
様の0.35V を満たすには至らない。酸化熱処理温
度が450℃の場合にはメモリウィンドウは0.4V 
と、酸化熱処理を行わなかった場合とほぼ等しくなり、
特性劣化は殆ど観測されなくなった。
As a countermeasure to this problem, in the present invention, after hydrogen annealing, oxidation treatment was performed again in a gas atmosphere containing 20% oxygen using the heat treatment temperature as a parameter. Processing time is 30 minutes. The study results are shown in Figure 2. As a guideline for EPROM characteristics, the change over time of the threshold voltage Vth on the write side after 10 years when the number of rewrites is small (hereinafter referred to as precycle characteristics), and the
Time-dependent change in threshold voltage on the erase side after 0 years (hereinafter referred to as 100
,000 cycle characteristics) (hereinafter referred to as memory window). The memory window requires 0.35V or more. In the same figure, 9
In the case where the electrodes are only formed by hydrogen annealing at 00° C., the pre-cycle characteristics are represented by a curve 21, and the 100,000 cycle characteristics are represented by a curve 21'. Similarly, the curves when 800° C. oxidation heat treatment is performed after hydrogen annealing are shown as 22 and 22', respectively. In addition, curve 23 shows the characteristics when oxidation heat treatment is performed at 650°C.
and 23'. Note that the characteristics when the oxidation heat treatment was performed at 450°C almost matched curves 21 and 21'. First, if oxidation heat treatment is performed at 800° C., the memory window after 10 years will be negative. In other words, the characteristics are severely deteriorated and cannot be used. When the oxidation heat treatment was performed at 650°C, the memory window was improved to 0.3V. However, it does not meet the above specification of 0.35V. When the oxidation heat treatment temperature is 450℃, the memory window is 0.4V.
is almost the same as that without oxidation heat treatment,
Almost no characteristic deterioration was observed.

【0032】なお、いずれの酸化熱処理を行った場合も
、バッファエッチ液による異物発生は認められなかった
It should be noted that no foreign matter was observed due to the buffer etchant in any of the oxidation heat treatments.

【0033】(実施例2)実施例1と同様に、EPRO
Mに対して本発明を適用した。本発明では水素アニール
の後、バレル型の酸素プラズマアッシャに基板を挿入し
、酸素圧力が1Torr、高周波電力500Wで30分
間放電させた。酸素プラズマアッシャについては例えば
、ジャーナル・オブ・エレクトロケミカルソサェティ第
137巻第4号1212−1218ページに記載されて
いる。ちなみにこの放電条件ではフォトレジスト等の高
分子樹脂は約500nm/分の速度でエッチされる。ま
た放電開始後、数分の内に基板温度は350℃以上に達
する。この様に350℃以上の温度で、酸素プラズマに
基板を晒した所、実施例1に述べたバッファエッチ液に
よるエッチを行っても、異物発生は見られなくなった。 ただし、本実施例で述べたプラズマ処理は一般のレジス
ト除去に用いられる条件と比較すると極めて厳しく、素
子特性の劣化を招く可能性が強いので、実施例1の手段
に比べると効果としては劣る。
(Example 2) Similar to Example 1, EPRO
The present invention was applied to M. In the present invention, after hydrogen annealing, the substrate was inserted into a barrel-shaped oxygen plasma asher, and discharged for 30 minutes at an oxygen pressure of 1 Torr and a high frequency power of 500 W. The oxygen plasma asher is described, for example, in Journal of the Electrochemical Society, Vol. 137, No. 4, pp. 1212-1218. Incidentally, under these discharge conditions, polymeric resin such as photoresist is etched at a rate of about 500 nm/min. Further, the substrate temperature reaches 350° C. or higher within a few minutes after the start of discharge. When the substrate was exposed to oxygen plasma at a temperature of 350° C. or higher in this way, no foreign matter was observed even when etching was performed using the buffer etchant described in Example 1. However, the plasma treatment described in this example is extremely harsh compared to the conditions used for general resist removal and is highly likely to cause deterioration of device characteristics, so it is less effective than the method of Example 1.

【0034】(実施例3)本発明をDRAM(Dyna
mic RandomAccess Memory)に
適用した例について説明する。DRAMのメモリセルは
一般に信号電荷を蓄積するキャパシタとその読みだし・
書き込みの制御に用いるMOSトランジスタからなる。 メモリセル面積を縮小させ、しかも信号電荷の蓄積量を
減少させないためにはキャパシタ絶縁膜として誘電率の
大きな材料を用いると共に膜厚を出来るだけ薄くするこ
とが必要である。例えば4MbDRAMなどではキャパ
シタ絶縁膜としてSiO2 /SiN膜の2層膜が用い
られる。SiN膜を用いるのはSiN膜の誘電率が大き
いためである。まず、キャパシタの下層電極の表面に1
0nmのSiN膜を形成した。SiN膜の誘電率は8以
上である。しかし、SiN膜は漏れ電流が多いために、
それを防ぐために表面を酸化して約3nmのSiO2 
膜を形成した。これにより、誘電率が大きく、漏れ電流
の少ないキャパシタ絶縁膜を実現した。しかしSiN膜
表面を酸化して誘電率の小さなSiO2 に変換する事
により膜の実効的な誘電率は5にまで低下してしまった
。今後のDRAMでは可能な限りSiN膜の酸化量を減
らす事が必要となる。
(Example 3) The present invention was applied to a DRAM (Dyna
An example of application to mic RandomAccess Memory) will be described. A DRAM memory cell generally has a capacitor that stores signal charges and a readout function.
It consists of a MOS transistor used for write control. In order to reduce the memory cell area and not reduce the amount of signal charge stored, it is necessary to use a material with a high dielectric constant as the capacitor insulating film and to make the film thickness as thin as possible. For example, in a 4 Mb DRAM, a two-layer film of SiO2/SiN film is used as a capacitor insulating film. The reason for using the SiN film is that the SiN film has a high dielectric constant. First, on the surface of the lower electrode of the capacitor,
A 0 nm SiN film was formed. The dielectric constant of the SiN film is 8 or more. However, since the SiN film has a large leakage current,
To prevent this, the surface is oxidized to a thickness of approximately 3 nm.
A film was formed. As a result, a capacitor insulating film with a high dielectric constant and low leakage current was realized. However, by oxidizing the surface of the SiN film and converting it to SiO2, which has a low dielectric constant, the effective dielectric constant of the film was reduced to 5. In future DRAMs, it will be necessary to reduce the amount of oxidation of the SiN film as much as possible.

【0035】そこで本発明ではSiN膜表面の酸化膜厚
さを1.5nm にまで低減した。
Therefore, in the present invention, the thickness of the oxide film on the surface of the SiN film is reduced to 1.5 nm.

【0036】SiO2 膜厚が減少したためにキャパシ
タの漏れ電流が増加した。メモリセル形成後に表面にP
を6mol% 、Bを10mol% 含むBPSG膜を
形成し、水素雰囲気中で900℃,10分の熱処理を行
った。これにより漏れ電流はSiN膜表面の酸化膜厚が
3nmの場合と同程度にまで減少し、かつ実効的な誘電
率は6以上に向上した。さらに接続孔形成後に20%の
酸素を含む窒素雰囲気中で430℃,30分の熱処理を
行った。以上の処理によって、BPSG膜中に設けられ
た素子や高融点材料配線の電気特性は改善された。また
BPSG膜表面のP濃度が低下したために、その上に形
成されるアルミニウムを含む金属からなる配線の腐食な
どの信頼性低下の問題も改善された。
The leakage current of the capacitor increased due to the decrease in the SiO2 film thickness. P on the surface after memory cell formation
A BPSG film containing 6 mol % of B and 10 mol % of B was formed and heat-treated at 900° C. for 10 minutes in a hydrogen atmosphere. As a result, the leakage current was reduced to the same level as when the oxide film thickness on the surface of the SiN film was 3 nm, and the effective dielectric constant was improved to 6 or more. Further, after forming the connection hole, heat treatment was performed at 430° C. for 30 minutes in a nitrogen atmosphere containing 20% oxygen. Through the above treatment, the electrical characteristics of the elements and high melting point material wiring provided in the BPSG film were improved. Furthermore, since the P concentration on the surface of the BPSG film was reduced, the problem of reduced reliability such as corrosion of the wiring made of metal containing aluminum formed thereon was also improved.

【0037】(実施例4)図3を用いて説明する。同図
(a) は従来の製造方法を用いて形成した配線基板構
造を示す。同図において、段差を有するSi基板31表
面にB濃度が7mol%、P濃度が7mol% のBP
SG膜32を約500nm形成し、850℃,30分、
酸素と窒素の混合ガス雰囲気中で熱処理して流動化させ
た。ついで800℃,30分、純水素雰囲気中で熱処理
を施した。 その上に厚さ0.5μm 、幅と間隔が共に0.5μm
 、長さが2mのAlSi合金からなる配線34を形成
する際に、AlSi合金膜の被着前処理としてフッ酸:
水=1:10の希釈液によってBPSG膜32を30秒
間エッチし、水洗,乾燥した。このエッチによって異物
33が発生した。その後に公知のスパッタ法によってA
lSi合金膜を0.5μm厚さに形成し、公知のリソグ
ラフィおよびエッチ技術によって所定の配線34を形成
した。ついで保護膜として化学気相成長法によって0.
5μm 厚のSiO2 膜を形成した。
(Embodiment 4) This will be explained using FIG. 3. Figure (a) shows a wiring board structure formed using a conventional manufacturing method. In the figure, BP with a B concentration of 7 mol% and a P concentration of 7 mol% is deposited on the surface of a Si substrate 31 having steps.
SG film 32 was formed to a thickness of about 500 nm, and heated at 850° C. for 30 minutes.
It was heat-treated in a mixed gas atmosphere of oxygen and nitrogen to make it fluid. Then, heat treatment was performed at 800° C. for 30 minutes in a pure hydrogen atmosphere. On top of that, the thickness is 0.5μm, and the width and spacing are both 0.5μm.
When forming the wiring 34 made of AlSi alloy with a length of 2 m, hydrofluoric acid:
The BPSG film 32 was etched for 30 seconds using a 1:10 diluted solution, washed with water, and dried. Foreign matter 33 was generated by this etching. After that, A by a known sputtering method.
An lSi alloy film was formed to a thickness of 0.5 μm, and predetermined wirings 34 were formed using known lithography and etching techniques. Then, as a protective film, 0.0% was deposited by chemical vapor deposition.
A 5 μm thick SiO2 film was formed.

【0038】しかるに、この配線基板31においては、
隣接する配線34の間に5Vの電圧を印加してその耐圧
を測定した結果で約0.1μA の漏れ電流が観測され
た。この様な漏れ電流特性を持つ配線では例えば4メガ
ビットのDRAMなどには適用できない。異物33に水
分が吸着するなどによって隣接配線間の絶縁性が低下し
たものと考えられる。
However, in this wiring board 31,
As a result of applying a voltage of 5V between adjacent wirings 34 and measuring the withstand voltage, a leakage current of about 0.1 μA was observed. A wiring having such leakage current characteristics cannot be applied to, for example, a 4 megabit DRAM. It is considered that the insulation between adjacent wirings deteriorated due to adsorption of moisture to the foreign matter 33 or the like.

【0039】これに対して、同図(b)に示すように、
配線金属膜形成の前処理を行う前に、本発明の方法とし
て酸素30%の窒素雰囲気中、400℃で30分の熱処
理を施したBPSG膜36を用いた。その後は従来の方
法と同一の工程を経て配線基板を製造した。その結果、
隣接配線間の漏れ電流は従来の1/100以下に低減さ
れ、問題ない水準にまで改善された。
On the other hand, as shown in the same figure (b),
Before performing the pretreatment for forming the wiring metal film, the BPSG film 36 was heat-treated at 400° C. for 30 minutes in a nitrogen atmosphere containing 30% oxygen as the method of the present invention. After that, the wiring board was manufactured through the same steps as the conventional method. the result,
Leakage current between adjacent wires has been reduced to less than 1/100 of the conventional level, and has been improved to a non-problematic level.

【0040】(実施例4)本発明に係る配線基板の酸化
処理に供する製造装置を図4を用いて説明する。同図に
おいて酸化室41には酸化性のガスもしくはオゾンを含
むガスの導入口43とその排気口45が備えられている
。その中に配線基板49を加熱するための熱源47と配
線基板49を支持し移動させるための台48とを備えて
いる。なお熱源47として図4では赤外線ランプの例を
示したが、シースヒーターを用いる場合には台48内部
に含まれていても良い。さらに、熱源47は透光窓を介
して、酸化室41の外部に設けられていても良い。台4
8として、同図では板状の形のものを示したが、配線基
板49を支持・移動できるものであれば良い。熱源47
は基板49を400℃以上に加熱できる能力を有するも
のとする。ただし、酸化の為のガスとしてオゾンやプラ
ズマを用いる場合には能力はもっと低くても良い。この
酸化室41内で基板49表面のBPSG膜(図示せず)
の酸化処理を行った後、基板49は接続するエッチ室4
2に搬送される。エッチ室42はエッチ用ガスもしくは
蒸気、さらには乾燥用ガスの導入孔44とその排気孔4
6とを備えている。このエッチ室42に搬送された基板
49は所定の時間フッ酸蒸気に晒され、BPSG膜(図
示せず)の表面をエッチする。その後、必要に応じて、
洗浄の為の水蒸気に晒すなどの処理の後、乾燥空気もし
くは窒素などをを導入し、必要に応じて基板を加熱(熱
源は図示せず)して乾燥させる。なお図4ではエッチの
手段として蒸気を用いる場合を示したが、エッチ室42
内部にはフッ酸系の液を用いてエッチする機構(図示せ
ず)を設けて従来の湿式化学エッチを行っても良い。さ
らに本実施例では酸化室とエッチ室のみを示したが、こ
れら2つの処理室に加えて、配線金属層などを形成する
ための室を付加しても良い。
(Embodiment 4) A manufacturing apparatus for oxidizing a wiring board according to the present invention will be described with reference to FIG. In the figure, an oxidizing chamber 41 is provided with an inlet 43 for introducing an oxidizing gas or a gas containing ozone, and an exhaust port 45 thereof. A heat source 47 for heating the wiring board 49 and a stand 48 for supporting and moving the wiring board 49 are provided therein. Although an example of an infrared lamp is shown in FIG. 4 as the heat source 47, if a sheath heater is used, it may be included inside the stand 48. Furthermore, the heat source 47 may be provided outside the oxidation chamber 41 through a transparent window. stand 4
8, a plate-shaped one is shown in the same figure, but it may be of any type as long as it can support and move the wiring board 49. heat source 47
shall have the ability to heat the substrate 49 to 400° C. or higher. However, when ozone or plasma is used as the oxidizing gas, the capacity may be lower. A BPSG film (not shown) on the surface of the substrate 49 in this oxidation chamber 41
After performing the oxidation treatment, the substrate 49 is placed in the etch chamber 4 to be connected.
2. The etch chamber 42 has an inlet hole 44 for introducing an etching gas or steam, and furthermore, a drying gas, and an exhaust hole 4 thereof.
6. The substrate 49 transferred to the etching chamber 42 is exposed to hydrofluoric acid vapor for a predetermined time to etch the surface of the BPSG film (not shown). Then, if necessary,
After treatment such as exposure to water vapor for cleaning, dry air or nitrogen is introduced, and if necessary, the substrate is heated (heat source not shown) to dry it. Although FIG. 4 shows the case where steam is used as the etching means, the etch chamber 42
Conventional wet chemical etching may be performed by providing a mechanism (not shown) for etching using a hydrofluoric acid solution inside. Furthermore, although only the oxidation chamber and the etch chamber are shown in this embodiment, a chamber for forming a wiring metal layer or the like may be added in addition to these two processing chambers.

【0041】さらに、本実施例の酸化処理としては酸化
雰囲気中の熱処理を示したが、減圧雰囲気で酸素を含む
プラズマに晒す方法を用いても良いことはいうまでもな
い。この場合、酸化室41はプラズマ発生および導入の
機構(図示せず)を備える事になる。プラズマの発生方
法としては公知の高周波放電(50kHz以上)やマイ
クロ波放電(2.45GHz)を用いても良い。
Furthermore, although heat treatment in an oxidizing atmosphere is shown as the oxidation treatment in this embodiment, it goes without saying that a method of exposing to oxygen-containing plasma in a reduced pressure atmosphere may also be used. In this case, the oxidation chamber 41 will be equipped with a mechanism (not shown) for plasma generation and introduction. As a plasma generation method, known high frequency discharge (50 kHz or higher) or microwave discharge (2.45 GHz) may be used.

【0042】このような装置を用いない、従来の方法に
よる場合、酸化処理やエッチと同等以上の時間を基板の
運搬のために要する。また運搬の間に基板と運搬用ケー
スとの摩擦等によって基板表面には多数の異物が付着し
てしまう。一般に、基板が4インチ径のSiウェハであ
る場合、一度の運搬によって付着する異物の数は50ヶ
/ウェハ以上であるといわれる。また装置への挿入/取
り出しによっても1回あたり10ヶ程度の異物が付着す
るといわれている。本発明の装置を用いる事により、運
搬による異物の付着がほぼ完全に防止できた。また装置
への挿入/取り出しによる異物の付着も半減させる事が
できた。
[0042] In the case of a conventional method that does not use such an apparatus, the time required for transporting the substrate is equal to or longer than that for oxidation treatment or etching. Further, during transportation, a large number of foreign substances adhere to the surface of the substrate due to friction between the substrate and the transportation case. Generally, when the substrate is a Si wafer with a diameter of 4 inches, it is said that the number of foreign particles attached to the wafer during one transport is 50 or more pieces/wafer. It is also said that about 10 foreign objects adhere to each insertion/removal from the device. By using the device of the present invention, adhesion of foreign matter due to transportation could be almost completely prevented. It was also possible to reduce the adhesion of foreign matter by half due to insertion/removal from the device.

【0043】[0043]

【発明の効果】本発明では、絶縁膜中に含まれるPや、
Ge,As,Sb,Mo,Wなどが実質的にすべて酸化
されている状態の膜を用いることによって、配線基板の
製造工程における良品率の低下や、製造後の特性劣化を
防ぐ効果がある。またこの様な膜を形成する方法として
用いた、酸化雰囲気中の熱処理もしくはそれに相当する
プラズマ処理などは、十分に低温の熱処理条件に相当す
るために、メモリLSI等の特性を劣化させることがな
い。
[Effects of the Invention] In the present invention, P contained in the insulating film,
By using a film in which Ge, As, Sb, Mo, W, etc. are substantially all oxidized, there is an effect of preventing a decrease in the yield rate in the wiring board manufacturing process and deterioration of characteristics after manufacturing. In addition, the heat treatment in an oxidizing atmosphere or the equivalent plasma treatment used as a method for forming such a film corresponds to sufficiently low temperature heat treatment conditions, so that the characteristics of the memory LSI etc. will not deteriorate. .

【0044】上記の添加物が、配線があまり微細でない
ためにその剥離などが問題にならない場合や、異物もし
くは異物による素子特性の劣化などが起きにくい場合な
どには本発明の適用は必ずしも必要でない。ただし、素
子や配線の加工寸法が0.8μm以下に微細化されてい
る場合には本発明の効果は無視できないものとなる。ま
た以上の実施例ではPについて主に述べたが、Ge,A
s,Sb,Mo,W等を添加して流動化の温度をさらに
低下させようとする試みも行われている。しかし、Ge
,As等の非酸化状態は不安定であり、本発明の処理に
よって安定化する事が望ましい。また表面の濃度を低下
させることはその上の配線層の信頼性を向上させるため
にも有効である。特にSbが不安定な非酸化状態で添加
された絶縁膜表面に高濃度に存在すると、長期的には外
部から進入した水分などと反応して、その上のアルミニ
ウム合金配線を腐食させたりする問題がある。本発明は
この様な不良を防止するためにも有効である。
Application of the present invention is not necessarily necessary in cases where the above-mentioned additives do not cause problems such as peeling off because the wiring is not very fine, or in cases where deterioration of element characteristics due to foreign substances or foreign substances is unlikely to occur. . However, the effects of the present invention cannot be ignored when the processing dimensions of elements and wiring are miniaturized to 0.8 μm or less. In addition, although P was mainly described in the above embodiments, Ge, A
Attempts have also been made to further lower the fluidization temperature by adding s, Sb, Mo, W, etc. However, Ge
, As, etc., are unstable and are preferably stabilized by the treatment of the present invention. Further, lowering the surface concentration is also effective for improving the reliability of the wiring layer thereon. In particular, if Sb is added in an unstable, non-oxidized state at a high concentration on the surface of an insulating film, it will react with moisture entering from the outside in the long term, causing corrosion of the aluminum alloy wiring above it. There is. The present invention is also effective in preventing such defects.

【0045】また、実施例4に示した酸化処理の機構お
よびエッチ処理の機構を有する装置を用いれば、従来の
装置を用いるよりも不良率を著しく低減できる。
Furthermore, by using the apparatus having the oxidation treatment mechanism and the etching treatment mechanism shown in Example 4, the defective rate can be significantly reduced compared to using the conventional apparatus.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明に係るBPSG膜を有する基板の製造方
法の一例を示す図である。
FIG. 1 is a diagram showing an example of a method for manufacturing a substrate having a BPSG film according to the present invention.

【図2】実施例1のEPROM特性の変化を示す図であ
る。
FIG. 2 is a diagram showing changes in EPROM characteristics in Example 1.

【図3】従来の配線基板(a)と本願発明に係る配線基
板(b)の断面図である。
FIG. 3 is a cross-sectional view of a conventional wiring board (a) and a wiring board (b) according to the present invention.

【図4】本発明に係る配線基板の酸化処理に供する製造
装置の概略断面図である。
FIG. 4 is a schematic cross-sectional view of a manufacturing apparatus used for oxidizing a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

21,22,23…プリサイクル特性、21′,22′
,23′…100,000 サイクル特性、31…基板
、32…BPSG膜、33…異物、34…配線、35…
保護膜、41…酸化室、42…エッチ室、43,44…
導入口、45,46…排気口、47…熱源、48…台、
49…基板。
21, 22, 23... Pre-cycle characteristics, 21', 22'
, 23'...100,000 cycle characteristics, 31...substrate, 32...BPSG film, 33...foreign matter, 34...wiring, 35...
Protective film, 41... Oxidation chamber, 42... Etching chamber, 43, 44...
Inlet, 45, 46... Exhaust port, 47... Heat source, 48... Unit,
49...Substrate.

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】リン,ゲルマニウム,砒素,アンチモン,
モリブデン,タングステンからなる群から選ばれた少な
くとも一種類の添加物を含む絶縁膜が少なくとも一部に
被着された配線基板において、該絶縁膜中に含まれる添
加物が少なくとも該絶縁膜の表面近傍では実質的にすべ
てシリコンや酸素との化合物として存在している絶縁膜
が用いられており、かつ該配線基板に含まれる素子の最
小加工寸法が0.8μm以下であることを特徴とする配
線基板。
[Claim 1] Phosphorus, germanium, arsenic, antimony,
In a wiring board on which an insulating film containing at least one kind of additive selected from the group consisting of molybdenum and tungsten is deposited, at least in part, the additive contained in the insulating film is at least near the surface of the insulating film. A wiring board characterized in that an insulating film that is substantially entirely present as a compound with silicon or oxygen is used, and the minimum processing dimension of an element included in the wiring board is 0.8 μm or less. .
【請求項2】上記基板は半導体集積回路を含み、かつ該
半導体集積回路内の能動素子もしくは受動素子は窒素を
含む化合物を有することを特徴とする請求項1記載の配
線基板。
2. The wiring board according to claim 1, wherein the substrate includes a semiconductor integrated circuit, and an active element or a passive element in the semiconductor integrated circuit contains a compound containing nitrogen.
【請求項3】配線基板上にリン,ゲルマニウム,砒素,
アンチモン,モリブデン,タングステンからなる群から
選ばれた少なくとも一種類の添加物を含む絶縁膜を形成
する工程と、還元性雰囲気中で該基板を熱処理する工程
と、その後該基板を酸化処理する工程とを有することを
特徴とする配線基板の製造方法。
[Claim 3] Phosphorus, germanium, arsenic,
a step of forming an insulating film containing at least one kind of additive selected from the group consisting of antimony, molybdenum, and tungsten; a step of heat-treating the substrate in a reducing atmosphere; and a step of oxidizing the substrate. A method for manufacturing a wiring board, comprising:
【請求項4】上記酸化処理は、400℃以上,650℃
以下の温度範囲の熱処理で、かつその雰囲気が1%以上
の濃度の酸素を含むガス雰囲気であることを特徴とする
請求項3記載の配線基板の製造方法。
4. The oxidation treatment is performed at a temperature of 400°C or higher and 650°C.
4. The method of manufacturing a wiring board according to claim 3, wherein the heat treatment is carried out in the following temperature range and the atmosphere is a gas atmosphere containing oxygen at a concentration of 1% or more.
【請求項5】上記酸化処理は、300℃以上の温度で、
1%以上のオゾンを含むガスを照射する処理を含むこと
を特徴とする請求項3記載の配線基板の製造方法。
5. The oxidation treatment is performed at a temperature of 300°C or higher,
4. The method of manufacturing a wiring board according to claim 3, further comprising a process of irradiating with a gas containing 1% or more of ozone.
【請求項6】上記熱処理は、300℃以上の温度で、1
%以上の酸素を含むガスを用いたプラズマを照射する処
理を含むことを特徴とする請求項3記載の配線基板の製
造方法。
6. The heat treatment is performed at a temperature of 300°C or higher for 1
4. The method of manufacturing a wiring board according to claim 3, further comprising a process of irradiating plasma using a gas containing % or more of oxygen.
【請求項7】上記酸化処理は、300℃以上の温度で、
オゾン含むガスおよび紫外光を照射する処理を含むこと
を特徴とする請求項3記載の配線基板の製造方法。
7. The oxidation treatment is performed at a temperature of 300°C or higher,
4. The method of manufacturing a wiring board according to claim 3, further comprising a process of irradiating a gas containing ozone and ultraviolet light.
【請求項8】上記酸化処理の工程後、上記基板を第2の
還元性雰囲気中で熱処理する工程を有することを特徴と
する請求項3乃至7の何れかに記載の配線基板の製造方
法。
8. The method for manufacturing a wiring board according to claim 3, further comprising the step of heat-treating the substrate in a second reducing atmosphere after the oxidation treatment step.
【請求項9】上記酸化処理の工程後、上記絶縁膜に開口
部を形成する工程と、該絶縁膜上に金属配線層を形成す
る工程とを含むことを特徴とする請求項3乃至7の何れ
かに記載の配線基板の製造方法。
9. The method according to claim 3, further comprising the steps of forming an opening in the insulating film and forming a metal wiring layer on the insulating film after the oxidation treatment step. A method for manufacturing a wiring board according to any one of the above.
【請求項10】上記第2の還元性雰囲気中で熱処理する
工程後、上記絶縁膜に開口部を形成する工程と、該絶縁
膜上に金属配線層を形成する工程とを含むことを特徴と
する請求項8記載の配線基板の製造方法。
10. After the heat treatment in the second reducing atmosphere, the method further comprises the steps of: forming an opening in the insulating film; and forming a metal wiring layer on the insulating film. The method for manufacturing a wiring board according to claim 8.
JP03088100A 1991-04-19 1991-04-19 Wiring board and method of manufacturing the same Expired - Fee Related JP3143948B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP03088100A JP3143948B2 (en) 1991-04-19 1991-04-19 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03088100A JP3143948B2 (en) 1991-04-19 1991-04-19 Wiring board and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH04320357A true JPH04320357A (en) 1992-11-11
JP3143948B2 JP3143948B2 (en) 2001-03-07

Family

ID=13933452

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03088100A Expired - Fee Related JP3143948B2 (en) 1991-04-19 1991-04-19 Wiring board and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP3143948B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111640820A (en) * 2020-06-02 2020-09-08 东北师范大学 Simple and convenient method for improving back contact of copper-zinc-tin-sulfur-selenium film photovoltaic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111640820A (en) * 2020-06-02 2020-09-08 东北师范大学 Simple and convenient method for improving back contact of copper-zinc-tin-sulfur-selenium film photovoltaic device

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