JPH0431875U - - Google Patents
Info
- Publication number
- JPH0431875U JPH0431875U JP7416490U JP7416490U JPH0431875U JP H0431875 U JPH0431875 U JP H0431875U JP 7416490 U JP7416490 U JP 7416490U JP 7416490 U JP7416490 U JP 7416490U JP H0431875 U JPH0431875 U JP H0431875U
- Authority
- JP
- Japan
- Prior art keywords
- peak level
- circuit
- adjustment circuit
- brightness
- lower peak
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 11
- 238000000605 extraction Methods 0.000 claims description 5
- 230000007423 decrease Effects 0.000 claims 2
- 239000000284 extract Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
Landscapes
- Television Receiver Circuits (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Picture Signal Circuits (AREA)
Description
第1図はこの考案の1つの実施例に係るテレビ
ジヨン受信機中の画質調整回路の構成を示すブロ
ツク図、第2図は第1図の動作を示す線図、第3
図は第1図の変形例に係る画質調整回路の構成を
示すブロツク図、第4図は第3図の変形例に係る
画質調整回路の構成を示すブロツク図である。第
5図は従来のテレビジヨン受信機用の画質調整回
路の構成を示すブロツク図である。
主な符号の説明、10……コントラスト調整回
路、12……ブライト調整回路、22……映像信
号抜き出し回路、24……上側ピークレベル検出
回路、26……下側ピークレベル検出回路、28
……コントラスト制御回路、30,30A……ブ
ライト制御回路。
FIG. 1 is a block diagram showing the configuration of an image quality adjustment circuit in a television receiver according to one embodiment of this invention, FIG. 2 is a diagram showing the operation of FIG. 1, and FIG.
This figure is a block diagram showing the configuration of an image quality adjustment circuit according to a modification of FIG. 1, and FIG. 4 is a block diagram showing the configuration of an image quality adjustment circuit according to a modification of FIG. 3. FIG. 5 is a block diagram showing the configuration of a conventional image quality adjustment circuit for a television receiver. Explanation of main symbols, 10...Contrast adjustment circuit, 12...Bright adjustment circuit, 22...Video signal extraction circuit, 24...Upper peak level detection circuit, 26...Lower peak level detection circuit, 28
...Contrast control circuit, 30,30A...Bright control circuit.
Claims (1)
階調を変えるコントラスト調整回路と、ブライト
制御信号に基づき輝度信号の明るさを変えるブラ
イト調整回路と、を有する画質調整回路において
、 画質調整回路に入力されるクランプ後の輝度信
号から有効映像信号部分を抜き出す有効映像信号
抜出回路と、 有効映像信号抜出回路で抜き出された有効映像
信号の上側ピークレベルを検出する上側ピークレ
ベル検出回路と、 有効映像信号抜出回路で抜き出された有効映像
信号の下側ピークレベルを検出する下側ピークレ
ベル検出回路と、 上側ピークレベル検出回路で検出された上側ピ
ークレベルと下側ピークレベル検出回路で検出さ
れた下側ピークレベルに基づき、上側ピークレベ
ルと下側ピークレベルの差に対し、この差の大小
と逆方向に階調を強弱させるコントラスト制御信
号を作成し、コントラスト調整回路へ出力するコ
ントラスト制御回路と、 上側ピークレベル検出回路で検出された上側ピ
ークレベルと下側ピークレベル検出回路で検出さ
れた下側ピークレベルに基づき、コントラスト調
整回路の出力の内、コントラスト制御回路での制
御によりレベルが移動する有効映像信号部分の下
側ピークレベルと黒レベルまたは黒レベルに近い
所定レベルとの差に対し、この差を打ち消す方向
に明るさを増減させるブライト制御信号を作成し
、ブライト調整回路へ出力するブライト制御回路
と、 を備えたことを特徴とする画質調整回路。 (2) 有効映像信号抜出回路は、画質調整回路に
入力される輝度信号の代わりに、画質調整回路か
ら出力される輝度信号を対象にして有効映像信号
部分の抜き出しを行うようにしたこと、を特徴と
する請求項1記載の画質調整回路。 (3) ブライト制御回路は、上側ピークレベル検
出回路で検出された上側ピークレベルと下側ピー
クレベル検出回路で検出された下側ピークレベル
に基づき明るさを増減させるブライト制御信号を
作成する代わりに、下側ピークレベル検出回路で
検出された下側ピークレベルと、黒レベルまたは
黒レベルに近い所定レベルに維持するブライト制
御信号を作成し、ブライト調整回路へ出力するよ
うにしたこと、を特徴とする請求項2記載の画質
調整回路。[Claims for Utility Model Registration] (1) An image quality adjustment circuit having a contrast adjustment circuit that changes the gradation of a brightness signal based on a contrast control signal, and a brightness adjustment circuit that changes the brightness of a brightness signal based on a brightness control signal. , an effective video signal extraction circuit extracts an effective video signal portion from the clamped luminance signal input to the image quality adjustment circuit, and detects an upper peak level of the effective video signal extracted by the effective video signal extraction circuit. An upper peak level detection circuit, a lower peak level detection circuit that detects the lower peak level of the effective video signal extracted by the effective video signal extraction circuit, and an upper peak level detected by the upper peak level detection circuit. Based on the lower peak level detected by the lower peak level detection circuit, a contrast control signal is created that strengthens or weakens the gradation in the direction opposite to the magnitude of the difference between the upper peak level and the lower peak level, Based on the contrast control circuit that outputs to the contrast adjustment circuit, the upper peak level detected by the upper peak level detection circuit, and the lower peak level detected by the lower peak level detection circuit, the contrast of the output of the contrast adjustment circuit is determined. For the difference between the lower peak level of the effective video signal part and the black level or a predetermined level close to the black level, the level of which is shifted by control in the control circuit, a bright control signal is applied to increase or decrease the brightness in the direction of canceling out this difference. An image quality adjustment circuit comprising: a brightness control circuit that generates and outputs to a brightness adjustment circuit; (2) The effective video signal extraction circuit extracts the effective video signal portion from the luminance signal output from the image quality adjustment circuit instead of the luminance signal input to the image quality adjustment circuit; The image quality adjustment circuit according to claim 1, characterized in that: (3) The bright control circuit creates a bright control signal that increases or decreases brightness based on the upper peak level detected by the upper peak level detection circuit and the lower peak level detected by the lower peak level detection circuit. , a lower peak level detected by the lower peak level detection circuit and a bright control signal for maintaining the black level or a predetermined level close to the black level are created and output to the bright adjustment circuit. The image quality adjustment circuit according to claim 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7416490U JPH0431875U (en) | 1990-07-12 | 1990-07-12 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7416490U JPH0431875U (en) | 1990-07-12 | 1990-07-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0431875U true JPH0431875U (en) | 1992-03-16 |
Family
ID=31613623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7416490U Pending JPH0431875U (en) | 1990-07-12 | 1990-07-12 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0431875U (en) |
-
1990
- 1990-07-12 JP JP7416490U patent/JPH0431875U/ja active Pending
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