JPH04316173A - Single-chip microcomputer - Google Patents

Abstract

PURPOSE:To reduce the time required for performing a pull-up resistance disconnecting process so as to reduce the power by adding a level setting resistance (pull-up resistance) permit flag. CONSTITUTION:A pull-up resistance permit flag 65 and AND gates 81 and 82 are added to an input-output circuit 70. When the flag 65 is '0', the output of the gate 81 becomes '0' irrespective of the value of a pull-up resistance connection designating signal 25 at each input-output port 110 of an input-output port 51 and a transistor Tr 152 is turned off. Therefore, all pull-up resistances are disconnected. The same can be said to each input-output control circuit ill of another input-output port 61. In addition, when the pull-up resistance permit flag is added to each input-output port and the ports are mapped to the same address, the control of connection and disconnection of the pull-up resistances become possible at every input-output port.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to single-chip microcomputers.

0002

2. Description of the Related Art In recent years, as microcomputers have become more sophisticated and performant, the range of applications for microcomputers has become wider and wider. In single-chip microcomputers (hereinafter referred to as single-chip microcomputers), the system is integrated into one chip by incorporating peripheral functions internally. One such feature is a built-in pull-up resistor. By incorporating the pull-up resistor inside the microcontroller, the number of components and cost of the entire system can be reduced. on the other hand,
Power reduction in single-chip microcontrollers is becoming increasingly important.

At the input port, when the input level is low, the pull-up resistor itself consumes power, so
Considering power reduction, it is necessary to disconnect the pull-up resistor. For this purpose, it is necessary to be able to connect and disconnect the pull-up resistor through software processing. For example, in a battery-powered device where power consumption is important, when the main battery is removed, the operating power source is switched to the sub-battery. At this time, it is necessary to detect that the main battery has been removed and switched to the sub battery and disconnect the pull-up resistor connected to the input port to reduce power.

[0004] Therefore, in order to detect a port that is in input mode and disconnect the pull-up resistor for the port that is in input mode, a command for disconnecting the pull-up resistor is executed for each input port. There must be.

FIG. 3 shows a conventional single-chip microcomputer 6.
FIG. The single-chip microcomputer 6 shown in FIG. 3 includes a central processing unit 1 (hereinafter referred to as "CPU") that controls the overall operation of the single-chip microcomputer 6, a memory 2 that stores programs and data, and peripherals that perform peripheral operations. Circuit 3, input/output circuit 5, and external terminals 10 and 1
1, 12, and 13, and these are internal bus 4.
It is connected with Read signals 17 and 18 for reading input levels of external terminals 10, 11, 12, and 13 are supplied from the CPU 1 to the input/output circuit 5.

FIG. 4 is a detailed block diagram of the input/output circuit 5. The input/output circuit 5 is composed of input/output ports 50 and 60, each of which is I/O mapped. Since the input/output ports 50 and 60 have the same basic configuration and operation except for the I/O mapping address, only the input/output port 50 will be described below using FIG. 4. The input/output control circuit 100 is a 1-bit input/output control circuit that constitutes the input/output port 50.

The input/output control circuit 100 includes an input/output setting flag 21, an output latch 22, a decoder 20, and n-channel transistors Tr150, Tr151, and Tr152.
and a REIT buffer 15. The input/output setting flag 21 is a flag for setting the input/output control circuit 100 to input or output mode. The output latch 22 is a latch that stores data to be output to the outside of the single-chip microcomputer 6 via the external terminal 100 when the input/output control circuit 100 is in the output mode.

The decoder 20 decodes the data stored in the input/output setting flag 21 and the output latch 22, and outputs input/output control signals 23, 24 and a pull-up resistor connection designation signal 25 as the decoded results. Input/output control signal 23
, 24, Tr150 and Tr151 are turned on/off.
Performs OFF control and sets the input/output control circuit 100 to “0”.
Switches between “1” output and floating state. The pull-up resistor connection designation signal 25 controls the on/off state of the Tr 152, thereby controlling the connection of the pull-up resistor using the on-resistance of the Tr 152 itself.

The read buffer 15 becomes active when the read signal 17 is "1" and takes in the signal level input via the external terminal 10 to the internal bus 4.

Table 1 shows the decoded output of the decoder 20 based on the combination of the input/output setting flag 21 and the data of the output latch 22.

[0011]

When the input/output setting flag 21 is "0", the input/output control circuit 100 is in the output mode. In the output mode, when the output latch 22 is “0”, the Tr150 is turned off and the Tr
151 is turned on, outputs VSS level from external terminal 10, and when the output latch is "1", Tr150 is turned on, T
r151 is turned off and the VDD level is output from the external terminal 10.

Next, when the input/output setting flag 21 is "1", the input/output control circuit 100 turns off both Tr 150 and Tr 151 and enters the input mode. In input mode,
When the output latch 22 is "0", the Tr 152 is turned off and no pull-up resistor is connected. Output latch 22 is “1”
”, the Tr152 is turned on and the pull-up resistor is connected.

As described above, it is possible to set the input/output mode and specify the connection of the pull-up resistor for each input/output terminal.

Similarly, Table 2 shows the decoded output of the decoder 30 based on the combination of the input/output setting flag 31 at the input/output port 60 and the data of the output latch 32.

[0016]

By setting data in the input/output setting flag 31 and output latch 32, the input/output mode setting and pull-up resistor connection designation can be set for each input/output terminal at the input/output port 60. It is possible.

[0018]

[Problems to be Solved by the Invention] The conventional single-chip microcontroller with built-in input/output circuits described above pulls up input terminals by setting data in output latches mapped to separate addresses for each input/output port. Since the connection and disconnection of the resistor is controlled, in order to disconnect the connected pull-up resistor, the process of detecting the port set to input mode and writing “0” to the output latch is necessary for all ports. This has the disadvantage that it takes time to disconnect all pull-up resistors, and power is consumed during that time.

Particularly in battery-powered devices, when the operating power source is switched from the main battery to the sub-battery, the pull-up resistor is disconnected by software, which consumes the power of the sub-battery, which shortens the life of the sub-battery. There is.

An object of the present invention is to provide a single-chip microcomputer that can shorten the time required to disconnect the pull-up resistor and reduce power.

[0021]

[Means for Solving the Problems] The single-chip microcomputer of the present invention includes an input/output setting flag for setting an input/output mode, an output latch and a pull-up resistor for storing output data, and an input/output setting flag and an output latch for storing output data. In a single-chip microcomputer equipped with an input/output circuit consisting of a decoder that decodes a set value and allows connection of a pull-up resistor, a pull-up resistor permission flag that allows the connection of a pull-up resistor is added, and the decoder output and means for permitting specification of connection of a pull-up resistor based on a set value of a pull-up resistor permission flag.

[0022] Furthermore, a pull-up resistor selection flag is added to allow connection of a pull-up resistor to be specified for each input/output circuit.
The device includes means for permitting connection of a pull-up resistor to be designated for each input/output circuit based on a decoder output and a designated value of a pull-up resistor selection flag.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of an input/output circuit 70 of a single-chip microcomputer in an embodiment of the present invention. In this embodiment, unlike the conventional example, a flag is provided to control whether connection of a pull-up resistor is permitted or not, and it is possible to immediately disconnect the pull-up resistor.

In the input/output circuit 70 shown in FIG.
52, 153, 154, 155, decode signals 23, 24, 25 of the decoder 20, decode signals 33, 34, 35 of the decoder 30, and read signals 17, 18 of the read buffers 15, 16 are the input/output circuit 5 of the conventional example. Since it is the same as that, the explanation will be omitted.

The input/output circuit 70 is the input/output circuit 5 of FIG. 4 with the addition of a pull-up resistor permission flag 65 and AND gates 81 and 82. The pull-up resistor permission flag 65 is a flag that allows specifying the connection of a pull-up resistor at each input terminal, and is a flag that allows when it is "1" and disallows when it is "0", and is address-mapped. A pull-up resistor enable signal 66 is output from the pull-up resistor enable flag 65 and supplied to each input/output control circuit.

The operation of the input/output control circuit 110 will be explained below. Input/output setting flag 21 and output latch 2
2, the decoder 20, the transistors 150, 151, 152, and the read buffer 150 are similar to the conventional input/output control circuit 100 shown in FIG.

The AND gate 81 inputs the pull-up resistor enable signal 66 and the pull-up resistor connection designation signal 25,
The output signal is supplied to Tr152.

Table 3 shows the decoder output of the decoder 20 based on the combination of each data of the input/output setting flag 21, the output latch 22, and the pull-up resistor permission flag 65.

[0029]

When the input/output setting flag 21 is "0", the input/output control circuit 110 is in the output mode regardless of the data of the pull-up resistor permission flag 65. When the input/output setting flag 21 is “1” and the output latch 22 is “0”, the input mode is entered and the pull-up resistor connection designation signal 25 is “0”.
0'', Tr152 is turned off and no pull-up resistor is connected.

Next, when the input/output setting flag 21 and the output latch 22 are both "1", the input mode is entered and the pull-up resistor connection designation signal 25 becomes "1". Therefore, the output of the AND gate 81 is determined by the data of the pull-up resistor permission flag 65. Pull-up resistance enable flag 65 is “0”
”, the output of the AND gate 81 becomes “0” and Tr1
52 is turned off. Therefore, do not connect a pull-up resistor. AND when the pull-up resistor permission flag 65 is “1”
The output of the gate 81 becomes "1" and the Tr 152 is turned on. Therefore, connect a pull-up resistor.

Similarly, by supplying the pull-up resistor connection designation signal 66 to each input/output control circuit of the input/output port 51, the pull-up resistor of each input terminal of the input/output port 51 is set according to the data of the pull-up resistor permission flag 65. can be connected or disconnected.

Next, the input/output control circuit 111 in the input/output port 61 will be explained below.

Table 4 shows the decoder output of the decoder 30 based on each data combination of the input/output setting flag 31, the output latch 32, and the pull-up resistor permission flag 65.

[0035]

The AND gate 82 inputs the pull-up resistor enable signal 66 and the pull-up resistor connection designation signal 35, and supplies an output signal to the Tr 155. Therefore, when the pull-up resistor enable flag 65 is "0", the output of the AND82 is "0" regardless of the value of the pull-up resistor connection designation signal 35.
0'' and the Tr 155 is turned off. Similarly, the pull-up resistors of each input terminal in the input/output port 61 can be connected or disconnected based on the data of the pull-up resistor permission flag 65.

As described above, according to this embodiment, it is possible to disconnect all pull-up resistors connected to the input terminals in the input/output circuit 70, depending on the value set in the pull-up resistor permission flag 65. . Therefore, in a battery-powered device, all pull-up resistors are disconnected by executing one command and setting the pull-up resistor permission flag 65 to "0" immediately after the operating power source is switched from the main battery to the sub-battery. can reduce consumption and extend the life of the sub-battery.

FIG. 2 is a block diagram of an input/output circuit 71 of a single-chip microcomputer in a second embodiment of the present invention. In this embodiment, there are separate flags for permitting the connection of the pull-up resistor at the input/output port 52 and flags for permitting the connection of the pull-up resistor for the input/output port 62, and the disconnection of the pull-up resistor is determined from the input/output port. It is possible to specify each port.

In the input/output circuit 71 shown in FIG.
2, 153, 154, 155, decode signals 23, 24, 25 of the decoder 20, decode signals 33, 34, 35 of the decoder 30, read buffers 15, 16, and read signals 17, 18 are input/output signals of the conventional example. Since it is the same as circuit 5, the explanation will be omitted.

The input/output circuit 71 adds pull-up resistor permission flags 70, 71 and AND gates 83, 84 to the input/output circuit 5 of FIG. Pull-up resistance enable flag 9
0 is a flag that permits the connection of a pull-up resistor to each input terminal of the input/output port 52, and the pull-up resistor permission flag 91 is a flag that permits the connection of a pull-up resistor to each input terminal of the input/output port 62. be. The pull-up resistance permission flags 90 and 91 perform address mapping to the same address, and data can be set at the same time. The AND gate 83 inputs the pull-up resistor enable signal 72 and the pull-up resistor connection designation signal 25, and outputs the output signal from the Tr15.
Supply to 2. The AND gate 84 inputs the pull-up resistor enable signal 73 and the pull-up resistor connection designation signal 35 and supplies an output signal to the Tr 155.

The operation of the input/output control circuit 52 will be explained below. Table 5 Input/output flag 21 and output latch 22
The decoded output of the decoder 20 based on the combination of the data of the pull-up resistor permission flag 90 and the pull-up resistor permission flag 90 is shown.

[0042]

When the input/output setting flag 21 is set to "1" and the output latch 22 is set to "1", the input mode is entered and the pull-up resistor connection instruction signal 25 becomes "1". Therefore A
The output value of the ND gate 83 is determined by the data set in the pull-up resistor enable flag 90, and when the pull-up resistor enable flag 90 is set to "0", the Tr 152 is turned off and the pull-up resistor is disconnected.

Similarly, by setting the pull-up resistor permission flag 90 to "0", it is possible to disconnect all pull-up resistors connected to each input terminal of the input/output port 52.

Next, the operation of the input/output port 62 will be explained below.

Table 6 shows the decoded output of the decoder 30 based on each data combination of the input/output setting flag 31, the output latch 32, and the pull-up resistor flag 91.

[0047]

When the input/output setting flag 31 is set to "1" and the output latch 32 is set to "1", the input mode is entered and the pull-up resistor connection instruction signal 35 becomes "1". Therefore, AND
The output value of the gate 84 is determined by the data set in the pull-up resistor enable flag 91, and when the pull-up resistor enable flag 91 is set to "0", the Tr 155 is turned off and the pull-up resistor is disconnected.

Similarly, the pull-up resistance permission flag 91 is set to “
By setting the value to 0'', it is possible to disconnect all pull-up resistors connected to each input terminal of the input/output port 62.

As described above, by incorporating a pull-up resistor permission flag for each input/output port, it is possible to disconnect the pull-up resistor only for the port for which the pull-up resistor is to be disconnected. For example, if a signal from the outside that has an intermediate potential is connected, leaving a pull-up resistor connected has the effect of further reducing power consumption.

[0051]

[Effects of the Invention] As explained above, the present invention adds a pull-up resistor permission flag that allows the connection of a pull-up resistor, and sets the pull-up resistor permission flag to "1", thereby allowing each input port to It becomes possible to specify the connection of a pull-up resistor. Also, the pull-up resistor enable flag is set to “0”.
By setting , it is possible to immediately disconnect the pull-up resistors of all input ports regardless of the connection specification of the pull-up resistors at each input port, and to control the connection and disconnection of pull-up resistors on a bit-by-bit basis. Furthermore, it is possible to control the connection and disconnection of pull-up resistors for all input ports, so by executing one instruction and setting the pull-up resistor permission flag to "0", you can immediately connect and disconnect pull-up resistors for all input ports. can be separated. Therefore,
The time taken to disconnect the pull-up resistor is greatly shortened, which has the effect of reducing power.

Furthermore, by adding a pull-up resistor enable flag to each input/output circuit and mapping it to the same address, one instruction is executed and the pull-up resistor enable flag is set to "0".
By setting ``, it is possible to control the connection and disconnection of the pull-up resistor for each input/output port.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an input/output circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram of an input/output circuit according to a second embodiment of the present invention.

FIG. 3 is a block diagram of a conventional single-chip microcomputer.

FIG. 4 is a block diagram of an input/output circuit of a conventional single-chip microcomputer.

[Explanation of symbols]

1 CPU 2 Memory 3 Peripheral circuit 4 Internal bus 5, 70, 71 Input/output circuit 6 Single chip microcomputer 10, 11, 12, 13 External terminal 17, 18
Read signals 21, 31 Input/output setting flags 22, 32 Output latches 20, 30 Decoders 15, 16 Read buffer

Claims (2)

[Claims] 1. An input/output setting flag for setting an input/output mode, an output latch for storing output data, a level setting resistor with one end connected to a positive potential or a negative potential, the input/output setting flag and the output latch. In a single-chip microcomputer equipped with an input/output circuit consisting of a decoder that decodes a value set in and specifies connection of the level setting resistor, a level setting resistor permission flag is added to permit connection of the level setting resistor, A single-chip microcomputer comprising means for permitting connection designation of the level setting resistor based on the decoder output and a set value of the level setting resistor permission flag. 2. The single-chip microcomputer according to claim 1, wherein a level setting resistor selection flag for specifying connection permission of the level setting resistor is added to each input/output circuit, and the decoder output and the level setting resistor selection flag are added to each input/output circuit. 1. A single-chip microcomputer comprising means for permitting connection designation of the level setting resistor for each input/output circuit based on a set value.