JPH04315309A - High speed frequency divider - Google Patents

Abstract

PURPOSE:To prevent malfunction of a next stage circuit when a signal with a large amplitude is inputted to an input section circuit of the high speed frequency divider. CONSTITUTION:An input signal application terminal 2 of an input section circuit is connected to a power supply voltage application terminal 1 via diodes D1, D2, D3 and resistors R1, R2, an auxiliary input signal application terminal 3 is connected to the power supply voltage application terminal 1 via the diodes D1, D2, D3 and resistors R1, R3 and the power supply voltage application terminal 1 connects to ground via diodes D1, D2, D3, D4, D5 and resistors R1, R4 and diodes D11, D12 connected in anti-parallel are connected respectively between the input signal application terminal 2 and the auxiliary input signal application terminal 3.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input section circuit of a high-speed frequency divider, and more particularly to an input section circuit of a high-speed frequency divider in which a frequency divider circuit is provided on a GaAs substrate.

0002

2 is a circuit diagram showing the input part of a conventional GaAs high-speed frequency divider. In the figure, 1 is a power supply voltage application terminal, 2 is an input signal application terminal, and 3 is a reverse-phase input signal terminal. This is an auxiliary input signal application terminal to which an auxiliary input signal is applied. Input signal application terminal 2 is power supply voltage application terminal 1, diode D
1, D2, D3, electrically connected via resistors R1, R2, and auxiliary input signal application terminal 3 is electrically connected to power supply voltage application terminal 1 via diodes D1, D2, D3, resistors R1, R3. and the power supply voltage application terminal 1 is connected to the diode D1.
, D2, D3, D4, D5, and are grounded via resistors R1 and R4. Furthermore, 2a and 3a are output terminals that transmit input signals to flip-flops (not shown).

Next, the operation will be explained. When a voltage is applied to the power supply voltage application terminal 1, diodes D1, D2, D3, D4, D5 and a resistor R1 are connected between the output terminals 2a and 3a.
, R4 provides a constant voltage. When an input signal is applied to the input signal application terminal 2 and the auxiliary input signal application terminal 3, the voltage between the output terminals 2a and 3a is applied to the diode D1.
, D2, D3, D4, D5 and resistors R1, R4 with an amplitude equal to the amplitude of the input signal, and this voltage is applied to, for example, a flip-flop ( (not shown), etc., as an input signal.

0004

[Problems to be Solved by the Invention] However, the input part circuit of the above-mentioned conventional high-speed frequency divider has an input signal application terminal,
Since the input signal input to the auxiliary input signal application terminal is configured to be input directly to the next stage circuit, ie, the flip-flop, there is a problem that the flip-flop may malfunction if the amplitude of the input signal is large. there were.

The present invention was made to solve the above-mentioned problems, and even when an input signal with a large amplitude is applied to the input signal application terminal and the auxiliary input signal application terminal, malfunction of the next stage circuit is prevented. The objective is to obtain a high-speed frequency divider with no input subcircuit.

[0006]

[Means for Solving the Problems] A high-speed frequency divider according to the present invention has an input signal application terminal to which an input signal is applied in an input partial circuit, and an auxiliary input terminal to which a complementary input signal having the opposite phase of the input signal is applied. Diodes whose directions are opposite to each other are provided between the signal application terminals.

[0007]

[Operation] According to the present invention, by providing diodes having opposite directions between the input signal application terminal and the auxiliary input signal application terminal in the input partial circuit, the input signal application terminal and the auxiliary input signal application terminal Since the potential difference between the two is suppressed to below the breakdown voltage of the diode (approximately 0.6V), the amplitude of the input signal transmitted from the output terminal to the next stage circuit can be regulated, and malfunction of the next stage circuit can be prevented. .

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, the same reference numerals as in FIG. 2 indicate the same or equivalent parts. In FIG. 1, 1 is a power supply voltage application terminal, 2
3 is an input signal application terminal, and 3 is an auxiliary input signal application terminal. The input signal application terminal 2 is electrically connected to the power supply voltage application terminal 1 and diodes D1, D2, D3 via resistors R1, R2, and the auxiliary input signal terminal 3 is electrically connected to the power supply voltage application terminal 1 and diodes D1, D2, D3 through resistors R1, R2. It is electrically connected to D3 through resistors R1 and R3, and power supply voltage application terminal 1 is connected to diode D1.
, D2, D3, D4, D5 and are grounded via resistors R1 and R4, thus forming a frequency dividing circuit on the GaAs substrate. The input signal application terminal 2 and the auxiliary input signal application terminal 3 are connected to each other by diodes D11 and D12.

Next, the operation will be explained. When a voltage is applied to the power supply voltage application terminal 1, the output terminals 2a and 3a are connected to diodes D1, D2, D3, D4, D5 and resistors R1 and R.
A constant voltage is set by 4. When an input signal is applied to the input signal application terminal 2 and the auxiliary input signal application terminal 3 in this state, the voltage between the output terminals 2a and 3a is applied to the diodes D1, D2, D3, D4, D5 and the resistor R1.
, R4, and changes depending on the amplitude of the input signal. At this time, even if the input signal has a large amplitude (for example, about 1.5 VPP), the output terminal 2a is , 3a is limited to below the breakdown voltage of the diode (approximately 0.6V), and the amplitude of the signal input to the next stage circuit, a flip-flop (not shown), is approximately 0.6V. The following is true.

As described above, in this embodiment, a frequency dividing circuit is formed on the GaAs substrate, and in the input partial circuit of the frequency dividing circuit, the directions are opposite to each other between the input signal terminal 2 and the auxiliary input signal terminal 3. Since the diodes D11 and D12 are provided, the amplitude of the input signal transmitted to the flip-flop is limited to below the breakdown voltage of the diodes D11 and D12, so the amplitude of the signal input to the next stage circuit, the flip-flop, is It does not become excessive and can prevent malfunctions.

[0011]

As described above, according to the present invention, diodes whose directions are opposite to each other are provided between the input signal application terminal and the auxiliary input signal application terminal of the input partial circuit. The potential difference between the auxiliary input signal application terminals is limited to a breakdown voltage (approximately 0.6 V) of the diode or less, and the signal input to the input signal application terminal and the auxiliary input signal application terminal has a large amplitude. too,
Excessive amplitude signals are not transmitted from the output terminal to the next stage circuit.
This has the effect of preventing circuit malfunction.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an input partial circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a conventional input partial circuit.

[Explanation of symbols]

1 Power supply voltage application terminal 2 Input signal application terminal 3 Auxiliary input signal application terminal 2a Output terminal 3a Output terminal D1 Diode D2 Diode D3 Diode D4 Diode D5 Diode D11 Diode D12 Diode R1 Resistance R2 Resistance R3 Resistance R4 Resistance

Claims (2)

[Claims] 1. An input signal application terminal having an input signal application terminal to which an input signal is applied and a supplementary input signal application terminal to which a complementary input signal having the opposite phase of the input signal is applied, and based on the signal input to both terminals. In a high-speed frequency divider that forms a divided output by a frequency dividing circuit formed on a substrate, diodes in opposite directions are connected between the input signal application terminal and the auxiliary input signal application terminal.
A high-speed frequency divider characterized by having separate frequency dividers. 2. The high-speed frequency divider according to claim 1, wherein the frequency divider circuit is provided on a GaAs substrate.