JPH04312966A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH04312966A JPH04312966A JP6034191A JP6034191A JPH04312966A JP H04312966 A JPH04312966 A JP H04312966A JP 6034191 A JP6034191 A JP 6034191A JP 6034191 A JP6034191 A JP 6034191A JP H04312966 A JPH04312966 A JP H04312966A
- Authority
- JP
- Japan
- Prior art keywords
- case
- electrode terminal
- terminal
- semiconductor device
- sealed semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 239000013013 elastic material Substances 0.000 claims description 4
- 239000003566 sealing material Substances 0.000 claims description 2
- 239000008393 encapsulating agent Substances 0.000 claims 2
- 239000007787 solid Substances 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 12
- 229910052802 copper Inorganic materials 0.000 abstract description 7
- 239000010949 copper Substances 0.000 abstract description 7
- 229920002379 silicone rubber Polymers 0.000 abstract description 7
- 239000004945 silicone rubber Substances 0.000 abstract description 7
- 230000003252 repetitive effect Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 9
- 239000011889 copper foil Substances 0.000 description 6
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920001296 polysiloxane Polymers 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、封止型半導体装置、特
にアウトサ−トケ−ス、すなわちケ−スに電極端子が組
立式になったもので構成されるパワ−モジュ−ルのパッ
ケ−ジに関するものである。[Industrial Field of Application] The present invention relates to sealed semiconductor devices, particularly power module packages consisting of an outsert case, that is, a case in which electrode terminals are assembled. This is related to ji.
【0002】0002
【従来の技術】図3は従来のアウトサ−トケ−スで構成
される半導体装置を示す断面図である。この図において
、1は半導体装置のベ−スを構成するとともに、放熱を
兼ねた銅ベ−ス板、2はこの銅ベ−ス板1の上面に固着
され、両面に銅の厚箔が張られた絶縁基板、3は前記銅
ベ−ス板1の外周にはめ合わせて固着された樹脂製のア
ウトサ−トケ−ス、4は電極端子で、一端にS字状に形
成されたSベント部4aを有し、絶縁基板2上のパタ−
ンに半田接合されるとともに、他端がアウトサ−トケ−
ス3の上面から突出した状態で固定部3aに固着されて
いる。5は前記絶縁基板2の上面にボンディングされた
半導体チップ、6はこの半導体チップ5と絶縁基板2の
所要回路とを回路的に接続するアルミワイヤ、7は前記
半導体チップ5、アルミワイヤ6および電極端子4等を
アウトサ−トケ−ス3の内部に封止するシリコンゲル、
8はこのシリコンゲル7の上部に注入され、電極端子4
をアウトサ−トケ−ス3内で樹脂封止するエポキシ樹脂
である。2. Description of the Related Art FIG. 3 is a sectional view showing a semiconductor device constructed of a conventional outsert case. In this figure, 1 is a copper base plate that constitutes the base of the semiconductor device and also serves as a heat dissipator. 2 is fixed to the top surface of this copper base plate 1, and thick copper foil is covered on both sides. 3 is a resin outsert case fitted and fixed to the outer periphery of the copper base plate 1, 4 is an electrode terminal, and an S-shaped bent portion is formed at one end. 4a, and the pattern on the insulating substrate 2.
The other end is soldered to the outsert cable.
It is fixed to the fixing part 3a in a state of protruding from the upper surface of the base 3. 5 is a semiconductor chip bonded to the upper surface of the insulating substrate 2; 6 is an aluminum wire that connects the semiconductor chip 5 and the required circuit of the insulating substrate 2; 7 is the semiconductor chip 5, the aluminum wire 6, and an electrode. silicone gel for sealing the terminals 4 etc. inside the outsert case 3;
8 is injected into the upper part of this silicon gel 7, and the electrode terminal 4
This is an epoxy resin for resin-sealing the inside of the outsert case 3.
【0003】次に、アウトサ−トケ−スで構成されるパ
ワ−モジュ−ルの信頼性上の問題について述べる。半導
体製品は、パワ−モジュ−ルに限らず、様々な用途があ
る。パッケ−ジに限っていえば、半導体デバイスの特性
を十分に引き出し、かつ使用状況下において安定した性
能を発揮させることが第1である。本発明の対象である
アウトサ−トケ−スで構成されるパワ−モジュ−ルは、
製造の工期短縮および自動化,さらに品質の安定を追求
したひとつの結果として、現在パワ−モジュ−ルの主流
をなすパッケ−ジとなっている。パワ−モジュ−ルのパ
ッケ−ジとして信頼性の上で最も注意が払われるのは、
部品の接合に半田を用いている部分であり、特に外部の
電極端子4と銅厚箔付の絶縁基板2との半田接合部であ
る。この部分は、機能としては半導体デバイスで変換さ
れる電流を取り出す接点になり非常に重要な部分である
。この部分の信頼性を評価する試験としては、ヒ−トサ
イクル試験が一般的である。ヒ−トサイクル試験におい
て、この半田接合部には引っ張りと圧縮が交互に繰り返
し加わる(テスト温度−40℃〜125℃)。信頼性上
で問題となるのは、引っ張り荷重が加わるときで、この
時荷重は電極端子4をこれが接合されている絶縁基板2
の銅厚箔から引き剥そうとする方向へ働く。半田接合部
に加わる繰り返し荷重の原因は、パッケ−ジの大きさや
、銅ベ−ス板1と銅厚箔の絶縁基板2の熱膨張係数の違
いにより発生する反りが作用する。また、封止剤として
用いられているシリコンゲル7の膨張係数がケ−ス材料
やエポキシ樹脂8の熱膨張係数より1桁大きいことによ
り、ヒ−トサイクルでの高温時にアウトサ−トケ−ス3
に電極端子4が固定されているため、電極端子4を絶縁
基板2の銅厚箔より引き剥す力が働く。したがって、こ
の繰り返し荷重を吸収し、端子半田付部に加わる応力を
軽減するために“Sベント部”4aと呼ばれる一種のバ
ネ効果を持たせる部分が必須となっている。[0003] Next, reliability problems of power modules constructed with outsert cases will be discussed. Semiconductor products have a variety of uses, not just power modules. When it comes to packaging, the first priority is to fully bring out the characteristics of semiconductor devices and to ensure that they exhibit stable performance under the usage conditions. A power module composed of an outsert case, which is the object of the present invention, is as follows:
As a result of efforts to shorten manufacturing time, automate production, and achieve stable quality, this package is now the mainstream of power modules. The most important thing to pay attention to in terms of reliability is the power module package.
This is a part where solder is used to join parts, especially the solder joint part between the external electrode terminal 4 and the insulating board 2 with thick copper foil. This part functions as a contact point for extracting the current converted by the semiconductor device, and is a very important part. A heat cycle test is commonly used to evaluate the reliability of this part. In a heat cycle test, this solder joint is subjected to repeated alternating tension and compression (test temperature -40°C to 125°C). A problem with reliability occurs when a tensile load is applied, and at this time the load is applied to the electrode terminal 4 on the insulating substrate 2 to which it is
It works in the direction of trying to peel it off from the thick copper foil. The repeated loads applied to the solder joints are caused by warpage caused by the size of the package and the difference in coefficient of thermal expansion between the copper base plate 1 and the thick copper foil insulating substrate 2. In addition, because the expansion coefficient of the silicone gel 7 used as the sealant is one order of magnitude larger than the thermal expansion coefficient of the case material or epoxy resin 8, the outsert case 3 can be heated at high temperatures during heat cycles.
Since the electrode terminal 4 is fixed to the insulating substrate 2, a force is exerted to peel the electrode terminal 4 from the thick copper foil of the insulating substrate 2. Therefore, in order to absorb this repeated load and reduce the stress applied to the terminal soldering part, a part called "S-bent part" 4a which has a kind of spring effect is essential.
【0004】0004
【発明が解決しようとする課題】従来のアウトサ−トケ
−ス3で構成されるパワ−モジュ−ルのパッケ−ジは、
以上のように構成されているので、電極端子4には必ず
Sベント4a部分を設ける必要があり、そのため電極端
子4の形状が複雑になり、コストが高くなる。また、ヒ
−ト試験時に発生する膨張で半田接合部が剥離する等の
問題点があった。[Problems to be Solved by the Invention] A power module package consisting of a conventional outsert case 3 is
With the above structure, it is necessary to provide the S vent 4a portion in the electrode terminal 4, which makes the shape of the electrode terminal 4 complicated and increases the cost. In addition, there were other problems such as the solder joints peeling off due to the expansion that occurs during the heat test.
【0005】本発明は、上記のような問題点を解消する
ためになされたもので、電極端子の形状を簡単にできる
とともに、半田接合部の剥離をなくすことのできる封止
型半導体装置を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and provides a sealed semiconductor device that can simplify the shape of electrode terminals and eliminate peeling of solder joints. The purpose is to
【0006】[0006]
【課題を解決するための手段】本発明に係る封止型半導
体装置は、アウトサ−トケ−スの電極端子の貫通部を電
極端子の外形よりも大きくするとともに、ケ−ス内の上
半分の封止材にシリコンゴム等の弾性材を使用したもの
である。[Means for Solving the Problems] In the sealed semiconductor device according to the present invention, the penetration portion of the electrode terminal of the outsert case is made larger than the outer shape of the electrode terminal, and the upper half of the inside of the case is made larger. An elastic material such as silicone rubber is used as the sealing material.
【0007】[0007]
【作用】本発明における封止型半導体装置は、アウトサ
−トケ−ス内の弾性材で保持された電極端子が、アウト
サ−トケ−スの貫通部をその長手方向に移動できる。[Operation] In the sealed semiconductor device of the present invention, the electrode terminal held by the elastic material in the outsert case can move in the longitudinal direction of the through-hole of the outsert case.
【0008】[0008]
【実施例】以下、本発明の一実施例を図1について説明
する。この図において、1および2,5ないし7は図3
の従来例の構成と略同様なのでその説明は省略する。9
は前記銅ベ−ス1の外縁にはめ合わせて固着された樹脂
製のアウトサ−トケ−スで、上部に貫通孔9aを有する
。10は一端が前記絶縁基板2上のパタ−ンに半田接続
され、他端が上記アウトサ−トケ−ス9の貫通孔9aか
ら突出されたSベント部のない電極端子、11は前記シ
リコンゲル7の上部に注入され、電極端子10をアウト
サ−トケ−ス9内で封止するシリコンゴムである。なお
、貫通孔9aは電極端子10の外形よりも幾分大きく形
成されている。[Embodiment] An embodiment of the present invention will be described below with reference to FIG. In this figure, 1, 2, 5 to 7 are
Since the configuration is substantially the same as that of the conventional example, the explanation thereof will be omitted. 9
is a resin outsert case that is fitted and fixed to the outer edge of the copper base 1, and has a through hole 9a in the upper part. 10 is an electrode terminal having one end soldered to the pattern on the insulating substrate 2 and the other end protruding from the through hole 9a of the outsert case 9 without an S-bent portion; 11 is an electrode terminal connected to the silicon gel 7; Silicone rubber is injected into the upper part of the outer case 9 to seal the electrode terminal 10 inside the outsert case 9. Note that the through hole 9a is formed somewhat larger than the outer shape of the electrode terminal 10.
【0009】次に、本発明の動作を図2について説明す
る。図2は、図1の矢印方向からみた図で、電極端子1
0をアウトサ−トケ−ス9内に保持した状態を示す図で
あり、電極端子10はアウトサ−トケ−ス9内において
、上下方向ともに逃げのための所定のクリアランス、す
なわち下方向のクリアランスa,上方向のクリアランス
bにて保持されている。この保持方式により、図1の電
極端子10と銅厚箔付の絶縁基板2が半田接合された状
態で、電極端子10はアウトサ−トケ−ス9にしてフリ
−となる。図3の従来の半導体装置では、この状態でシ
リコンゲル7を注入して降下した後、エポキシ樹脂8に
で電極端子4とアウトサ−トケ−ス3を固着させてしま
うため、ヒ−トサイクル試験では繰り返し荷重が直接半
田接合部に加わる。しかし、本発明のように、エポキシ
樹脂をシリコンゴム11に変更するとともに、貫通孔9
aを設けたことにより、電極端子10はシリコンゴム1
1にて保持させた状態で、その長手方向に自在に移動で
き、熱膨張による電極端子10の半田接合部に加わる力
をなくすことができる。Next, the operation of the present invention will be explained with reference to FIG. FIG. 2 is a view seen from the direction of the arrow in FIG.
0 is held in the outsert case 9, and the electrode terminal 10 has a predetermined clearance for escape in both the vertical direction within the outsert case 9, that is, the downward clearance a, It is held with an upward clearance b. With this holding method, the electrode terminal 10 becomes free in the outsert case 9 while the electrode terminal 10 shown in FIG. 1 and the insulating substrate 2 with thick copper foil are soldered together. In the conventional semiconductor device shown in FIG. 3, after the silicon gel 7 is injected and lowered in this state, the electrode terminal 4 and the outsert case 3 are fixed with the epoxy resin 8, so the heat cycle test is not performed. In this case, repeated loads are applied directly to the solder joint. However, as in the present invention, the epoxy resin is changed to silicone rubber 11, and the through hole 9
By providing a, the electrode terminal 10 is made of silicone rubber 1.
1 can be freely moved in the longitudinal direction, and the force applied to the solder joint of the electrode terminal 10 due to thermal expansion can be eliminated.
【0010】なお、本発明では、電極端子10を保持す
るのにシリコンゴム11を使用したが、電極端子10を
弾性的に指示し、かつ封止できれば他の材料でも良く、
上記実施例と同様の効果を奏する。In the present invention, silicone rubber 11 is used to hold the electrode terminal 10, but other materials may be used as long as they can elastically support the electrode terminal 10 and seal it.
The same effects as in the above embodiment are achieved.
【0011】[0011]
【発明の効果】以上説明したように、本発明によれば、
アウトサ−トケ−ス内に弾性材を封入して電極端子を保
持するとともに、電極端子を長手方向に移動できるよう
に構成したので、電極端子のSベント部をなくすことが
でき、インダクタンスを減少させ、かつコスト低減が図
れる。また、半田接合部の剥離がなくなり、品質の向上
が図れる効果がある。[Effects of the Invention] As explained above, according to the present invention,
An elastic material is enclosed in the outsert case to hold the electrode terminal, and the electrode terminal is configured to be movable in the longitudinal direction, so the S-bent part of the electrode terminal can be eliminated, reducing inductance. , and cost reduction can be achieved. In addition, there is no peeling of the solder joints, which has the effect of improving quality.
【図1】本発明の一実施例を示す封止型半導体装置の断
面図である。FIG. 1 is a sectional view of a sealed semiconductor device showing an embodiment of the present invention.
【図2】図1における電極端子を保持した状態を示す断
面図である。FIG. 2 is a sectional view showing a state in which the electrode terminal in FIG. 1 is held.
【図3】従来の封止型半導体装置の一例を示す断面図で
ある。FIG. 3 is a cross-sectional view showing an example of a conventional sealed semiconductor device.
1 銅ベ−ス板 2 絶縁基板 5 半導体チップ 7 シリコンゲル 9 アウトサ−トケ−ス 9a 貫通孔 10 電極端子 11 シリコンゴム 1 Copper base plate 2 Insulating substrate 5 Semiconductor chip 7 Silicon gel 9 Outsert case 9a Through hole 10 Electrode terminal 11 Silicone rubber
Claims (1)
と、このベ−ス板の外縁に固着されたケ−スと、一端が
このケ−スの上部を貫通するとともに、他端が前記半導
体チップに電気的に接続された電極端子と、前記ケ−ス
内の略下半分を封止するゲル状封止材と、略上半分を封
止する固体状封止材とで構成された封止型半導体装置に
おいて、前記ケ−スに前記電極端子の一端が貫通する貫
通孔を前記電極端子の外形より大きく形成するとともに
、前記ケ−ス内の上半分の封止材に弾性材を使用したこ
とを特徴とする封止型半導体装置。Claim 1: A base plate on which a semiconductor chip is mounted; a case fixed to the outer edge of the base plate; one end passing through the upper part of the case; an electrode terminal whose end is electrically connected to the semiconductor chip; a gel-like encapsulant that seals approximately the lower half of the inside of the case; and a solid encapsulant that seals approximately the upper half of the case. In the sealed semiconductor device configured, a through hole through which one end of the electrode terminal passes is formed in the case to be larger than the outer shape of the electrode terminal, and a through hole is formed in the sealing material in the upper half of the case. A sealed semiconductor device characterized by using an elastic material.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6034191A JPH04312966A (en) | 1991-03-25 | 1991-03-25 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6034191A JPH04312966A (en) | 1991-03-25 | 1991-03-25 | Resin-sealed semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04312966A true JPH04312966A (en) | 1992-11-04 |
Family
ID=13139368
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6034191A Pending JPH04312966A (en) | 1991-03-25 | 1991-03-25 | Resin-sealed semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04312966A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005057875A (en) * | 2003-08-04 | 2005-03-03 | Mitsubishi Electric Corp | Inverter device |
CN104934393A (en) * | 2014-03-20 | 2015-09-23 | 三菱电机株式会社 | Semiconductor device |
-
1991
- 1991-03-25 JP JP6034191A patent/JPH04312966A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005057875A (en) * | 2003-08-04 | 2005-03-03 | Mitsubishi Electric Corp | Inverter device |
CN104934393A (en) * | 2014-03-20 | 2015-09-23 | 三菱电机株式会社 | Semiconductor device |
JP2015185561A (en) * | 2014-03-20 | 2015-10-22 | 三菱電機株式会社 | semiconductor device |
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