JPH0430739B2 - - Google Patents

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Publication number
JPH0430739B2
JPH0430739B2 JP23720983A JP23720983A JPH0430739B2 JP H0430739 B2 JPH0430739 B2 JP H0430739B2 JP 23720983 A JP23720983 A JP 23720983A JP 23720983 A JP23720983 A JP 23720983A JP H0430739 B2 JPH0430739 B2 JP H0430739B2
Authority
JP
Japan
Prior art keywords
semiconductor substrate
development
spinner
rinsing
rinse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP23720983A
Other languages
Japanese (ja)
Other versions
JPS60130123A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP23720983A priority Critical patent/JPS60130123A/en
Publication of JPS60130123A publication Critical patent/JPS60130123A/en
Publication of JPH0430739B2 publication Critical patent/JPH0430739B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/30Imagewise removal using liquid means
    • G03F7/3021Imagewise removal using liquid means from a wafer supported on a rotating chuck

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Description

【発明の詳細な説明】 [発明の技術分野] この発明は半導体装置の製造方法に関し、さら
に詳細には従来よりも精密なレジストパターンの
形成を可能にする改良された半導体装置の製造方
法に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an improved method for manufacturing a semiconductor device that enables formation of a resist pattern more precise than conventional methods. It is.

[発明の技術的背景] 半導体装置の高集積化と歩留り向上のためには
リソグラフイ技術を中心とする半導体装置製造技
術の高度化と成熟化とが必要であり、特に半導体
装置の製造歩留りを向上するためにはリソグラフ
イ技術等の成熟化が必要である。
[Technical Background of the Invention] In order to increase the degree of integration and yield of semiconductor devices, it is necessary to advance and mature semiconductor device manufacturing technology centered on lithography technology. In order to improve, it is necessary to mature lithography technology.

従来、量産化されている半導体装置のリソグラ
フイ工程、特にレジストパターン形成工程は、既
によく知られているように、次のような方法で行
われている。すなわち、半導体基板の主面上もし
くは該基板の酸化膜上に例えばネガ型レジストか
らなるレジスト膜を形成させた後、所定のパター
ンのマスク等を用いて選択露光を行い、さらにス
ピンナ等で該半導体基板を回転させつつ、該半導
体基板上に例えばキシレン系の現像液を滴下して
該レジスト膜の露光部分を現像し、引き続いて該
半導体基板を回転させつつ酢酸エステルを含むリ
ンス液を滴下して該レジスト膜の非露光部分を洗
浄することにより該半導体基板上に所定のレジス
トパターンを形成している。
2. Description of the Related Art Hitherto, the lithography process of mass-produced semiconductor devices, particularly the resist pattern forming process, has been carried out by the following method, as is already well known. That is, after forming a resist film made of, for example, a negative resist on the main surface of a semiconductor substrate or on an oxide film of the substrate, selective exposure is performed using a mask with a predetermined pattern, and then the semiconductor is further exposed using a spinner or the like. While rotating the substrate, a xylene-based developer is dropped onto the semiconductor substrate to develop the exposed portion of the resist film, and subsequently, while rotating the semiconductor substrate, a rinsing solution containing acetate is dropped. A predetermined resist pattern is formed on the semiconductor substrate by cleaning the non-exposed portions of the resist film.

このような従来のレジストパターン形成工程に
おいては、現像工程とリンス工程とを同一スピン
ナを用いて同一回転速度で連続して行う方法が一
般的であるが、現像工程の終期とリンス工程の初
期とを多少、オーバーラツプさせてもレジストパ
ターン形成結果に変化はないので生産能率の向上
のために現像工程の終期とリンス工程の初期とを
わずかにオーバーラツプさせて行う方法も行われ
ている。しかしながら、後者の方法(すなわち現
像工程とリンス工程とをわずかにオーバーラツプ
させる方法においてもスピンナ回転速度を一定に
保つておくことは前者の方法(すなわち現像工程
とリンス工程とをオーバーラツプさせぬ方法)と
同じである。
In such conventional resist pattern forming processes, it is common to perform the development process and the rinsing process consecutively using the same spinner at the same rotational speed. There is no change in the result of resist pattern formation even if the resist patterns are slightly overlapped, so in order to improve production efficiency, a method is also used in which the final stage of the developing process and the initial stage of the rinsing process are slightly overlapped. However, keeping the spinner rotation speed constant even in the latter method (i.e., a method in which the developing process and the rinsing process are slightly overlapped) is different from the former method (i.e., in which the developing process and the rinsing process are not overlapped). It's the same.

[背景技術の問題点] 前記のごとき従来方法(すなわち、現像工程と
リンス工程とを通じてスピンナ回転速度を一定に
保つておくレジストパターン形成方法)において
は次のような問題点があつた。
[Problems with Background Art] The conventional method described above (that is, the resist pattern forming method in which the spinner rotational speed is kept constant throughout the developing process and the rinsing process) has the following problems.

現像工程では半導体基板上に滴下された揮発性
の現像液が未露光のレジスト膜部分を溶解した後
に蒸発して蒸気となり、真空排気装置等により現
像室外へ排出されるが、回転している半導体基板
上から振りとばされた現像液のうち現像室壁面等
に付着した現像液やリンス工程移行直前に滴下さ
れた現像液等は現像室外への排出が遅れ、これら
の残留現像液蒸気がリンス工程の初期に冷却され
て液化し、半導体基板に再付着するという現象が
起る。このため、現像液に溶解されていたフオト
レジストが再付着し、第1図に示すように、レジ
ストパターン形成工程終了後の時点においてレジ
ストパターン3の開口3a内に再付着レジスト4
が残つていることがあり、その結果、パターン形
成不良が生じる原因となつていた。なお、第1図
において、1は半導体基板、2はSiO2膜、3は
レジストパターンである。
In the development process, a volatile developer that is dropped onto the semiconductor substrate dissolves the unexposed resist film portion, evaporates into vapor, and is discharged outside the development chamber by a vacuum evacuation device, etc. Of the developer that has been shaken off from the substrate, the developer that has adhered to the walls of the development chamber, or the developer that has been dripped just before the rinsing process is discharged outside the development chamber is delayed, and these residual developer vapors are removed from the rinsing process. A phenomenon occurs in which the material is cooled and liquefied at the beginning of the process, and then re-attached to the semiconductor substrate. For this reason, the photoresist that had been dissolved in the developer re-deposit, and as shown in FIG.
may remain, resulting in poor pattern formation. In FIG. 1, 1 is a semiconductor substrate, 2 is a SiO 2 film, and 3 is a resist pattern.

それゆえ、このような問題点を解決するため
に、従来、現像液蒸気の再液化防止と急速排気及
びスピンナ回転速度の変更等が試みられてきたが
完全な解決には至つていない。このような種々の
試みの中で現像工程及びリンス工程におけるスピ
ンナ速度を高速化した場合、現像時間及びリンス
時間を長くしないと未露光のレジストを完全に除
去することができないということが判明するとと
もに、逆にスピンナの回転数を低くした場合には
半導体基板の周辺に未露光レジストが再付着する
という現象が起ることも明らかになつている。
Therefore, in order to solve these problems, attempts have been made to prevent the developer vapor from re-liquefying, to rapidly exhaust the vapor, to change the spinner rotation speed, etc., but a complete solution has not been achieved. Among these various attempts, it became clear that when the spinner speed in the development and rinsing steps was increased, the unexposed resist could not be completely removed unless the development and rinsing times were increased. Conversely, it has been found that when the rotational speed of the spinner is lowered, a phenomenon occurs in which unexposed resist is redeposited around the semiconductor substrate.

[発明の目的] この発明の目的は、前記のごとき問題点を解決
し、レジストパターン形成不良を生じさせない改
良された半導体装置の製造方法を提供することで
ある。
[Object of the Invention] An object of the present invention is to solve the above-mentioned problems and provide an improved method for manufacturing a semiconductor device that does not cause defects in resist pattern formation.

[発明の概要] 本発明者はスピンナ回転速度を様々に変化させ
つつレジストパターンの形成状態を観測する実験
を繰り返した結果、本発明の方法によれば、前記
のごときレジスト再付着現象を完全に抑制できる
ことを発見した。本発明の方法は特許請求の範囲
に記載したように、現像工程とリンス工程との間
に現像液供給とリンス液供給とを同時に行う現像
−リンスオーバーラツプ工程を設けるとともに、
該現像−リンスオーバーラツプ工程におけるスピ
ンナ回転速度を現像工程及びリンス工程のスピン
ナ回転速度の4倍以上の速度に増進することを特
徴とするものである。本発明の方法によれば、レ
ジスト再付着減少は全く発生しなくなり、その結
果、レジストパターンの不良による不良品発生率
は著しく減少した。
[Summary of the Invention] As a result of repeated experiments in which the formation state of a resist pattern was observed while varying the spinner rotation speed, the present inventor found that the method of the present invention completely suppresses the resist re-deposition phenomenon described above. I discovered that it can be suppressed. As described in the claims, the method of the present invention includes a development-rinse overlap step in which a developer and a rinse are supplied simultaneously between the development and rinsing steps.
The present invention is characterized in that the spinner rotational speed in the development-rinse overlap step is increased to a speed four times or more higher than the spinner rotational speed in the development and rinsing steps. According to the method of the present invention, no reduction in resist redeposition occurs at all, and as a result, the incidence of defective products due to defective resist patterns is significantly reduced.

[発明の実施例] 多数の半導体基板を供試片として準備し、該半
導体基板上にネガ型レジストを所定の厚さに塗布
した後、ベイクを行つてレジスト膜を形成した。
さらに露光装置で所定のパターンを該レジスト膜
上に選択露光することにより該レジスト膜に該所
定パターンの潜像を形成した。
[Example of the Invention] A large number of semiconductor substrates were prepared as test pieces, and a negative resist was coated on the semiconductor substrates to a predetermined thickness, and then baked to form a resist film.
Furthermore, a latent image of the predetermined pattern was formed on the resist film by selectively exposing the resist film to a predetermined pattern using an exposure device.

次に現像装置のスピンナに該半導体基板を取付
け、該スピンナを1000rpmで回転させつつキシレ
ン系の現像液を該半導体基板上の該レジスト膜に
吹き付けることにより現像を行つた。
Next, the semiconductor substrate was attached to a spinner of a developing device, and development was performed by spraying a xylene-based developer onto the resist film on the semiconductor substrate while rotating the spinner at 1000 rpm.

10秒間経過後、現像液の吹付けに重畳させて酢
酸エステル系のリンス液の吹付けを、5秒間行つ
た。この現像−リンスオーバーラツプ工程におい
ては供試片の各群毎にスピンナ回転速度を
1000rpm〜5000rpmの範囲で変化させた。
After 10 seconds had elapsed, an acetate ester rinse solution was sprayed for 5 seconds in addition to the developer spray. In this development-rinse overlap process, the spinner rotation speed is adjusted for each group of specimens.
It was varied in the range of 1000rpm to 5000rpm.

次いで、現像液の吹付けを停止してリンス液の
吹付けのみを行うとともにスピンナ回転速度を
1000rpmに減速させ、この回転速度でリンスを行
つた。
Next, the spraying of the developer is stopped and only the rinsing solution is sprayed, and the spinner rotation speed is increased.
The speed was reduced to 1000 rpm, and rinsing was performed at this rotational speed.

そして、10秒間経過後、リンス液吹付けを停止
するとともにスピンナ回転速度を増加して乾燥を
行つた。
After 10 seconds had elapsed, spraying of the rinse liquid was stopped and the spinner rotation speed was increased to perform drying.

以上のごとき工程を経た各供試片に対してレジ
ストパターンの形成不良に基因する不良品発生率
と前記現像−リンスオーバーラツプ工程における
スピンナ回転速度との関係を調べてみたところ、
第2図のごときグラフが得られた。
When examining the relationship between the incidence of defective products due to defective resist pattern formation and the spinner rotation speed in the development-rinse overlap process for each test piece that underwent the above steps, we found that:
A graph as shown in FIG. 2 was obtained.

第2図において、縦軸はレジストパターンの欠
陥がない良品率ε(%)の値、横軸は現像−リン
スオーバーラツプ工程におけるスピンナ回転数N
(rpm)を表わし、また曲線はεとNとの関係を
示している。
In Figure 2, the vertical axis is the value of the good product rate ε (%) with no defects in the resist pattern, and the horizontal axis is the spinner rotation speed N in the development-rinse overlap process.
(rpm), and the curve shows the relationship between ε and N.

第2図から、現像−リンスオーバーラツプ工程
におけるスピンナ回転数が4000rpm以上であると
良品率はほぼ100%となつて飽和することがわか
る。従つて、現像−リンスオーバーラツプ工程を
設け、該工程におけるスピンナ回転速度を
4000rpm以上に設定すれば、レジストパターンの
形成不良に基く不良品率をほぼ零にすることがで
きることになる。ちなみに、従来の製造方法では
前記良品率は最高でも95%であり、5%の不良品
率が発生することは避けられなかつた。
From FIG. 2, it can be seen that when the spinner rotation speed in the development-rinse overlap step is 4000 rpm or more, the non-defective product rate becomes approximately 100% and becomes saturated. Therefore, a development-rinse overlap process is provided, and the spinner rotation speed in this process is
If the rotation speed is set to 4000 rpm or more, the rate of defective products due to poor formation of resist patterns can be reduced to almost zero. Incidentally, in the conventional manufacturing method, the above-mentioned good product rate is at most 95%, and it is inevitable that a 5% defective product rate occurs.

[発明の効果] 以上の実施例によつて説明したように、本発明
方法によれば、従来根絶できなかつたレジストパ
ターン形成不良に基因する不良品発生率をほぼ零
にすることができ、その結果、半導体装置の製造
における歩留りを向上することができるととも
に、より精密なパターニング及び高集積化が可能
になつた。
[Effects of the Invention] As explained in the above embodiments, according to the method of the present invention, the incidence of defective products due to resist pattern formation defects, which could not be eradicated in the past, can be reduced to almost zero. As a result, the yield in manufacturing semiconductor devices can be improved, and more precise patterning and higher integration have become possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の方法で形成されたレジストパタ
ーンを有する半導体装置の断面図、第2図は本発
明方法による効果を説明するためのグラフであ
る。 1…半導体基板、2…SiO2膜、3…レジスト
パターン、3a…(レジストパターン3の)開
口、4…再付着レジスト。
FIG. 1 is a cross-sectional view of a semiconductor device having a resist pattern formed by a conventional method, and FIG. 2 is a graph for explaining the effects of the method of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... SiO 2 film, 3... Resist pattern, 3a... Opening (of resist pattern 3), 4... Redeposited resist.

Claims (1)

【特許請求の範囲】 1 半導体基板の主面上もしくは半導体基板の主
面に形成されている被膜上のいずれかに被着させ
たフオトレジスト膜に対して選択露光を行つた
後、スピンナを用いて該半導体基板を回転させつ
つ現像及びリンスを行うことによつてレジストパ
ターンを形成する半導体装置の製造方法におい
て、 現像工程とリンス工程との間に現像液供給とリ
ンス液供給とを同時に行う現像−リンスオーバー
ラツプ工程を設け、該現像−リンスオーバーラツ
プ工程におけるスピンナ回転速度を該現像工程及
び該リンス工程時のスピンナ回転速度の4倍以上
の速度に増進することを特徴とする半導体装置の
製造方法。
[Scope of Claims] 1. After performing selective exposure on a photoresist film deposited either on the main surface of a semiconductor substrate or on a film formed on the main surface of a semiconductor substrate, using a spinner, In a method for manufacturing a semiconductor device in which a resist pattern is formed by developing and rinsing the semiconductor substrate while rotating the semiconductor substrate, the developing method includes simultaneously supplying a developing solution and a rinsing solution between the developing step and the rinsing step. - A semiconductor device characterized in that a rinse overlap step is provided, and the spinner rotation speed in the development-rinse overlap step is increased to a speed four times or more of the spinner rotation speed in the development step and the rinse step. manufacturing method.
JP23720983A 1983-12-17 1983-12-17 Manufacture of semiconductor device Granted JPS60130123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23720983A JPS60130123A (en) 1983-12-17 1983-12-17 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23720983A JPS60130123A (en) 1983-12-17 1983-12-17 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS60130123A JPS60130123A (en) 1985-07-11
JPH0430739B2 true JPH0430739B2 (en) 1992-05-22

Family

ID=17011995

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23720983A Granted JPS60130123A (en) 1983-12-17 1983-12-17 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60130123A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004026834B3 (en) * 2004-05-28 2005-09-08 Webasto Ag Wind sealing device for opening roof of road vehicle has net or metallic mesh hanging from thickened edge member engaged in clamping strip flexibly sealing against sliding roof

Also Published As

Publication number Publication date
JPS60130123A (en) 1985-07-11

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