JPH04306897A - Manufacture of semiconductor quantum well box - Google Patents

Manufacture of semiconductor quantum well box

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Publication number
JPH04306897A
JPH04306897A JP19265591A JP19265591A JPH04306897A JP H04306897 A JPH04306897 A JP H04306897A JP 19265591 A JP19265591 A JP 19265591A JP 19265591 A JP19265591 A JP 19265591A JP H04306897 A JPH04306897 A JP H04306897A
Authority
JP
Japan
Prior art keywords
quantum well
semiconductor quantum
semiconductor
gaas
particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19265591A
Other languages
Japanese (ja)
Other versions
JP2979752B2 (en
Inventor
Shunsuke Otsuka
俊介 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Sheet Glass Co Ltd
Original Assignee
Nippon Sheet Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Sheet Glass Co Ltd filed Critical Nippon Sheet Glass Co Ltd
Priority to JP19265591A priority Critical patent/JP2979752B2/en
Publication of JPH04306897A publication Critical patent/JPH04306897A/en
Application granted granted Critical
Publication of JP2979752B2 publication Critical patent/JP2979752B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To provide a method of manufacturing a semiconductor quantum well box whose side is a few to tens of nm long and which is uniform in size and excellent in reproducibility. CONSTITUTION:An AlGaAs layer 2 is made to grow on a GaAs substrate 1 to serve as a barrier layer. A silicon grid pattern 3 is formed thereon. Gold ultramicro-particles whose side is tens of nm long are orderly formed conforming the grid pattern 3. The pattern is removed, an AlGaAs 5 is selectively formed in a gap between the gold ultramicro-particles 4. The gold ultramicro-particles 4 are removed, and GaAs is selectively grown in holes regularly arranged to serve as a well layer. An AlGaAs layer serving as a barrier layer is formed on all the surface. The above processes are repeatedly carried, whereby GaAs quantum well boxes are formed. By this setup, semiconductor quantum well boxes regularly arranged in three dimensions can be manufactured excellent in reproducibility.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、半導体量子井戸箱の製
造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor quantum well box.

【0002】0002

【従来の技術】厚さが数nm〜数10nmの範囲で、異
なる禁制帯幅をもつ2種類の超薄膜を周期的に積み重ね
た半導体積層構造(多重量子井戸構造)では、バルク半
導体にはない物理現象が生まれ、各種デバイスに応用さ
れている。たとえば、AlGaAs/GaAs多重量子
井戸構造を活性層に利用した半導体レ−ザでは、発振し
きい値電流の低減、スペクトルライン幅の低減、高出力
化などの優れた特性が報告されてきた。前記の物理現象
は、多重量子井戸構造内で膜厚方向に周期化したポテン
シャルの底(量子井戸内部)に荷電粒子が閉じ込められ
る(量子サイズ効果)ことに起因している。一方、膜厚
方向のみならず、面内方向にも量子井戸を形成する量子
細線構造あるいは量子井戸箱構造では、荷電粒子の閉じ
込め効果がさらに顕著となり、半導体レ−ザなどのデバ
イスの特性を向上させることができる。
[Prior Art] A semiconductor stacked structure (multi-quantum well structure) in which two types of ultra-thin films with different forbidden band widths are periodically stacked in the range of several nanometers to several tens of nanometers in thickness is not found in bulk semiconductors. Physical phenomena have been created and applied to various devices. For example, semiconductor lasers using an AlGaAs/GaAs multiple quantum well structure in their active layer have been reported to have excellent characteristics such as reduced oscillation threshold current, reduced spectral line width, and increased output. The above-mentioned physical phenomenon is caused by the fact that charged particles are confined at the bottom of the potential (inside the quantum well) that is periodized in the film thickness direction within the multi-quantum well structure (quantum size effect). On the other hand, in quantum wire structures or quantum well box structures in which quantum wells are formed not only in the film thickness direction but also in the in-plane direction, the effect of confining charged particles becomes even more pronounced, improving the characteristics of devices such as semiconductor lasers. can be done.

【0003】量子サイズ効果の現れる一辺の長さが数n
m〜数10nmの半導体量子井戸箱を製造するために、
従来は電子ビ−ム露光技術に代表される超微細加工技術
によって試みられていた。これは、膜厚と界面の急峻性
の制御に優れた半導体積層技術を利用する方法であり、
まずはじめにMOVPE法(有機金属気相成長法)やM
BE法(分子線エピタキシ法)によって積層構造の制御
された半導体量子井戸構造を作製し、その後上記超微細
加工技術によって微細なグリッドパタ−ンをレジストな
どで形成し、これをマスクとして選択エッチングを行う
ことにより、半導体量子井戸箱を製造しようとするもの
である。(ジャ−ナル・オブ・バキュ−ム・サイエンス
.テクノロジイ(J.Vac.Sci.Technol
)B4.358(1986))。
[0003] The length of one side where the quantum size effect appears is several n
In order to manufacture a semiconductor quantum well box of m to several tens of nanometers,
Conventionally, attempts have been made to use ultra-fine processing techniques such as electron beam exposure techniques. This is a method that utilizes semiconductor stacking technology, which has excellent control over film thickness and interface steepness.
First of all, the MOVPE method (Metalorganic Vapor Phase Epitaxy) and M
A semiconductor quantum well structure with a controlled layered structure is fabricated using the BE method (molecular beam epitaxy method), and then a fine grid pattern is formed using a resist using the above-mentioned ultrafine processing technology, and selective etching is performed using this as a mask. By doing this, we intend to manufacture a semiconductor quantum well box. (J.Vac.Sci.Technology)
) B4.358 (1986)).

【0004】0004

【発明が解決しようとする課題】しかしながら、従来の
半導体量子井戸箱の製造方法においては、超微細加工技
術の加工精度が荒く、量子サイズ効果が現れる一辺の長
さが数nm〜数10nmで、かつ大きさの揃った量子井
戸箱を再現性良く製造することは困難であった。加工精
度が荒くなる原因は、選択エッチングの際のエッチング
速度の大きなばらつきやサイドエッチングなどにあった
[Problems to be Solved by the Invention] However, in the conventional manufacturing method of semiconductor quantum well boxes, the processing accuracy of ultrafine processing technology is rough, and the length of one side where the quantum size effect appears is from several nanometers to several tens of nanometers. Moreover, it has been difficult to manufacture quantum well boxes of uniform size with good reproducibility. The causes of poor processing accuracy were large variations in etching speed during selective etching and side etching.

【0005】本発明はこのような事情に鑑みなされたも
ので、積層構造を選択エッチングするという従来技術と
は異なる技術的手段によって、量子サイズ効果が現れる
一辺の長さが数nm〜数10nmでかつ大きさの揃った
半導体量子井戸箱を、加工精度よく作製するものである
The present invention was developed in view of the above circumstances, and uses a technical means different from the conventional technology of selectively etching a laminated structure to produce a structure with a side length of several nanometers to several tens of nanometers in which the quantum size effect appears. Moreover, semiconductor quantum well boxes of uniform size can be manufactured with high processing accuracy.

【0006】[0006]

【課題を解決するための手段】請求項1の半導体量子井
戸箱の製造方法は、第1の半導体材料上に金属超微粒子
を2次元的に規則正しく並べ、前記金属超微粒子間に第
1の半導体材料を選択成長させた後、前記金属超微粒子
を除去することによって形成される穴部に、前記第1の
半導体材料よりも禁制帯幅の小さな第2の半導体材料を
埋め込むことを特徴とする。
[Means for Solving the Problems] A method for manufacturing a semiconductor quantum well box according to claim 1, wherein ultrafine metal particles are regularly arranged two-dimensionally on a first semiconductor material, and the first semiconductor quantum well box is arranged between the ultrafine metal particles. After the material is selectively grown, the holes formed by removing the ultrafine metal particles are filled with a second semiconductor material having a smaller forbidden band width than the first semiconductor material.

【0007】本発明の技術的手段の第1の特徴は、結晶
成長の初期過程において形成される超微粒子が、エネル
ギ−的により安定に存在できる位置に移動することを原
理として作られる金属超微粒子を、半導体量子井戸箱を
埋め込むための穴部を精度よく作製するために利用する
ことにある。
The first feature of the technical means of the present invention is that ultrafine metal particles are produced based on the principle that ultrafine particles formed in the initial process of crystal growth move to a position where they can exist more energetically stable. The objective is to utilize this method to accurately fabricate a hole for embedding a semiconductor quantum well box.

【0008】第2の特徴は、前記穴部内の結晶面とそれ
以外の結晶面での結晶成長速度の違いを利用して、穴部
のみに目的とする半導体量子井戸箱を成長させることに
ある。
The second feature is that the desired semiconductor quantum well box is grown only in the hole by utilizing the difference in crystal growth rate between the crystal plane inside the hole and the other crystal planes. .

【0009】[0009]

【作用】本発明によれば、大きさが数nm〜数10nm
の範囲で揃い、かつ2次元的に規則正しく配列した金属
超微粒子を利用することによって、金属超微粒子と同様
の穴部を障壁層に形成することができる。さらに、以上
のように形成された穴部に半導体材料を選択成長させる
ことを利用して、穴部と同様に大きさが数nm〜数10
nmの範囲で揃い、かつ2次元的に規則的に配列した半
導体量子井戸箱を再現性良く製造することができる。ま
たこの行程を繰り返し行うことによって、3次元的に規
則正しく配列した半導体量子井戸箱を製造することがで
きる。
[Operation] According to the present invention, the size is from several nm to several tens of nm.
By using ultrafine metal particles arranged in a two-dimensional regular manner within the range of , holes similar to those of the ultrafine metal particles can be formed in the barrier layer. Furthermore, by selectively growing a semiconductor material in the hole formed as described above, we can make a material with a size ranging from several nanometers to several tens of nanometers, similar to the hole.
Semiconductor quantum well boxes that are aligned in the nanometer range and are two-dimensionally regularly arranged can be manufactured with good reproducibility. Moreover, by repeating this process, it is possible to manufacture semiconductor quantum well boxes that are regularly arranged three-dimensionally.

【0010】0010

【実施例】以下、本発明の一実施例を添付図面に基づい
て説明する。図1は本発明による半導体量子井戸箱の製
造手順を説明する図である。図1(a)に示すように、
まず始めに、面方位(100)のGaAs基板1上に障
壁層とするAlGaAs層2を100nmの厚さに通常
のMBE法によって成長した。次にMBEチャンバ内に
シランガスをチャンバ内圧力が5〜10Torrになる
ように導入し、AlGaAs層2上にグリッドパタ−ン
(縞間隔30nm)で電子ビ−ムを照射し、シリコンを
析出させた。照射に使用した電子ビ−ムは、加速電圧2
0kV、ビ−ム電流2×10−7A、ビ−ム径4nmで
、これにより幅5nmのシリコングリッドパタ−ン3が
形成された。図1(b)に示すように、シリコンによる
グリッドパタ−ン3形成後、再びチャンバ内を超高真空
状態に排気し、金を5nmの厚さに蒸着してから240
℃に加熱すると、シリコングリッドパタ−ン3に整然と
沿って一辺が約10nmの金超微粒子4が形成された。 これは、金の超微粒子の気相との界面エネルギ−よりも
シリコン固相との界面エネルギ−の方が低くく、安定に
存在できるためと考えられる。次に図1(c)、(d)
に示すように、試料をチャンバ外に取り出し、ふっ酸:
硝酸:酢酸=1:4:3の混合液でシリコングリッドパ
タ−ン3を選択エッチングすることによって除去し、A
lGaAs層2上に一辺が約10nmの金超微粒子4の
みを約10nmの間隔で残した。図1(e)に示すよう
に、その結果できた金超微粒子4間の隙間にMBE法に
よってAlGaAs5を選択成長した。その際の成長温
度は400℃である。 AlGaAs5を選択成長した後再度チャンバ外に試料
を取り出し、金超微粒子4の選択エッチングを行った。 エッチング液には水とメタノ−ルの混合溶媒(40cc
:60cc)にヨ−ド(1.2g)とヨウ化アンモニウ
ム(8g)を溶解した液を使用した。図1(f)に示す
ように、金超微粒子4をエッチングすることによってで
きる規則正しく配列した直径10nm程度の穴部6に井
戸層とするGaAsをMBE法によって選択成長した。 その際の成長温度は350〜500℃であり、この時、
結晶成長速度の面方位依存性によって穴部6のみに選択
的にGaAsの成長が起こった。GaAsを選択成長し
た後、障壁層であるAlGaAs層8を全面に成長した
。さらに以上のプロセスを繰り返すことによって、3次
元的に規則正しく配列したGaAs量子井戸箱7を製造
することができた。これをフォトルミネッセンスで評価
したところ、発光スペクトルのピ−ク位置が井戸幅10
nmのGaAs量子井戸と比較して高エネルギ−側へシ
フトしており、GaAsが量子井戸箱として機能してい
ることを確認できた。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a diagram illustrating the manufacturing procedure of a semiconductor quantum well box according to the present invention. As shown in Figure 1(a),
First, an AlGaAs layer 2 serving as a barrier layer was grown to a thickness of 100 nm on a GaAs substrate 1 having a plane orientation of (100) by a normal MBE method. Next, silane gas was introduced into the MBE chamber so that the pressure inside the chamber was 5 to 10 Torr, and the AlGaAs layer 2 was irradiated with an electron beam in a grid pattern (stripe spacing 30 nm) to deposit silicon. . The electron beam used for irradiation had an acceleration voltage of 2
A silicon grid pattern 3 with a width of 5 nm was formed at 0 kV, a beam current of 2 x 10 -7 A, and a beam diameter of 4 nm. As shown in FIG. 1(b), after forming the grid pattern 3 using silicon, the inside of the chamber was again evacuated to an ultra-high vacuum state, and gold was evaporated to a thickness of 5 nm.
When heated to .degree. C., ultrafine gold particles 4 having a side of about 10 nm were formed along the silicon grid pattern 3 in an orderly manner. This is thought to be because the interfacial energy of the ultrafine gold particles with the silicon solid phase is lower than that with the gas phase, allowing them to exist stably. Next, Figure 1(c),(d)
Take the sample out of the chamber and add hydrofluoric acid:
The silicon grid pattern 3 was removed by selective etching with a mixture of nitric acid and acetic acid = 1:4:3.
Only ultrafine gold particles 4 each having a side of about 10 nm were left on the lGaAs layer 2 at intervals of about 10 nm. As shown in FIG. 1(e), AlGaAs 5 was selectively grown in the gaps between the resulting ultrafine gold particles 4 by the MBE method. The growth temperature at that time was 400°C. After selectively growing AlGaAs 5, the sample was taken out of the chamber again, and the ultrafine gold particles 4 were selectively etched. The etching solution is a mixed solvent of water and methanol (40cc).
A solution prepared by dissolving iodine (1.2 g) and ammonium iodide (8 g) in :60 cc) was used. As shown in FIG. 1(f), GaAs to be used as a well layer was selectively grown by the MBE method in regularly arranged holes 6 having a diameter of about 10 nm, which were formed by etching the ultrafine gold particles 4. The growth temperature at that time was 350 to 500°C, and at this time,
GaAs selectively grew only in the holes 6 due to the plane orientation dependence of the crystal growth rate. After selectively growing GaAs, an AlGaAs layer 8 serving as a barrier layer was grown over the entire surface. By further repeating the above process, it was possible to manufacture GaAs quantum well boxes 7 that were regularly arranged three-dimensionally. When this was evaluated using photoluminescence, the peak position of the emission spectrum was found to be within the well width of 10
It was confirmed that the energy was shifted to the higher energy side compared to the nm GaAs quantum well, and that GaAs functioned as a quantum well box.

【0011】本実施例では、GaAs/AlGaAs系
半導体量子井戸箱の作製方法について述べたが、これに
限ることなく、たとえば、InAs/GaInAs系な
どのIII−V族化合物半導体やII−VI族化合物半
導体においても同様の半導体量子井戸箱を製造すること
ができる。
[0011] In this embodiment, a method for manufacturing a GaAs/AlGaAs based semiconductor quantum well box has been described. Similar semiconductor quantum well boxes can also be manufactured in semiconductors.

【0012】また本実施例では、結晶成長手段としてM
BE法を使用したが、これに限ることなく、MOVPE
法を使用することもできる。
Furthermore, in this embodiment, M is used as a crystal growth means.
The BE method was used, but is not limited to MOVPE.
You can also use the method.

【0013】さらに本実施例では、金属超微粒子として
金を使用したが、これに限ることなく、たとえば、アル
ミニウムなどの金属を使用することもできる。
Furthermore, although gold is used as the ultrafine metal particles in this embodiment, the present invention is not limited to this, and metals such as aluminum may also be used.

【0014】この他本実施例では、グリッドパタ−ンに
シリコンを使用したが、これに限らず、たとえば、ガリ
ウムやゲルマニウムなどの金属、カ−ボンや窒素などの
化合物をグリッドパタ−ンの材料として使用することも
できる。
In addition, although silicon is used for the grid pattern in this embodiment, the material for the grid pattern is not limited to this, and for example, metals such as gallium and germanium, and compounds such as carbon and nitrogen can be used as the material for the grid pattern. It can also be used as

【0015】[0015]

【発明の効果】本発明によれば、従来不可能であった一
辺の長さが数nm〜数10nmでかつ大きさの揃った半
導体量子井戸箱を3次元的に規則正しく配列させた構造
で、再現性良く容易に製造することができた。さらに本
発明により作製した半導体量子井戸箱を半導体レ−ザの
活性層に利用した結果、発振しきい値電流、スペクトル
ライン幅などにおいて、従来の半導体レ−ザの性能を凌
ぐ半導体量子井戸箱レ−ザを作製することができた。
Effects of the Invention According to the present invention, a structure in which semiconductor quantum well boxes having a side length of several nanometers to several tens of nanometers and uniform sizes are regularly arranged three-dimensionally, which was previously impossible, It was easy to manufacture with good reproducibility. Furthermore, as a result of using the semiconductor quantum well box produced according to the present invention in the active layer of a semiconductor laser, the semiconductor quantum well box surpasses the performance of conventional semiconductor lasers in terms of oscillation threshold current, spectral line width, etc. - I was able to create the.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】図1(a)〜(c)は本発明の実施例に係わる
半導体量子井戸箱の製造手順を説明する斜視図である。 図1(d)〜(f)は本発明の実施例に係わる半導体量
子井戸箱の製造手順を説明する断面図である。
FIGS. 1A to 1C are perspective views illustrating a manufacturing procedure of a semiconductor quantum well box according to an embodiment of the present invention. FIGS. 1(d) to 1(f) are cross-sectional views illustrating the manufacturing procedure of a semiconductor quantum well box according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1  GaAs基板 2  AlGaAs層 3  シリコングリッドパタ−ン 4  金超微粒子 5  AlGaAs 6  穴部 7  GaAs量子井戸箱 1 GaAs substrate 2 AlGaAs layer 3 Silicon grid pattern 4 Ultrafine gold particles 5 AlGaAs 6 Hole 7 GaAs quantum well box

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  第1の半導体材料上に金属超微粒子を
2次元的に規則正しく並べ、前記金属超微粒子間に第1
の半導体材料を選択成長させた後、前記金属超微粒子を
除去することによって形成される穴部に、前記第1の半
導体材料よりも禁制帯幅の小さな第2の半導体材料を埋
め込むことを特徴とする半導体量子井戸箱の製造方法。
1. Ultrafine metal particles are regularly arranged two-dimensionally on a first semiconductor material, and a first semiconductor material is arranged between the ultrafine metal particles.
After selectively growing the semiconductor material, the holes formed by removing the ultrafine metal particles are filled with a second semiconductor material whose forbidden band width is smaller than that of the first semiconductor material. A method for manufacturing a semiconductor quantum well box.
JP19265591A 1991-04-03 1991-04-03 Manufacturing method of semiconductor quantum well box Expired - Lifetime JP2979752B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19265591A JP2979752B2 (en) 1991-04-03 1991-04-03 Manufacturing method of semiconductor quantum well box

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19265591A JP2979752B2 (en) 1991-04-03 1991-04-03 Manufacturing method of semiconductor quantum well box

Publications (2)

Publication Number Publication Date
JPH04306897A true JPH04306897A (en) 1992-10-29
JP2979752B2 JP2979752B2 (en) 1999-11-15

Family

ID=16294852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19265591A Expired - Lifetime JP2979752B2 (en) 1991-04-03 1991-04-03 Manufacturing method of semiconductor quantum well box

Country Status (1)

Country Link
JP (1) JP2979752B2 (en)

Also Published As

Publication number Publication date
JP2979752B2 (en) 1999-11-15

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