JPH04305965A - Multichip module and manufacture thereof - Google Patents

Multichip module and manufacture thereof

Info

Publication number
JPH04305965A
JPH04305965A JP3069738A JP6973891A JPH04305965A JP H04305965 A JPH04305965 A JP H04305965A JP 3069738 A JP3069738 A JP 3069738A JP 6973891 A JP6973891 A JP 6973891A JP H04305965 A JPH04305965 A JP H04305965A
Authority
JP
Japan
Prior art keywords
chip
cooling
fins
chip module
water
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3069738A
Other languages
Japanese (ja)
Inventor
Kuninori Imai
今井 邦典
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3069738A priority Critical patent/JPH04305965A/en
Publication of JPH04305965A publication Critical patent/JPH04305965A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Abstract

PURPOSE:To propose a water cooling system for electronic computers which are greater in cooling performance and moreover excellent in assemblability. CONSTITUTION:An insulation board 6 is bonded (soldered or the like) on chips 2 laid out on a board 1. A border board is arranged to come into contact on this layout. Cooling fins 5 are bonded on the board 4 at a relative position to the chips. When a hat 7 is caped on the fins and water is adapted to flow, the water forcibly runs in the cooling fins, thereby enabling the heat generated from the chips to be removed efficiently. There are proposed different systems which enhance assemblability, such as sealing structure which uses an O ring at an adjustment stage and air-tight sealing structure at an adjustment end stage.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、マルチチップモジュー
ル、特に大集積回路チップを使用したマルチチップモジ
ュールからの発生熱を効果的に取り去るための、冷却構
造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cooling structure for effectively removing heat generated from a multi-chip module, particularly a multi-chip module using large integrated circuit chips.

【0002】0002

【従来の技術】大型電子計算機に使用するマルチチップ
モジュールは、一枚の配線基板上に複数の集積回路を実
装した構造から成り、そのチップからの発生熱を除去す
る冷却技術は、電子計算機の性能を左右するため、極め
て重要である。冷却方式としては、従来の空冷方式から
、近年は水冷方式に移行しつつあり、いくつかの提案が
なされている。その一例として、特開昭59−2004
95においては、図5に示すように、チップ2の上面に
個々に冷却構造体101を取り付け、冷却構造体同志を
ベローズのような可撓性を有するパイプ102を用いて
接続する方式を採用していた。この方式によれば、冷却
性能が極めて優れていることが実証されている。しかし
、この方式に基づいてモジュールを組立てようとした場
合、構造が複雑なため非常に煩雑な組立て工数を要し、
信頼性良く冷却構造体を完成させるには、非常に高度な
技術を必要としていた。
[Prior Art] Multi-chip modules used in large-scale electronic computers have a structure in which multiple integrated circuits are mounted on a single wiring board. This is extremely important as it affects performance. In recent years, the cooling method has been shifting from the conventional air cooling method to a water cooling method, and several proposals have been made. As an example, JP-A-59-2004
95, as shown in FIG. 5, a method is adopted in which cooling structures 101 are individually attached to the top surface of the chip 2, and the cooling structures are connected using flexible pipes 102 such as bellows. was. This method has been proven to have extremely excellent cooling performance. However, when trying to assemble a module based on this method, the structure is complex, so it requires a lot of assembly man-hours.
Very advanced technology was required to complete the cooling structure with high reliability.

【0003】0003

【発明が解決しようとする課題】本発明の目的は、組立
性に優れ、かつ冷却性能にも優れた冷却構造体を提供す
ることにある。特に、組立を難しくする最も大きな要因
となっていたベローズを省略し、構造を簡略化すること
を目的とする。更に、本発明の他の目的は、製造技術上
避けられない各チップ間の高さのばらつきによって冷却
効率が左右されない冷却構造を提供することにある。ま
た、更に他の目的は、集積回路チップが故障した場合な
どに、容易にチップを交換できるマルチチップモジュー
ルを提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a cooling structure that is easy to assemble and has excellent cooling performance. In particular, the purpose is to simplify the structure by omitting the bellows, which was the biggest factor that made assembly difficult. Furthermore, another object of the present invention is to provide a cooling structure in which cooling efficiency is not affected by variations in height between chips that are unavoidable due to manufacturing technology. Still another object is to provide a multi-chip module in which chips can be easily replaced in the event that an integrated circuit chip fails.

【0004】0004

【課題を解決するための手段】上記目的を達成するため
に、本発明では、可撓性を有する境界板上に、冷却しよ
うとする個々のチップに対応する位置にフィンを配列し
、この境界板をチップに接触させた状態で、フィンに冷
媒(冷却水等)を強制的に流して冷却することを特徴と
する。
[Means for Solving the Problems] In order to achieve the above object, in the present invention, fins are arranged on a flexible boundary plate at positions corresponding to individual chips to be cooled. The chip is cooled by forcing a refrigerant (cooling water, etc.) to flow through the fins while the plate is in contact with the chip.

【0005】[0005]

【作用】このような構造に冷媒を流した場合、境界板は
可撓性を有するため、冷媒の圧力によっていチップに押
しつけられ、個々のチップが配列誤差により多少高さが
ばらついたり傾いていても、それにならって接触し、チ
ップからの発熱は境界板からフィンを通って冷媒に伝え
られる。
[Operation] When refrigerant is flowed through such a structure, since the boundary plate is flexible, it is pressed against the chips by the pressure of the refrigerant, causing the individual chips to vary in height or tilt due to alignment errors. The heat generated from the chip is transferred from the boundary plate to the refrigerant through the fins.

【0006】この構造において、フィンがなくてもある
程度の冷却性能はあるが、冷却性能を高めるためにはフ
ィンを設けて伝熱面積を増すことが極めて有効である。 また、熱の伝導効率を上げるためには、熱が伝導する経
路の熱抵抗をできるだけ小さくすることが重要である。 このために、フィンや境界板には熱伝導率の大きな素材
を用い、両者の間は半田付け又はろう付け等、熱伝導率
が大きな金属で接続する。また、チップと境界板の間は
、接触させる方式であるが、これの熱抵抗を小さくする
ためには、ヘリウムのような高熱伝導性気体を充填する
。又は熱伝導グリース等を塗布する等が効果的である。
Although this structure has a certain degree of cooling performance even without fins, it is extremely effective to increase the heat transfer area by providing fins in order to improve the cooling performance. Furthermore, in order to increase the heat conduction efficiency, it is important to minimize the thermal resistance of the heat conduction path. For this purpose, a material with high thermal conductivity is used for the fins and the boundary plate, and the two are connected by a metal with high thermal conductivity, such as by soldering or brazing. Furthermore, although the chip and the boundary plate are brought into contact with each other, in order to reduce the thermal resistance, a highly thermally conductive gas such as helium is filled. Alternatively, it is effective to apply thermal conductive grease or the like.

【0007】[0007]

【実施例】以下、本発明を実施例に基づいて詳細に説明
する。
EXAMPLES The present invention will be explained in detail below based on examples.

【0008】図1は、本発明の一実施例である。基板1
の上に、10mm2のチップ2がCCB(Contro
lled  CollapseBonding)法によ
り4行×4列配列された場合を示しており、モジュール
の構造を、一部を断面により表している。
FIG. 1 shows an embodiment of the present invention. Board 1
A 10mm2 chip 2 is placed on top of the CCB (Control
This figure shows a case in which the modules are arranged in 4 rows by 4 columns using the Collapse Bonding method, and the structure of the module is partially represented by a cross section.

【0009】境界板4の上には、冷却しようとするチッ
プの反対側の面上に、個々のチップに対応してフィン5
が4行×4列配列されている。ここで、境界板4には厚
さが0.2mmの銅板を、またフィン5には、銅のブロ
ックを切削して、5のような形状のフィン(各フィンの
厚さが0.2mm、間隔0.2mm、高さ2mmであり
、10mm2×0.5mm(t)の底板上に一体で成形
されたもの)をそれぞれ使用し、両者は銀ろう付けによ
り接合されている。
On the boundary plate 4, on the surface opposite to the chips to be cooled, fins 5 are provided corresponding to each chip.
are arranged in 4 rows x 4 columns. Here, a copper plate with a thickness of 0.2 mm is used for the boundary plate 4, and a copper block is cut for the fins 5 to form fins in the shape of 5 (each fin has a thickness of 0.2 mm, They are 0.2 mm apart, 2 mm high, and integrally molded on a 10 mm 2 x 0.5 mm (t) bottom plate, and both are joined by silver brazing.

【0010】一方、境界板のチップに接触する側の面に
は、絶縁板6を接合した。これは、チップの裏面が零電
位の場合には不必要であるが、本実施例では零電位では
なかったため、境界板4によって全てのチップが電気的
に導通することを防止する目的で設けたものである。こ
の絶縁板には、熱伝導率が大きく電気絶縁性が大きな材
料が好適であり、SiC(ヒタセラムSC−101:登
録商標)のようなセラミクスも好適である。しかし今回
は、高熱伝導性AlNセラミクスの板(10×10×0
.3mm)の片面にTi−Ni−Auの蒸着を施し、高
融点半田(Au−Sn−融点280℃)を用いて境界板
に接合した。(半田は上記に限られず、この後の工程で
使用する半田よりも融点が高いものならば適宜選択可能
。また、絶縁板の厚さは、薄いほど熱抵抗は小さくなる
が、接合時の作業性も考慮すれば0.2〜0.5mmが
好適である。)上記のように準備した境界板を、図1に
示したようにハット7に接合した。ハット7には、一対
の給・排水口72、またフィンに冷媒を流通させるため
に隔壁71が設けられている。基板1と熱膨張率が近い
コバールで製作し、金めっきを施した。このハットに境
界板を接合する場合、フィン5を隔壁71で形成される
溝(図3における冷媒通路76)に挿入した状態で、フ
ランジ部75の下面751を半田で気密封止した。なお
、これと同時に境界板4の反対面に、ハット7と同じ材
質(コバールに金めっき)で製作したスペーサ73(四
角い断面の額縁状)をも半田で気密封止した。 この場合の半田には、絶縁板6を接合したものより融点
が低いもの(Sn−Ag−融点221℃)を使用し、真
空炉内で一括リフローした。なお、ハットのフランジ部
に設けた溝74は、半田リフロー時に、フランジ部の熱
容量を小さくし、また半田の接続範囲を明確にする目的
で設けたものである。
On the other hand, an insulating plate 6 was bonded to the surface of the boundary plate that was in contact with the chip. This is unnecessary when the back surface of the chip is at zero potential, but in this example, since it was not at zero potential, it was provided for the purpose of preventing all the chips from being electrically connected by the boundary plate 4. It is something. A material having high thermal conductivity and high electrical insulation properties is suitable for this insulating plate, and ceramics such as SiC (Hitaceram SC-101: registered trademark) are also suitable. However, this time, we will use a plate of high thermal conductivity AlN ceramics (10 x 10 x 0
.. Ti-Ni-Au was vapor-deposited on one side of the 3mm) and bonded to the boundary plate using high melting point solder (Au-Sn - melting point 280°C). (Solder is not limited to the above, and can be selected as long as it has a higher melting point than the solder used in the subsequent process.Also, the thinner the insulating plate is, the lower the thermal resistance will be, (0.2 to 0.5 mm is preferable considering the properties.) The boundary plate prepared as described above was joined to the hat 7 as shown in FIG. The hat 7 is provided with a pair of supply/drain ports 72 and a partition wall 71 for circulating the refrigerant to the fins. It was made of Kovar, which has a coefficient of thermal expansion similar to that of the substrate 1, and was plated with gold. When joining the boundary plate to this hat, the lower surface 751 of the flange portion 75 was hermetically sealed with solder while the fins 5 were inserted into the grooves (refrigerant passages 76 in FIG. 3) formed by the partition wall 71. At the same time, a spacer 73 (frame-shaped with a square cross section) made of the same material as the hat 7 (gold-plated Kovar) was hermetically sealed with solder on the opposite surface of the boundary plate 4. In this case, a solder having a lower melting point than that used to bond the insulating plates 6 (Sn-Ag - melting point 221° C.) was used, and the solder was reflowed all at once in a vacuum furnace. Note that the groove 74 provided in the flange portion of the hat is provided for the purpose of reducing the heat capacity of the flange portion and clarifying the solder connection range during solder reflow.

【0011】リフロー後の接続面751は、ハットに冷
媒を流したときに漏れてはならず、気密封止することが
必要である。また、反対側のスペーサとの接合面731
も、Heを封入することを考慮すれば、気密封止が必要
である。
[0011] The connection surface 751 after reflow must not leak when refrigerant is flowed through the hat, and must be hermetically sealed. Also, the joint surface 731 with the spacer on the opposite side
Also, when considering the inclusion of He, airtight sealing is required.

【0012】このように準備した冷却構造体を基板の上
に載せれば、外観的には一応完成である。ここで、スペ
ーサ73と基板1との境界面10の接続方法には、チッ
プ2と絶縁板6との間の熱的接触方法によって二つの方
法が可能である。すなわち、チップ2と絶縁板6との間
が、単純な接触、又は熱伝導性グリースを塗った状態で
接触させる場合には、境界面10は必ずしも気密封止を
必要とせず、単純なねじ止め構造、又はOリングを介し
てねじ止めする構造などが可能である。この場合には、
組立て後チップに電気的に不具合が認められた場合には
、その交換は極めて容易である。
[0012] When the cooling structure prepared in this manner is placed on the substrate, the structure is completed in appearance. Here, two methods are possible for connecting the interface 10 between the spacer 73 and the substrate 1 depending on the method of thermal contact between the chip 2 and the insulating plate 6. That is, when the chip 2 and the insulating plate 6 are in simple contact or in contact with each other with thermally conductive grease applied, the interface 10 does not necessarily need to be hermetically sealed and may be simply screwed together. It is possible to use a structure in which it is screwed through an O-ring. In this case,
If the chip is found to be electrically defective after assembly, it is extremely easy to replace it.

【0013】一方、チップ2と絶縁板6との接触面にH
eを封入する場合には、境界面10を気密封止すること
が必要である。この方法として、これまで使用してきた
半田よりも融点が低い半田(例えば、Pb−Sn半田−
融点183℃)を用いて、リフローする方法が好適であ
る。
On the other hand, H is formed on the contact surface between the chip 2 and the insulating plate 6.
When encapsulating e, it is necessary to hermetically seal the interface 10. This method uses solder that has a lower melting point than the solders that have been used so far (for example, Pb-Sn solder).
A reflow method using a melting point of 183° C. is preferred.

【0014】上記のような二つの方法に関し、本実施例
では、二つを併用した。すなわち、スペーサ73の境界
面10には、その中心線に沿ってOリング8をはめるた
めの溝を一周させて設け、電気回路の調整段階ではOリ
ングを用いて冷却しながら回路調整を行い、調整が終了
した段階で気密封止して、Heを封入した。Heの封入
は、スペーサ73の1箇所に図2に示すように、パイプ
9を接続しておき、このパイプから真空排気したのちH
eを送給し、最後にパイプ9を封止切りをした。
[0014] Regarding the above two methods, in this example, two were used in combination. That is, a groove for fitting the O-ring 8 is provided around the boundary surface 10 of the spacer 73 along its center line, and in the stage of adjusting the electric circuit, the circuit is adjusted while being cooled using the O-ring. When the adjustment was completed, it was hermetically sealed and He was encapsulated. To enclose He, connect a pipe 9 to one place of the spacer 73 as shown in FIG.
Finally, pipe 9 was sealed and cut.

【0015】このように組立てた冷却構造体の冷却機能
について説明する。すなわち、一対の吸・排水口72を
通じて、冷媒として冷却水を流した場合、その水圧によ
って図3に示すように境界板4がたわみ、チップ2の姿
勢に応じて接触し、この結果高熱伝導性が保証されるも
のである。この機能を十分に発揮させるには、次の2点
に留意することが必要である。
The cooling function of the cooling structure assembled in this way will be explained. That is, when cooling water is flowed as a refrigerant through the pair of suction/drainage ports 72, the boundary plate 4 is deflected by the water pressure as shown in FIG. is guaranteed. In order to make full use of this function, it is necessary to keep the following two points in mind.

【0016】(1) 冷媒通路76の寸法に、フィン5
が回転するための余裕を持たせること:境界板のたわみ
性を利用するには、フィン5がハットの隔壁71に接触
して回転が妨げられてはならない。したがってい、通路
の寸法は、フィン5より大きいことが必要であり、その
間隙は、10mm2のチップで片側が0.2〜0.5m
m程度が適当であった。(この間隙が大き過ぎると、隣
の通路との水の流れが多くなり、どれか一つのフィンに
ゴミがつまるなどの異常が生じた場合には、そのフィン
を避けて水が流れるようになる結果、冷却性能にばらつ
きが生じ易くなる。) (2) 水圧を適度に調整すること:境界板4をたわま
せてチップ2に接触させる力は、水圧によって生ずる。 冷却水を流し始めたときに、水圧を徐々に増してゆくと
、冷却性能は水圧と共に急激に増すが、ある圧力を過ぎ
ると次第に冷却性能は変化しなくなる。これは、チップ
2と絶縁板6との接触がほぼ十分に行われたあとは、圧
力を増しても殆んど冷却性能が変化しなくなるためであ
る。 また、圧力を増し過ぎると、チップ2と基板1とを接続
している半田バンプ3が破損し易くなる。したがって、
圧力は適度な値(本実施例の場合、1〜2気圧程度)に
保たなければならない。
(1) The dimensions of the refrigerant passage 76 include the fins 5.
Allowing room for rotation: In order to utilize the flexibility of the boundary plate, the fins 5 must not come into contact with the partition wall 71 of the hat and be prevented from rotating. Therefore, the dimensions of the passage must be larger than the fins 5, and the gap between them is 0.2 to 0.5 m on one side for a 10 mm2 chip.
A value of about m was appropriate. (If this gap is too large, the flow of water between adjacent passages will increase, and if an abnormality occurs such as dirt clogging one of the fins, the water will flow avoiding that fin. As a result, variations in cooling performance tend to occur.) (2) Adjust the water pressure appropriately: The force that bends the boundary plate 4 and brings it into contact with the chip 2 is generated by water pressure. If you gradually increase the water pressure when you start flowing cooling water, the cooling performance will increase rapidly with the water pressure, but after a certain pressure, the cooling performance will gradually stop changing. This is because, after the chip 2 and the insulating plate 6 have almost sufficient contact, the cooling performance hardly changes even if the pressure is increased. Furthermore, if the pressure is increased too much, the solder bumps 3 connecting the chip 2 and the substrate 1 are likely to be damaged. therefore,
The pressure must be maintained at an appropriate value (in the case of this example, about 1 to 2 atmospheres).

【0017】なお、本実施例では、境界板4に銅板を使
用した。この材質としては、冷媒によって腐食しないこ
と、また、ハット7と熱膨張係数ができるだけ近く、熱
伝導率ができるだけ大きいものが望ましい。このような
観点からすれば、境界板4の材質として、Ti,Ni,
Pt,Mo,Agなども適用可能である。なお、フィン
の材質も上記材質に応じて線膨張係数が同等で、熱伝導
率の大きなものが良い。その意味からは、フィンを高熱
伝導性セラミックス(AlN,ヒタセラム等)で製作す
ることも有効である。ただし、AlNの場合には水と接
触することによって化学的に溶解し始める。これを防ぐ
ためには、AlN製フィンに耐水性を増すための表面処
理、例えば、■表面を酸化させて、表面にAl2O3を
形成させる。
In this embodiment, a copper plate was used as the boundary plate 4. It is desirable that this material not be corroded by the refrigerant, have a coefficient of thermal expansion as close as possible to that of the hat 7, and have as high a thermal conductivity as possible. From this point of view, the material of the boundary plate 4 is Ti, Ni,
Pt, Mo, Ag, etc. are also applicable. The material of the fins should preferably have the same coefficient of linear expansion as the above-mentioned materials and a high thermal conductivity. From this point of view, it is also effective to manufacture the fins from highly thermally conductive ceramics (AlN, Hitaceram, etc.). However, in the case of AlN, it begins to chemically dissolve upon contact with water. In order to prevent this, the surface of the AlN fin is treated to increase its water resistance, for example, (1) the surface is oxidized to form Al2O3 on the surface.

【0018】■耐水性を有する物質を蒸着等で被着させ
る(Ptなどの金属をイオンプレーティング、またパリ
レン(商標名)によるガラスの被着、など)が有効であ
る。また、境界板4の形状として、上記実施例では平板
を使用した。しかし、その形状として、図4に示すよう
に、フィンを接合する周囲にベローズ41を成形するこ
とも有効である。すなわち、このように成形された境界
板を使用すれば、上下方向のたわみ性が増し、図3に示
したようなチップ2への接触が得られ易くなり、更に効
果的である。
(2) It is effective to deposit a water-resistant substance by vapor deposition or the like (ion plating of a metal such as Pt, deposition of glass using Parylene (trade name), etc.). Further, as the shape of the boundary plate 4, a flat plate was used in the above embodiment. However, as shown in FIG. 4, it is also effective to form a bellows 41 around the fins to be joined. That is, if a boundary plate formed in this manner is used, the flexibility in the vertical direction is increased, and contact with the chip 2 as shown in FIG. 3 can be easily obtained, which is more effective.

【0019】[0019]

【発明の効果】本発明によれば、前述の公知例に開示さ
れているような複雑な構造を採用することなく、優れた
冷却性能を得ることができる。具体的に言えば、■個々
のチップ毎に独立した冷却部材を用いる必要がなく、ベ
ローズや冷却部材を省略することができる。■ベローズ
等の細い径の管路を冷媒が通る必要がないことから、冷
媒の流路抵抗が大幅に軽減される。■構造が簡単で組立
て易くなる分、組立ての信頼性が増し、熱抵抗の場所に
よるばらつきが小さくなる。などの利点がある。冷却性
能については、前述の公知例の場合にはチップ2の裏面
に冷却部材を半田付けしていたことから、チップから冷
却部材への熱抵抗は、本発明の方が大きくなり、この部
分での熱抵抗は30〜50%程度増大する。しかし、冷
却構造全体としては、公知例が1℃/Wであったのが1
.2℃/W程度の熱抵抗であり、40W程度の冷却は可
能である。
According to the present invention, excellent cooling performance can be obtained without employing the complicated structure disclosed in the above-mentioned known examples. Specifically, (1) there is no need to use an independent cooling member for each chip, and bellows and cooling members can be omitted. ■Since the refrigerant does not need to pass through narrow diameter pipes such as bellows, the flow resistance of the refrigerant is significantly reduced. ■As the structure is simpler and easier to assemble, assembly reliability increases and variations in thermal resistance depending on location are reduced. There are advantages such as Regarding cooling performance, in the case of the above-mentioned known example, the cooling member was soldered to the back side of the chip 2, so the thermal resistance from the chip to the cooling member is larger in the present invention, and this part is The thermal resistance increases by about 30 to 50%. However, as for the overall cooling structure, the cooling rate was 1℃/W in the known example, but the cooling rate was 1℃/W.
.. The thermal resistance is about 2° C./W, and cooling of about 40 W is possible.

【0020】なお、本発明によれば、モジュールの厚さ
が小さくできることも大きな利点である。すなわち、大
型計算機のように大規模な電子回路を必要とする場合に
は、図1のようなモジュールを何枚も重ねて使用するこ
とが多く、そのためには一つのモジュールの厚さが薄い
ほど、小型で高性能な機能を得ることが可能である。こ
の観点から、図1に示した吸・排水口は、必ずしもモジ
ュールの上面にある必要はなく、側面に設ける等、適宜
選択が可能である。また、上記実施例では、冷却水を4
本の通路76を平行に流通させる方法について述べたが
、これは必須条件ではなく、1本の通路を流通させたの
ち隣の通路に移行させるなどの方法も考えられる。
[0020] According to the present invention, another great advantage is that the thickness of the module can be reduced. In other words, when large-scale electronic circuits are required, such as in large-scale computers, many modules like the one shown in Figure 1 are often stacked on top of each other. , it is possible to obtain high-performance functions in a small size. From this point of view, the suction/drainage ports shown in FIG. 1 do not necessarily need to be located on the top surface of the module, but may be appropriately selected such as provided on the side surface. In addition, in the above embodiment, the cooling water is
Although a method has been described in which the book passages 76 are made to flow in parallel, this is not an essential condition, and a method such as allowing the books to flow in one passage and then moving to the next passage may also be considered.

【0021】なお、電子計算機の水冷のために、フィン
を使用する水冷却方式は多数の出願例がある(例えば、
出願No.p63−156760(公開No.p02−
007456))。これらの方式においては、チップの
裏面にフィンを配列はするものの、これに強制的に水を
通水させる方式は採用していない。冷却性能を高めるた
めには、フィンに水をふり注ぐだけではなく、フィンの
中を水が通過せざるを得ないような構造を採用すること
が極めて重要である。本発明では、そのための実用的な
手法、すなわち組立性が良く、しかも冷却性能も高い手
法を提示している。したがって、本発明を電子計算機等
、大規模の高速電子回路を必要とする機器に適用すれば
、その性能向上に大きな効果を得ることができる。
[0021] There are many applications for water cooling systems using fins for water cooling electronic computers (for example,
Application No. p63-156760 (Publication No. p02-
007456)). In these methods, although fins are arranged on the back surface of the chip, a method of forcing water to flow through them is not adopted. In order to improve cooling performance, it is extremely important not only to sprinkle water onto the fins, but also to adopt a structure that forces water to pass through the fins. The present invention presents a practical method for this purpose, that is, a method that is easy to assemble and has high cooling performance. Therefore, if the present invention is applied to devices that require large-scale, high-speed electronic circuits, such as electronic computers, a significant effect can be obtained in improving the performance thereof.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の基本的構造の1実施例を示す斜視図で
ある。
FIG. 1 is a perspective view showing one embodiment of the basic structure of the present invention.

【図2】気密封止法を示す説明図である。FIG. 2 is an explanatory diagram showing an airtight sealing method.

【図3】本発明によるチップへの接触状況を示す説明図
である。
FIG. 3 is an explanatory diagram showing a state of contact with a chip according to the present invention.

【図4】境界板にベローズを成形した構造の説明図であ
る。
FIG. 4 is an explanatory diagram of a structure in which bellows are formed on the boundary plate.

【図5】従来の構造を説明するための図である。FIG. 5 is a diagram for explaining a conventional structure.

【符号の説明】[Explanation of symbols]

1…基板、 2…チップ、 3…半田バンプ、 4…境界板、 5…フィン、 6…絶縁板、 7…ハット、 8…Oリング、 9…封止管。 1...Substrate, 2...chip, 3...Solder bump, 4...Boundary plate, 5...fin, 6...Insulating board, 7...hat, 8...O-ring, 9...Sealed tube.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】複数個の半導体チップを塔載したマルチチ
ップモジュールにおいて、該半導体チップに接触する金
属板を設け、該金属板の半導体チップとの反対側の面上
の相対する位置に冷却フィンを接合し、該冷却フィンに
強制的に冷媒を流すことを特徴とするマルチチップモジ
ュール。
1. A multi-chip module mounting a plurality of semiconductor chips, wherein a metal plate is provided in contact with the semiconductor chips, and cooling fins are provided at opposing positions on the surface of the metal plate opposite to the semiconductor chips. A multi-chip module characterized in that the cooling fins are joined together and a refrigerant is forced to flow through the cooling fins.
【請求項2】請求項1において、該半導体チップと該金
属板との間に絶縁板を介在させたことを特徴とするマル
チチップモジュール。
2. The multi-chip module according to claim 1, wherein an insulating plate is interposed between the semiconductor chip and the metal plate.
【請求項3】請求項1又は2において、該半導体チップ
又は該絶縁板と該金属板との間に熱伝導性グリースを介
在させることを特徴とするマルチチップモジュール。
3. The multi-chip module according to claim 1, wherein thermally conductive grease is interposed between the semiconductor chip or the insulating plate and the metal plate.
【請求項4】請求項1又は2において、該半導体チップ
を気密封止したのち、高熱伝導性気体を封入することを
特徴とするマルチチップモジュール。
4. The multi-chip module according to claim 1, wherein the semiconductor chip is hermetically sealed and then a highly thermally conductive gas is sealed therein.
【請求項5】請求項1又は2において、該マルチチップ
モジュールの電子回路の調整段階においては該半導体チ
ップ上に熱伝導性グリースを塗布した冷却構造を、また
電子回路の調整を完了した段階においては該半導体チッ
プを気密封止し、高熱伝導性気体を封入することを特徴
とするマルチチップモジュールの製造方法。
5. According to claim 1 or 2, a cooling structure in which thermally conductive grease is applied on the semiconductor chip is provided at the stage of adjusting the electronic circuit of the multi-chip module, and at a stage when the adjustment of the electronic circuit is completed. A method for manufacturing a multi-chip module, which comprises hermetically sealing the semiconductor chip and filling it with a highly thermally conductive gas.
【請求項6】請求項1又は2記載の冷却構造を採用した
マルチチップモジュールを塔載して成ることを特徴とす
る電子計算機。
6. An electronic computer comprising a multi-chip module employing the cooling structure according to claim 1 or 2.
JP3069738A 1991-04-02 1991-04-02 Multichip module and manufacture thereof Pending JPH04305965A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3069738A JPH04305965A (en) 1991-04-02 1991-04-02 Multichip module and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3069738A JPH04305965A (en) 1991-04-02 1991-04-02 Multichip module and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH04305965A true JPH04305965A (en) 1992-10-28

Family

ID=13411454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3069738A Pending JPH04305965A (en) 1991-04-02 1991-04-02 Multichip module and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH04305965A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002314037A (en) * 2001-04-17 2002-10-25 Hitachi Ltd Power semiconductor module
KR100498276B1 (en) * 2002-11-19 2005-06-29 월드이노텍(주) Cooling Device
JP2010219215A (en) * 2009-03-16 2010-09-30 Allied Material Corp Heat dissipation structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002314037A (en) * 2001-04-17 2002-10-25 Hitachi Ltd Power semiconductor module
KR100498276B1 (en) * 2002-11-19 2005-06-29 월드이노텍(주) Cooling Device
JP2010219215A (en) * 2009-03-16 2010-09-30 Allied Material Corp Heat dissipation structure

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