JPH0430462A - Resistive element structure of semiconductor device - Google Patents
Resistive element structure of semiconductor deviceInfo
- Publication number
- JPH0430462A JPH0430462A JP2136795A JP13679590A JPH0430462A JP H0430462 A JPH0430462 A JP H0430462A JP 2136795 A JP2136795 A JP 2136795A JP 13679590 A JP13679590 A JP 13679590A JP H0430462 A JPH0430462 A JP H0430462A
- Authority
- JP
- Japan
- Prior art keywords
- active layer
- resistance
- resistance value
- forming
- resistive element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims description 10
- 238000000034 method Methods 0.000 abstract description 7
- 239000002184 metal Substances 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910004479 Ta2N Inorganic materials 0.000 description 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Landscapes
- Non-Adjustable Resistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野〕
本発明は、半導体装置における抵抗素子の構造に関する
。具体的にいうと、本発明は、半導体基板の活性層を用
いて形成された抵抗素子の構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a resistive element in a semiconductor device. Specifically, the present invention relates to the structure of a resistive element formed using an active layer of a semiconductor substrate.
［背景技術とその問題点］
集積回路の作製に用いられる抵抗素子には、半導体基板
の表面にｎ型キャリア活性層を形成し、この活性層の両
端にオーミック電極を設けて抵抗素子とする方法と、半
導体基板の表面に蒸着やスパッタ等によってＴａ２Ｎや
ＮｉＣｒなどの薄膜抵抗を設ける方法とがある。[Background technology and its problems] A method for forming a resistive element used in the production of integrated circuits is to form an n-type carrier active layer on the surface of a semiconductor substrate, and provide ohmic electrodes at both ends of this active layer to form a resistive element. Another method is to provide a thin film resistor such as Ta2N or NiCr on the surface of a semiconductor substrate by vapor deposition, sputtering, or the like.
抵抗素子を作製する方法には、上記の各方法があるが、
作製工程の簡易さから、一般には、活性層を用いた前者
の方法が、よく使用されている。There are the above methods for manufacturing a resistance element, but
Generally, the former method using an active layer is often used because of the simplicity of the manufacturing process.
しかしながら、活性層を用いた方法には、半導体基板（
ウェハ）内における活性層の不純物濃度や深さのバラツ
キ、ロット間における同様なバラツキ等があり、これら
のバラツキを考慮すると、抵抗素子形成後には、±２０
％の抵抗値の変動が生じると予想される。しかも、薄膜
抵抗を用いる方法のように、抵抗素子作製後にトリミン
グ等による抵抗値調整も不可能であったので、精度の高
い抵抗値を得ることが困難であった。However, the method using an active layer requires a semiconductor substrate (
There are variations in the impurity concentration and depth of the active layer within the wafer (wafer), similar variations between lots, etc. Considering these variations, after forming the resistor element, the
% resistance variation is expected to occur. In addition, unlike the method using a thin film resistor, it is impossible to adjust the resistance value by trimming or the like after manufacturing the resistor element, making it difficult to obtain a highly accurate resistance value.
［発明が解決しようとする課題］
本発明は、叙上の従来例の欠点に鑑みてなされたもので
あり、その目的とするところは、活性層を利用した抵抗
素子の構造において、抵抗素子作製後にも抵抗値の調整
を可能にすることにある。[Problems to be Solved by the Invention] The present invention has been made in view of the drawbacks of the conventional examples described above, and its purpose is to improve the fabrication of a resistive element in a resistive element structure using an active layer. The purpose is to allow the resistance value to be adjusted later.
［課題を解決するための手段］
このため、本発明の半導体装置における抵抗素子の構造
は、半導体基板の表面に形成された抵抗形成用活性層と
、前記抵抗形成用活性層の両端に設けられたオーミック
電極と、前記抵抗形成用活性層の近傍に形成された１も
しくは２以上の抵抗値調整用活性層と、前記抵抗値調整
用活性層を、それぞれ前記抵抗形成用活性層と並列とな
るように前記オーミック電極間に接続させるための切断
可能な配線部分とからなることを特徴としている。[Means for Solving the Problems] Therefore, the structure of the resistor element in the semiconductor device of the present invention includes a resistor-forming active layer formed on the surface of a semiconductor substrate, and a resistor-forming active layer provided at both ends of the resistor-forming active layer. an ohmic electrode, one or more active layers for adjusting resistance value formed in the vicinity of the active layer for forming resistance value, and the active layer for adjusting resistance value, each of which is parallel to the active layer for forming resistance value. It is characterized by comprising a cuttable wiring portion for connecting between the ohmic electrodes.
［作用］
本発明にあっては、１もしくは２以上の抵抗値調整用活
性層を、切断可能な配線部分によって抵抗形成用活性層
に並列接続しているので、この配線部分を切断すること
により抵抗値調整用活性層を抵抗形成用活性層から切り
離すことができる。[Function] In the present invention, one or more resistance value adjusting active layers are connected in parallel to the resistance forming active layer by a cuttable wiring part, so that by cutting this wiring part, The resistance value adjusting active layer can be separated from the resistance forming active layer.
したがって、抵抗形成用活性層から適当な抵抗値調整用
活性層を切り離すことにより、所望の値に近づくように
抵抗値を調整することができる。Therefore, by separating an appropriate resistance value adjusting active layer from the resistance forming active layer, the resistance value can be adjusted so as to approach a desired value.
［実施例コ 以下、本発明の実施例を添付図に基づいて詳述する。[Example code] Embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
２は、ＧａＡｓ半絶縁性基板等の半導体基板１の表面に
形成された抵抗形成用の活性層、５は、半導体基板１の
表面に形成された抵抗値調整用の活性層であり、抵抗形
成用活性層２及び抵抗値調整用活性層５は、いずれもｎ
−型、ｎ型もしくはｎ＋型のキャリア活性層である。第
１図に示すように、抵抗値調整用活性層５は、抵抗形成
用活性層２の近傍において、抵抗形成用活性層２と平行
に配置されており、しかも、抵抗値調整用活性層５の長
さは抵抗形成用活性層２の長さとほぼ等しくなっている
。一方、抵抗値調整用活性層５の幅は、抵抗形成用活性
層２０幅よりも狭くなっており、抵抗値調整用活性層５
の両端間の抵抗値は、抵抗形成用活性層２の抵抗値より
も大きくなっている。2 is an active layer for forming a resistance formed on the surface of the semiconductor substrate 1 such as a GaAs semi-insulating substrate; 5 is an active layer for adjusting the resistance value formed on the surface of the semiconductor substrate 1; The active layer 2 for adjusting the resistance value and the active layer 5 for adjusting the resistance value are both n
- type, n type, or n+ type carrier active layer. As shown in FIG. 1, the resistance adjustment active layer 5 is disposed in the vicinity of the resistance formation active layer 2 and in parallel with the resistance formation active layer 2. The length is approximately equal to the length of the active layer 2 for forming resistance. On the other hand, the width of the resistance value adjusting active layer 5 is narrower than the resistance forming active layer 20 width.
The resistance value between both ends of is larger than the resistance value of the resistance forming active layer 2.
従って、抵抗形成用活性層２に抵抗値調整用活性層５を
並列に接続したり、切り離したりすれば、抵抗形成用活
性層２の抵抗値が微調整される。抵抗形成用活性層２の
両端には、オーミック電極３゜４が設けられており、一
方のオーミック電極３から延部された電極延出部８は、
各抵抗値調整用活性層５の端部にオーミック接触してい
る。また、各抵抗値調整用活性層５の他端には、各抵抗
値調整用活性層５とオーミック接触する補助電極６が設
けられている。さらに、補助電極６に設けられたコンタ
クトホール９と、オーミック電極４に設けられたコンタ
クトホール１０との間に蒸着等により金属配線７が施さ
れている。したがって、この抵抗素子の抵抗値は、抵抗
形成用活性層２か単独の場合よりも抵抗値が小さくなっ
ている。この金属配線７は、レーザー光によって容易に
切断することができるものであり、第１図のイ９９ロ、
ハ二のいずれか１箇所でレーザー光によって金属配線７
を蒸発もしくは溶断させて切断し、適宜抵抗値調整用活
性層５を抵抗形成用活性層２から切り離すことにより、
抵抗値を４通りに調整できる。Therefore, by connecting or disconnecting the resistance value adjustment active layer 5 to the resistance formation active layer 2 in parallel, the resistance value of the resistance formation active layer 2 can be finely adjusted. Ohmic electrodes 3 and 4 are provided at both ends of the resistance forming active layer 2, and an electrode extension 8 extending from one of the ohmic electrodes 3 is as follows.
It is in ohmic contact with the end of each resistance value adjusting active layer 5. Further, at the other end of each resistance value adjusting active layer 5, an auxiliary electrode 6 is provided which makes ohmic contact with each resistance value adjusting active layer 5. Further, a metal wiring 7 is provided between the contact hole 9 provided in the auxiliary electrode 6 and the contact hole 10 provided in the ohmic electrode 4 by vapor deposition or the like. Therefore, the resistance value of this resistance element is smaller than that in the case of the resistance forming active layer 2 alone. This metal wiring 7 can be easily cut with a laser beam, and is shown in FIG.
Metal wiring 7 by laser light at any one point on the wire
By evaporating or melting and cutting, and appropriately separating the resistance value adjusting active layer 5 from the resistance forming active layer 2,
The resistance value can be adjusted in 4 ways.
第２図に示すものは、各抵抗値調整用活性層１１．１２
，１３．１４の長さを異ならせ、それぞれの抵抗値調整
用活性層１１，１２，１３．１４の一端に設けられた補
助電極１５．１６，１７゜１８を別々の金属配線１９．
２０，２１．２２によってオーミック電極４に接続させ
たものである。What is shown in FIG. 2 is each resistance value adjustment active layer 11.12.
, 13.14 have different lengths, and the auxiliary electrodes 15, 16, 17° 18 provided at one end of the respective resistance adjustment active layers 11, 12, 13.14 are connected to separate metal wirings 19.
20, 21, and 22 to connect to the ohmic electrode 4.
この実施例では、４本の金属配線１９．２０，２１．２
２のうち１本〜４本をレーザー光によって切断すること
により、抵抗素子の抵抗値を１６通りに調整することが
できる。In this example, four metal wires 19.20, 21.2
By cutting one to four of the resistor elements with a laser beam, the resistance value of the resistor element can be adjusted in 16 ways.
第２図の実施例では、各抵抗値調整用活性層の長さを異
ならせているが、各抵抗値調整用活性層の幅をそれぞれ
異ならせておいてもよいのは当然である。In the embodiment shown in FIG. 2, the lengths of the respective resistance value adjusting active layers are made different, but it goes without saying that the widths of the respective resistance value adjusting active layers may be made different.
なお、上記各実施例では、抵抗値調整用活性層を４箇所
に設けているが、これよりも多くても少なくてもよいの
は、もちろんである。In each of the above embodiments, the active layer for adjusting the resistance value is provided at four locations, but it goes without saying that the number may be greater or less than this.
また、本発明の構造では、金属配線を切断すると、抵抗
値が大ぎくなるので、抵抗形成用活性層の抵抗値を所望
値よりも若干小さくしておいてもよい。Furthermore, in the structure of the present invention, if the metal wiring is cut, the resistance value increases, so the resistance value of the resistance forming active layer may be made slightly smaller than the desired value.
［発明の効果］
本発明によれば、抵抗値調整用活性層の配線部分を切断
することにより抵抗値調整用活性層を抵抗形成用活性層
から切り離すことができるので、配線部分の切断により
抵抗素子の抵抗値を調整することができる。すなわち、
抵抗素子の形成後においても、抵抗素子の抵抗値を調整
することができ、活性層の不純物濃度や深さ等のバラツ
キによる抵抗値の変動をＷｉ訳整し、精度の高い抵抗値
を得ることかできる。[Effects of the Invention] According to the present invention, the resistance value adjusting active layer can be separated from the resistance forming active layer by cutting the wiring portion of the resistance value adjusting active layer. The resistance value of the element can be adjusted. That is,
Even after the resistance element is formed, the resistance value of the resistance element can be adjusted, and fluctuations in resistance value due to variations in impurity concentration and depth of the active layer can be adjusted to obtain a highly accurate resistance value. I can do it.
第１図は本発明の一実施例を示す平面図、第２図は本発
明の別な実施例を示す平面図である。
１・・・半導体基板
２・・・抵抗形成用活性層
３．４・・・オーミック電極
５．１１〜１４・・・抵抗値調整用活性層θ。
７゜
１５〜１８・・・補助電極
１９〜２２・・・金属配線
特許出願人 株式会社 村田製作所
代理人 弁理士 中 野 雅 房FIG. 1 is a plan view showing one embodiment of the invention, and FIG. 2 is a plan view showing another embodiment of the invention. 1...Semiconductor substrate 2...Active layer for forming resistance 3.4...Ohmic electrodes 5.11-14...Active layer θ for adjusting resistance value. 7゜15~18...Auxiliary electrodes 19~22...Metal wiring patent applicant Murata Manufacturing Co., Ltd. Representative Patent attorney Masafusa Nakano
Claims (1)
と、 前記抵抗形成用活性層の両端に設けられたオーミック電
極と、 前記抵抗形成用活性層の近傍に形成された１もしくは２
以上の抵抗値調整用活性層と、 前記抵抗値調整用活性層を、それぞれ前記抵抗形成用活
性層と並列となるように前記オーミック電極間に接続さ
せるための切断可能な配線部分とからなることを特徴と
する半導体装置における抵抗素子の構造。(1) A resistor-forming active layer formed on the surface of a semiconductor substrate, ohmic electrodes provided at both ends of the resistor-forming active layer, and 1 or 2 formed near the resistor-forming active layer.
The above active layer for adjusting resistance value is comprised of a cuttable wiring portion for connecting the active layer for adjusting resistance value between the ohmic electrodes so as to be in parallel with the active layer for forming resistance, respectively. A structure of a resistive element in a semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2136795A JPH0430462A (en) | 1990-05-25 | 1990-05-25 | Resistive element structure of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2136795A JPH0430462A (en) | 1990-05-25 | 1990-05-25 | Resistive element structure of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0430462A true JPH0430462A (en) | 1992-02-03 |
Family
ID=15183696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2136795A Pending JPH0430462A (en) | 1990-05-25 | 1990-05-25 | Resistive element structure of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0430462A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004119965A (en) * | 2002-09-27 | 2004-04-15 | Samsung Electronics Co Ltd | Fuse structure and semiconductor memory device using the same |
-
1990
- 1990-05-25 JP JP2136795A patent/JPH0430462A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004119965A (en) * | 2002-09-27 | 2004-04-15 | Samsung Electronics Co Ltd | Fuse structure and semiconductor memory device using the same |
| JP4668526B2 (en) * | 2002-09-27 | 2011-04-13 | 三星電子株式会社 | Fuse structure |
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