JPH04302495A - Integrated circuit for high frequency - Google Patents

Integrated circuit for high frequency

Info

Publication number
JPH04302495A
JPH04302495A JP9167091A JP9167091A JPH04302495A JP H04302495 A JPH04302495 A JP H04302495A JP 9167091 A JP9167091 A JP 9167091A JP 9167091 A JP9167091 A JP 9167091A JP H04302495 A JPH04302495 A JP H04302495A
Authority
JP
Japan
Prior art keywords
motherboard
board
lead
conductor
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9167091A
Other languages
Japanese (ja)
Inventor
Takashi Terai
寺井 孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Priority to JP9167091A priority Critical patent/JPH04302495A/en
Publication of JPH04302495A publication Critical patent/JPH04302495A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/366Assembling printed circuits with other printed circuits substantially perpendicularly to each other

Abstract

PURPOSE:To preserve stable properties without creating parasitic capacitance even at high frequency. CONSTITUTION:An integrated circuit for high frequency which is equipped with a board 11 having a circuit within and a plurality of leads 12 being made at the lower end of this board 11, and in which the sectional shape of each lead 12 is an L shape and there is no space between the bottom of the board 11 and the mother board and the lead 12 of the board 11 is connected directly to the conductor on the topside of the mother board, and which has stable properties without creating parasitic capacitance even at high frequency.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は高周波用集積回路に関し
、特にリードの形状に改良を施したSIP型IC等の高
周波集積回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to high frequency integrated circuits, and more particularly to high frequency integrated circuits such as SIP type ICs with improved lead shapes.

【0002】0002

【従来の技術】図4は、従来のSIP(Single 
In Line Package)型のハイブリッドI
Cを示す。このICは、内部に回路が形成された基板1
と、この基板1の下端部から下向きに突出した複数のリ
ード2から構成されている。
[Prior Art] FIG. 4 shows a conventional SIP (Single
In Line Package) type hybrid I
Indicates C. This IC consists of a substrate 1 with a circuit formed inside.
It is composed of a plurality of leads 2 projecting downward from the lower end of the substrate 1.

【0003】こうした構成のICは、通常、図5に示す
如くマザーボード3に実装される。このマザーボード3
の表面には導体4が形成され、更にスルホール5,ラン
ド6が形成されている。上記ICをマザーボード3に実
装する時は、図5に示すようにICのリード2をスルホ
ール5に挿入して半田7により固定することにより行う
[0003] An IC having such a configuration is normally mounted on a motherboard 3 as shown in FIG. This motherboard 3
A conductor 4 is formed on the surface, and furthermore, through holes 5 and lands 6 are formed. When the above IC is mounted on the motherboard 3, the leads 2 of the IC are inserted into the through holes 5 and fixed with solder 7, as shown in FIG.

【0004】0004

【発明が解決しようとする課題】しかしながら、従来の
ハイブリッドICは、通常、マザーボード3の導体4と
基板端面との間に距離(L)の隙間をおいた状態でマザ
ーボード3に実装される。そのため、その隙間の分が寄
生容量となり、上記ICを高い周波数で使用することが
困難である。また、ICのリード2をマザーボード3の
スルホール5に挿入し、半田7で固定することにより寄
生容量が生じる。
However, conventional hybrid ICs are usually mounted on the motherboard 3 with a distance (L) between the conductor 4 of the motherboard 3 and the end surface of the substrate. Therefore, the gap becomes a parasitic capacitance, making it difficult to use the above IC at high frequencies. In addition, parasitic capacitance is generated by inserting the IC leads 2 into the through holes 5 of the motherboard 3 and fixing them with solder 7.

【0005】また、ICの半田パッド、リード、マザー
ボードの半田パッド等の電送線路の形状が夫々異なるた
め、高い周波数において、特性上使用が困難となる。
Furthermore, since the shapes of the transmission lines such as the solder pads and leads of ICs and the solder pads of motherboards are different, it is difficult to use them at high frequencies due to their characteristics.

【0006】本発明は上記事情に鑑みてなされたもので
、リードの形状を断面L字型としてマザーボード主面の
導体に隙間なく直接接続できる構成にすることにより、
高い周波数においても寄生容量が生じることなく安定し
た特性を保持でき、また高い周波数においても特性上使
用が容易な高周波用集積回路を提供することを目的とす
る。
The present invention has been made in view of the above circumstances, and by making the lead shape L-shaped in cross section so that it can be directly connected to the conductor on the main surface of the motherboard without any gaps,
It is an object of the present invention to provide a high frequency integrated circuit that can maintain stable characteristics without generating parasitic capacitance even at high frequencies and is easy to use due to its characteristics even at high frequencies.

【0007】[0007]

【課題を解決するための手段】本願第1の発明は、マザ
ーボードの導体形成側の面に立てかけた状態で実装され
る高周波用集積回路において、内部に回路が形成された
基板と、この基板の下端部に形成された複数のリードと
を具備し、前記各リードの断面形状がL字型で、かつ前
記基板底面とマザーボード上面間に隙間がない状態で、
前記基板主面と直交する方向に沿うリード部分が前記マ
ザーボードの上面の導体に接続されることを特徴とする
高周波用集積回路である。
[Means for Solving the Problems] The first invention of the present application is a high-frequency integrated circuit that is mounted while standing up against the surface of a motherboard on the conductor formation side, which includes a substrate on which a circuit is formed inside, and a substrate on which a circuit is formed inside. a plurality of leads formed at a lower end portion, each lead having an L-shaped cross section, and with no gap between the bottom surface of the board and the top surface of the motherboard;
The high frequency integrated circuit is characterized in that a lead portion extending in a direction perpendicular to the main surface of the substrate is connected to a conductor on the upper surface of the motherboard.

【0008】本願第2の発明は、マザーボードの導体形
成側の面に寝かせた状態で実装される高周波用集積回路
において、内部に回路が形成された基板と、この基板の
側端部に形成された複数のリードとを具備し、前記各リ
ードが基板の側壁面側に曲げられてその断面形状がL字
型になっており、かつかつ前記基板底面とマザーボード
上面間に隙間がない状態で、リードの先端部分が前記マ
ザーボードの上面の導体に接続されることを特徴とする
高周波用集積回路である。
[0008] The second invention of the present application is a high-frequency integrated circuit that is mounted while lying on the surface of a motherboard on the conductor formation side. each lead is bent toward the side wall surface of the board so that its cross section is L-shaped, and there is no gap between the bottom surface of the board and the top surface of the motherboard. The high frequency integrated circuit is characterized in that a tip portion of the motherboard is connected to a conductor on the upper surface of the motherboard.

【0009】[0009]

【作用】本発明において、リードの形状を断面L字型と
してマザーボード上面と基板間に隙間がない状態でマザ
ーボードの導体と接続できる構成にすることにより、基
板とマザーボード間に隙間が生じることなく、また従来
のようにスルホールを設ける必要もないため、従来のよ
うに寄生容量が生じることなく、高い周波数において安
定した特性を保持できる(図2参照)。また、図3のよ
うに基板主面をマザーボード主面に対向させ、リードを
図のように基板の側壁面側に折り曲げて導体と接続させ
ることにより、表面実装タイプを実現できる。
[Operation] In the present invention, by making the lead shape L-shaped in cross section so that it can be connected to the conductor of the motherboard without any gap between the top surface of the motherboard and the board, Furthermore, since there is no need to provide through holes as in the conventional case, stable characteristics can be maintained at high frequencies without the generation of parasitic capacitance as in the conventional case (see FIG. 2). Furthermore, a surface mount type can be realized by making the main surface of the board face the main surface of the motherboard as shown in FIG. 3, and by bending the leads toward the side wall surface of the board and connecting them to the conductor as shown in the figure.

【0010】0010

【実施例】図1は、本発明の一実施例を示すSIP型I
Cの斜視図である。図中の11は、内部に回路が形成さ
れた基板である。この基板11の下端部には、複数のリ
ード12が形成されている。前記各リード12の断面形
状は全てL字型で、前記基板主面と直交する方向に沿う
リード部分が基板底面から若干離間して折り曲げられて
いる。この基板底面からリード折曲げ部までの距離(L
)は、後記するマザーボード表面に形成した導体の厚み
に略等しい。
[Embodiment] FIG. 1 shows a SIP type I diagram showing an embodiment of the present invention.
FIG. Reference numeral 11 in the figure is a board with a circuit formed therein. A plurality of leads 12 are formed at the lower end of this substrate 11 . The cross-sectional shape of each lead 12 is all L-shaped, and the lead portion along the direction perpendicular to the main surface of the substrate is bent with a slight distance from the bottom surface of the substrate. The distance from the bottom of this board to the lead bending part (L
) is approximately equal to the thickness of a conductor formed on the surface of the motherboard, which will be described later.

【0011】こうした構成のSIP型ICは、図2に示
す如く、マザーボード13の表面に基板11を立てかけ
た状態で、かつ各リード12の折り曲げ部分がマザーボ
ード13表面の導体14に直接接続した状態で実装され
る。
[0011] As shown in FIG. 2, the SIP type IC having such a configuration is operated with the substrate 11 leaning against the surface of the motherboard 13 and with the bent portions of each lead 12 directly connected to the conductor 14 on the surface of the motherboard 13. Implemented.

【0012】上記実施例に係るSIP型ICによれば、
基板11の下端部に、断面形状がL字型で、前記基板主
面と直交する方向に沿うリード部分が基板底面から距離
Lだけ離間して折り曲げられた形状のリード12が設け
られた構成になっているため、上記ICをマザーボード
13に実装する場合、リード12の折り曲げ部がマザー
ボード13の導体14に直接接続され、基板11の底面
とマザーボード13の表面間に隙間がなくなる。また、
従来のICのようにマザーボードにスルーホールを形成
する必要がなくなる。従って、従来と比べて寄生容量を
減少させることができ、高い周波数での使用が可能とな
る。更に、前記基板11の電送線路の一部である導体1
4の幅(W1 )に合わしてリード12の幅(W2 )
を決めれば、導体14とリード12の折り曲げ部の接続
部における特性上の悪化を防ぐことができる。
According to the SIP type IC according to the above embodiment,
A lead 12 is provided at the lower end of the board 11, the lead 12 having an L-shaped cross section and a lead portion extending in a direction perpendicular to the main surface of the board being bent at a distance L from the bottom surface of the board. Therefore, when the above IC is mounted on the motherboard 13, the bent portions of the leads 12 are directly connected to the conductors 14 of the motherboard 13, and there is no gap between the bottom surface of the substrate 11 and the surface of the motherboard 13. Also,
Unlike conventional ICs, there is no need to form through holes on the motherboard. Therefore, parasitic capacitance can be reduced compared to the conventional one, and use at high frequencies becomes possible. Furthermore, the conductor 1 which is a part of the electric transmission line of the board 11
Width of lead 12 (W2) to match width of lead 4 (W1)
By determining this, it is possible to prevent deterioration in characteristics at the connection portion between the conductor 14 and the bent portion of the lead 12.

【0013】なお、本発明に係る高周波用集積回路は、
上記実施例のものに限定されず、図3に示す構成のもの
でもよい。このSIP型ICは、基板11の側端部に形
成された複数のリード21を、基板11の側壁面に沿っ
てマザーボード13の主面側に曲げてその断面形状をL
字型にしたものである。この場合、基板底面がマザーボ
ード上面に接した状態で、リード21の先端部分が前記
マザーボード13の上面の導体14に直接接続される。 こうした構成の集積回路によれば、表面実装タイプの集
積回路を得ることができる。
[0013] The high frequency integrated circuit according to the present invention includes:
The present invention is not limited to the embodiment described above, and may have the configuration shown in FIG. 3. This SIP type IC has a plurality of leads 21 formed at the side ends of the substrate 11 bent toward the main surface of the motherboard 13 along the side wall surface of the substrate 11 so that the cross-sectional shape is L.
It is shaped like a letter. In this case, the tips of the leads 21 are directly connected to the conductors 14 on the top surface of the motherboard 13 with the bottom surface of the board in contact with the top surface of the motherboard. According to the integrated circuit having such a configuration, a surface-mount type integrated circuit can be obtained.

【0014】なお、上記実施例では、SIP型ICにつ
いて説明したが、これに限定されず、DIP型ICなど
の高周波数用集積回路においても、上記実施例と同様な
効果が期待できる。
[0014] In the above embodiment, a SIP type IC has been described, but the present invention is not limited to this, and the same effects as in the above embodiment can be expected in high frequency integrated circuits such as a DIP type IC.

【0015】[0015]

【発明の効果】以上詳述した如く本発明によれば、リー
ドの形状を断面L字型としてマザーボード主面の導体に
隙間なく直接接続できる構成にすることにより、高い周
波数においても寄生容量が生じることなく安定した特性
を保持でき、また表面実装タイプも可能で、しかも基板
のリードとマザーボードの導体間の接続部における特性
上の悪化を防止できる信頼性の高い高周波用集積回路を
提供できる。
Effects of the Invention As detailed above, according to the present invention, parasitic capacitance occurs even at high frequencies by making the lead shape L-shaped in cross section so that it can be directly connected to the conductor on the main surface of the motherboard without any gaps. It is possible to provide a highly reliable high-frequency integrated circuit that can maintain stable characteristics without any problems, can be of a surface-mounted type, and can prevent deterioration in characteristics at the connection between the leads of the board and the conductor of the motherboard.

【図面の簡単な説明】[Brief explanation of drawings]

【図1】本発明の一実施例に係るSIP型ICの斜視図
FIG. 1 is a perspective view of a SIP type IC according to an embodiment of the present invention.

【図2】図1のSIP型ICをマザーボードに実装した
状態の概略説明図。
FIG. 2 is a schematic explanatory diagram of a state in which the SIP type IC of FIG. 1 is mounted on a motherboard.

【図3】本発明の他の実施例に係るSIP型ICの説明
図。
FIG. 3 is an explanatory diagram of a SIP type IC according to another embodiment of the present invention.

【図4】従来のSIP型ICの斜視図。FIG. 4 is a perspective view of a conventional SIP type IC.

【図5】図4のICをマザーボードに実装した状態の概
略説明図。
FIG. 5 is a schematic explanatory diagram of a state in which the IC of FIG. 4 is mounted on a motherboard.

【符号の説明】[Explanation of symbols]

11…基板、12,21…リード、13…マザーボード
、14…導体。
11... Board, 12, 21... Lead, 13... Motherboard, 14... Conductor.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  マザーボードの導体形成側の面に立て
かけた状態で実装される高周波用集積回路において、内
部に回路が形成された基板と、この基板の下端部に形成
された複数のリードとを具備し、前記各リードの断面形
状がL字型で、かつ前記基板底面とマザーボード上面間
に隙間がない状態で、前記基板主面と直交する方向に沿
うリード部分が前記マザーボードの上面の導体に接続さ
れることを特徴とする高周波用集積回路。
[Claim 1] A high-frequency integrated circuit that is mounted leaning against the conductor-forming side of a motherboard, which includes a substrate with a circuit formed therein and a plurality of leads formed at the bottom end of this substrate. The cross section of each lead is L-shaped, and with no gap between the bottom surface of the board and the top surface of the motherboard, a lead portion extending in a direction perpendicular to the main surface of the board is connected to a conductor on the top surface of the motherboard. A high frequency integrated circuit characterized by being connected.
【請求項2】  マザーボードの導体形成側の面に寝か
せた状態で実装される高周波用集積回路において、内部
に回路が形成された基板と、この基板の側端部に形成さ
れた複数のリードとを具備し、前記各リードが基板の側
壁面側に曲げられてその断面形状がL字型になっており
、かつ前記基板底面とマザーボード上面間に隙間がない
状態で、リードの先端部分が前記マザーボードの上面の
導体に接続されることを特徴とする高周波用集積回路。
[Claim 2] A high-frequency integrated circuit that is mounted while lying on the conductor-forming side of a motherboard, which includes a substrate with a circuit formed therein, and a plurality of leads formed on the side edges of this substrate. , each lead is bent toward the side wall of the board so that its cross-sectional shape is L-shaped, and with no gap between the bottom surface of the board and the top surface of the motherboard, the tip of the lead is A high-frequency integrated circuit characterized by being connected to a conductor on the top surface of a motherboard.
JP9167091A 1991-03-29 1991-03-29 Integrated circuit for high frequency Pending JPH04302495A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9167091A JPH04302495A (en) 1991-03-29 1991-03-29 Integrated circuit for high frequency

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9167091A JPH04302495A (en) 1991-03-29 1991-03-29 Integrated circuit for high frequency

Publications (1)

Publication Number Publication Date
JPH04302495A true JPH04302495A (en) 1992-10-26

Family

ID=14032921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9167091A Pending JPH04302495A (en) 1991-03-29 1991-03-29 Integrated circuit for high frequency

Country Status (1)

Country Link
JP (1) JPH04302495A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0631312A1 (en) * 1993-06-25 1994-12-28 Fujitsu Limited Single inline package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0631312A1 (en) * 1993-06-25 1994-12-28 Fujitsu Limited Single inline package
US5451815A (en) * 1993-06-25 1995-09-19 Fujitsu Limited Semiconductor device with surface mount package adapted for vertical mounting

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