JPH04298078A - Solid-state image pick-up element - Google Patents

Solid-state image pick-up element

Info

Publication number
JPH04298078A
JPH04298078A JP3106329A JP10632991A JPH04298078A JP H04298078 A JPH04298078 A JP H04298078A JP 3106329 A JP3106329 A JP 3106329A JP 10632991 A JP10632991 A JP 10632991A JP H04298078 A JPH04298078 A JP H04298078A
Authority
JP
Japan
Prior art keywords
amount
charge
mosfet
light receiving
detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3106329A
Other languages
Japanese (ja)
Inventor
Takumi Nakahata
匠 中畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3106329A priority Critical patent/JPH04298078A/en
Publication of JPH04298078A publication Critical patent/JPH04298078A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To detect a storage charge amount of a photodetecting part with no mediation of CCD. CONSTITUTION:When charge is stored in an n-type diffusion layer 8, potential changes. Since the n-type diffusion layer 8 is connected to a gate 20 of a storage charge detection FET through a metal wiring 21, the gate 20 generates a similar potential change. A charge amount of the n-type diffusion layer 8 can be known by monitoring source potential of this storage charge FET. An exposure time can be optimized by detecting a photodetecting part having the largest storage charge by means of a peripheral circuit so as to control an electron shutter according to its storage charge amount without reading the storage charge amount.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、固体撮像素子に関し
、特にその受光部の改良を図った構造に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image sensing device, and more particularly to a structure in which the light receiving portion thereof is improved.

【0002】0002

【従来の技術】図4は従来の固体撮像素子の平面構造を
示す。図において、1は光量及び受光時間に比例して、
信号電荷を蓄積する構造を有する受光部で、半導体基板
上に多数配置されている。2は信号電荷を読み出すため
のCCD部、3は読み出しMOSFETで、受光部1と
CCD部2との間に配置され、そのソースは受光部1に
、そのドレインはCCD部2にそれぞれ接続されている
。4はCCD部2の出力側に接続され、信号電荷に比例
した電圧を外部に出力する増幅器である。5は受光部1
に蓄積した過剰な信号電荷を掃き出すための掃き出しド
レイン、6は掃き出しFETで、そのソースは受光部1
に接続されており、そのドレインは掃き出しドレイン5
にそれぞれ接続されている。
2. Description of the Related Art FIG. 4 shows a planar structure of a conventional solid-state image sensor. In the figure, 1 is proportional to the light amount and light reception time,
A light receiving section has a structure for accumulating signal charges, and is arranged in large numbers on a semiconductor substrate. 2 is a CCD section for reading signal charges, and 3 is a readout MOSFET, which is arranged between the light receiving section 1 and the CCD section 2. Its source is connected to the light receiving section 1, and its drain is connected to the CCD section 2. There is. An amplifier 4 is connected to the output side of the CCD section 2 and outputs a voltage proportional to the signal charge to the outside. 5 is light receiving part 1
6 is a sweep drain for sweeping out excess signal charges accumulated in the FET, and its source is the
The drain is connected to the sweep drain 5.
are connected to each.

【0003】図3は図4の点線αに示す部分の断面図で
ある。図中、7はP型シリコン基板、8はP型シリコン
基板7の一主面に形成されたn型層で、シリコン基板7
とn型層8の境界が受光部1に相当する。また、9は酸
化膜、10は保護膜を示す。
FIG. 3 is a sectional view of a portion indicated by the dotted line α in FIG. In the figure, 7 is a P-type silicon substrate, and 8 is an n-type layer formed on one main surface of the P-type silicon substrate 7.
The boundary between the n-type layer 8 and the n-type layer 8 corresponds to the light receiving section 1. Further, 9 represents an oxide film, and 10 represents a protective film.

【0004】図5は固体撮像素子の動作を示すタイミン
グチャートである。図中、横軸は時間の経過を表わす。 11は読み出しMOSFET3のゲートに加えられるク
ロックであり、12はクロック11の“H”状態の時間
幅tR を示す。13は掃き出しMOSFET6のゲー
トに加えられるクロックであり、14はクロック13の
“H”状態の時間幅tS を示す。15はCCD部2の
動作で、16は転送状態を示す。17は1サイクル時間
TC を示す。なお、18は読み出しMOSFETがオ
フ状態になった後に、掃き出しMOSFET6がオン状
態になるまでの時間tn ,19は掃き出しMOSFE
T6がオフ状態になった後に読み出しMOSFETがオ
ン状態になるまでの時間ta をそれぞれに示す。
FIG. 5 is a timing chart showing the operation of the solid-state image sensor. In the figure, the horizontal axis represents the passage of time. 11 is a clock applied to the gate of the read MOSFET 3, and 12 indicates the time width tR of the "H" state of the clock 11. 13 is a clock applied to the gate of the sweep MOSFET 6, and 14 indicates the time width tS of the "H" state of the clock 13. Reference numeral 15 indicates the operation of the CCD section 2, and reference numeral 16 indicates the transfer status. 17 indicates one cycle time TC. In addition, 18 is the time tn until the sweep MOSFET 6 is turned on after the read MOSFET is turned off, and 19 is the time tn of the sweep MOSFET 6.
The time ta until the read MOSFET turns on after T6 turns off is shown in each case.

【0005】次に動作について説明する。読み出しMO
SFET3をオン状態12にすることにより信号電荷を
CCD部2へ転送する。CCD部2は転送された全ての
信号電荷を増幅器4へ順次転送する。また、この間に掃
き出しMOSFET6をオン状態にし、tn 間に蓄積
した電荷を掃き出しドレイン5を通して外部へ排出する
Next, the operation will be explained. Read MO
By turning the SFET 3 into the on state 12, signal charges are transferred to the CCD section 2. The CCD section 2 sequentially transfers all the transferred signal charges to the amplifier 4. Also, during this time, the sweep MOSFET 6 is turned on, and the charges accumulated during tn are swept out and discharged to the outside through the drain 5.

【0006】次に、図6を用いて、TC 間に受光部1
に蓄積される信号電荷量の変化について説明する。図中
、横軸は時間経過を表わし、縦軸は蓄積電荷量を表わす
。 12,14,18,19は図5と同一部分を示す。まず
、tR 間に、それ以前に蓄積した信号電荷を全てCC
D部2へ転送する。次にtn 間に電荷は蓄積されるが
、tS 間に掃き出しドレイン5を通して過剰電荷とし
て排出される。よって、ta 間に蓄積された電荷が信
号電荷としてCCD部2へ転送される。
Next, using FIG. 6, the light receiving section 1 is connected between the TC
The change in the amount of signal charge accumulated in will be explained. In the figure, the horizontal axis represents the passage of time, and the vertical axis represents the amount of accumulated charge. 12, 14, 18, and 19 indicate the same parts as in FIG. First, during tR, all the signal charges accumulated before that are CC
Transfer to D section 2. Next, charges are accumulated during tn, but are discharged as excess charges through the drain 5 during tS. Therefore, the charges accumulated during ta are transferred to the CCD section 2 as signal charges.

【0007】上記に示した過剰電荷を排出する動作は光
量が多い場合に非常に有効である。受光部1は光量及び
受光時間に比例した信号電荷量を与える機構を有してい
るが、信号電荷量が飽和量に達すると上記の比例関係が
失われ、一定の飽和電荷量となってしまう。このため過
剰電荷を掃き出しMOSFET6により排出することに
より、再び比例関係を回復することができる。よって、
tn ,ta の時間配分を適切に行えば、常に検出器
を飽和させることなく正常に動作させることができる。 しかし、急激に光量が多くなった場合、信号電荷量は容
易に飽和電荷量に達してしまう。また従来装置では信号
電荷量を出力部4を介してしか検知することができない
ため、検出器が飽和することを避けるためにtn ,t
a の時間配分を素早く最適化することができなかった
The above-mentioned operation of discharging excess charge is very effective when the amount of light is large. The light receiving section 1 has a mechanism that provides a signal charge amount proportional to the amount of light and the light reception time, but when the signal charge amount reaches a saturation amount, the above proportional relationship is lost and the amount of saturation charge is constant. . Therefore, by sweeping out the excess charge and discharging it through the MOSFET 6, the proportional relationship can be restored again. Therefore,
If the time allocation of tn and ta is carried out appropriately, the detector can always be operated normally without being saturated. However, when the amount of light suddenly increases, the signal charge amount easily reaches the saturation charge amount. In addition, in the conventional device, the amount of signal charge can only be detected through the output section 4, so in order to avoid saturation of the detector, tn, t
It was not possible to quickly optimize the time allocation for a.

【0008】[0008]

【発明が解決しようとする課題】従来の固体撮像素子は
前記のように構成されているので、信号電荷量が飽和電
荷量に達してしまってもCCD部2を介して出力信号を
調べるまで検出器が飽和したことを検知することができ
ないという問題点があった。
[Problems to be Solved by the Invention] Since the conventional solid-state image sensor is configured as described above, even if the signal charge amount reaches the saturation charge amount, it cannot be detected until the output signal is examined via the CCD section 2. There was a problem in that it was not possible to detect that the container was saturated.

【0009】この発明は上記のような問題点を解消する
ためになされたもので、受光部の信号電荷量をCCD部
を介することなくリアルタイムに検知することができる
固体撮像素子を得ることを目的とする。
The present invention was made to solve the above-mentioned problems, and aims to provide a solid-state image sensor that can detect the amount of signal charge in the light receiving section in real time without going through a CCD section. shall be.

【0010】0010

【課題を解決するための手段】この発明に係る固体撮像
素子は、受光部が形成された基板に蓄積電荷量検知用の
トランジスタを形成し、当該トランジスタのゲートと受
光部を接続した構造を有するものである。
[Means for Solving the Problems] A solid-state image sensor according to the present invention has a structure in which a transistor for detecting the amount of accumulated charge is formed on a substrate on which a light receiving section is formed, and the gate of the transistor and the light receiving section are connected. It is something.

【0011】また、蓄積電荷量検知用のトランジスタに
、該トランジスタにより駆動され、ゲート電位が最大と
なる画素を検出してその電荷蓄積量を読出す周辺回路を
接続するようにしたものである。
Further, the transistor for detecting the amount of accumulated charge is connected to a peripheral circuit driven by the transistor, which detects a pixel with a maximum gate potential and reads out the amount of accumulated charge.

【0012】0012

【作用】この発明においては、基板に形成したトランジ
スタにより、検出器の電荷量に応じた電圧をリアルタイ
ムで検知できる。
[Operation] In the present invention, a voltage corresponding to the amount of charge of the detector can be detected in real time by the transistor formed on the substrate.

【0013】また、周辺回路によりゲート電位が最大と
なる画素を検出できるので、電子シャッタと組合わせる
ことより、露出を最適に制御できる。
Furthermore, since the peripheral circuit can detect the pixel with the maximum gate potential, exposure can be optimally controlled by combining it with an electronic shutter.

【0014】[0014]

【実施例】以下、この発明の一実施例を図について説明
する。図1はこの発明の一実施例による固体撮像素子を
示す。図中、7〜10は図3に示す従来装置と同様ある
いは相当する部分である。22はこの発明によるところ
の蓄積電荷量検知用のMOSFETで、20は当該MO
SFETのゲート、21はゲートと受光部1のn型層8
とを接続する金属配線を示す。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a solid-state image sensor according to an embodiment of the present invention. In the figure, numerals 7 to 10 are parts similar to or equivalent to those of the conventional device shown in FIG. 22 is a MOSFET for detecting the amount of accumulated charge according to the present invention; 20 is a MOSFET for detecting the amount of accumulated charge according to the present invention;
The gate of SFET, 21 is the gate and the n-type layer 8 of the light receiving part 1.
This shows the metal wiring that connects the

【0015】次に蓄積電荷量を検知し外部へ伝達する回
路について説明する。図2において、1〜6は図4にお
ける同等あるいは相当部分を示す。22は図1に示すと
ころの蓄積電荷量検知用MOSFETである。23は蓄
積電荷量検知用MOSFET22の状態を外部へ伝達す
るための周辺回路で、P型シリコン基板7上に形成され
ている。24は周辺回路23に電力を供給するための電
源電圧端子であり、正電位が印加されている。25は出
力端子を示す。26は周辺回路23を構成する周辺回路
抵抗、27は周辺回路MOSFETを示す。抵抗の一端
及び周辺回路MOSFET27のドレインは電源電圧端
子24に接続され、周辺回路抵抗26の他端と周辺回路
MOSFET27のゲートは蓄積電荷量検知用MOSF
ET22のドレインに接続されている。なお、周辺回路
MOSFET27のソースは出力端子25に接続され、
蓄積電荷量検知用MOSFET22のソースはP型シリ
コン基板7に接地されている。
Next, a circuit for detecting the amount of accumulated charge and transmitting it to the outside will be explained. In FIG. 2, numerals 1 to 6 indicate equivalent or equivalent parts in FIG. 22 is a MOSFET for detecting the amount of accumulated charge shown in FIG. 23 is a peripheral circuit for transmitting the state of the MOSFET 22 for detecting the amount of accumulated charge to the outside, and is formed on the P-type silicon substrate 7. 24 is a power supply voltage terminal for supplying power to the peripheral circuit 23, and a positive potential is applied thereto. 25 indicates an output terminal. Reference numeral 26 indicates a peripheral circuit resistor constituting the peripheral circuit 23, and 27 indicates a peripheral circuit MOSFET. One end of the resistor and the drain of the peripheral circuit MOSFET 27 are connected to the power supply voltage terminal 24, and the other end of the peripheral circuit resistor 26 and the gate of the peripheral circuit MOSFET 27 are connected to a MOSFET for detecting the amount of accumulated charge.
Connected to the drain of ET22. Note that the source of the peripheral circuit MOSFET 27 is connected to the output terminal 25,
The source of the MOSFET 22 for detecting the amount of accumulated charge is grounded to the P-type silicon substrate 7.

【0016】次に動作について説明する。本実施例は受
光部1に蓄積電荷量検知用のMOSFET22のゲート
が接続されており、このMOSFET22により受光部
の蓄積電荷量をリアルタイムで検知することができる。 信号電荷を読み出した直後、受光部1は一定の正電位に
リセットされる。この時、蓄積電荷量検知用MOSFE
T22のソース・ドレイン間はローインピーダンス状態
である。受光部1に電荷が蓄積されるに従って、受光部
1の電位は低下するため、蓄積電荷量検知用MOSFE
T22のソース・ドレイン間はハイインピーダンス状態
になる。周辺回路MOSFET27のゲート電位は高く
なるが、全ての周辺回路MOSFET27のソースが出
力端子25に接続されているため、全ての周辺回路MO
SFET27の中でオン状態になるのは、最もゲート電
位が高いFETのみであり、他の周辺回路MOSFET
27はオフ状態である。従って、出力端子25の電位は
そのゲート電位の最も高い周辺回路MOSFET27の
ゲート電位に応じてアナログ的に変化する。即ち、周辺
回路23は全ての受光部1の中で最も蓄積電荷量が多い
ものを選択し、それに応じた電位を出力端子25より出
力することが可能である。
Next, the operation will be explained. In this embodiment, the gate of a MOSFET 22 for detecting the amount of accumulated charge is connected to the light receiving section 1, and the amount of accumulated charge in the light receiving section can be detected in real time by this MOSFET 22. Immediately after reading out the signal charges, the light receiving section 1 is reset to a constant positive potential. At this time, the MOSFE for detecting the amount of accumulated charge
The source and drain of T22 are in a low impedance state. As charges are accumulated in the light receiving section 1, the potential of the light receiving section 1 decreases, so the MOSFE for detecting the amount of accumulated charge is
The source and drain of T22 are in a high impedance state. Although the gate potential of the peripheral circuit MOSFET 27 becomes high, since the sources of all the peripheral circuit MOSFETs 27 are connected to the output terminal 25, all the peripheral circuit MOSFETs 27
Among the SFETs 27, only the FET with the highest gate potential is turned on, and other peripheral circuit MOSFETs are turned on.
27 is in an off state. Therefore, the potential of the output terminal 25 changes in an analog manner according to the gate potential of the peripheral circuit MOSFET 27 having the highest gate potential. That is, the peripheral circuit 23 can select the one with the largest amount of accumulated charge among all the light receiving sections 1 and output a corresponding potential from the output terminal 25.

【0017】このように、本実施例によれば、蓄積電荷
量検知用MOSFET22をそのゲートが受光部1に接
続されるように形成し、かつ蓄積電荷量検知用MOSF
ETにより駆動されるMOSFETと抵抗からなる周辺
回路により、全ての受光部1の中で最も蓄積電荷量が多
いものを選択するようにしたので、受光部の蓄積電荷量
のうちの最大のものをリアルタイムに検知でき、飽和す
る直前の蓄積電荷量を容易に検出できる。また電子シャ
ッタと組み合わせることにより、蓄積電荷量を読み出す
ことなしに露光時間を最適化できる。
As described above, according to this embodiment, the MOSFET 22 for detecting the amount of accumulated charge is formed so that its gate is connected to the light receiving section 1, and the MOSFET 22 for detecting the amount of accumulated charge is formed such that its gate is connected to the light receiving section 1.
The peripheral circuit consisting of a MOSFET driven by an ET and a resistor selects the one with the largest amount of accumulated charge among all the light receiving sections 1, so the largest amount of accumulated charge in the light receiving section is selected. It can be detected in real time, and the amount of accumulated charge just before saturation can be easily detected. Furthermore, by combining it with an electronic shutter, the exposure time can be optimized without reading out the amount of accumulated charge.

【0018】ところで、上記説明では、受光部1を1次
元的に配した構造について説明したが、2次元的に配し
た場合についても同様である。また、蓄積電荷量検知用
トランジスタにn型MOSFETを用いたが、受光部1
電位に応じた電位を供給できるトランジスタであるなら
ば、P型MOSFETを用いてもよく、さらに周辺回路
については蓄積電荷に応じて出力が変化するものであれ
ばどのような回路構成のものでもよい。
By the way, in the above explanation, the structure in which the light receiving sections 1 are arranged one-dimensionally has been explained, but the same applies to the case where they are arranged two-dimensionally. In addition, although an n-type MOSFET was used as the transistor for detecting the amount of accumulated charge, the light receiving section 1
A P-type MOSFET may be used as long as the transistor can supply a potential according to the potential, and any circuit configuration may be used for the peripheral circuit as long as the output changes depending on the accumulated charge. .

【0019】[0019]

【発明の効果】以上のように、この発明に係る固体撮像
素子によれば、受光部が形成された半導体基板上に蓄積
電荷検知用のトランジスタを形成するとともに、かつそ
のゲートが受光部に接続されるようにするようにしたの
で、受光部に蓄積した電荷をリアルタイムに検知するこ
とができ、電荷蓄積時間の最適化を図ることが可能とな
る。
As described above, according to the solid-state image sensor of the present invention, a transistor for detecting accumulated charge is formed on a semiconductor substrate on which a light receiving section is formed, and the gate thereof is connected to the light receiving section. Therefore, the charge accumulated in the light receiving section can be detected in real time, and the charge accumulation time can be optimized.

【0020】また、蓄積電荷量検知用のトランジスタに
、該トランジスタにより駆動され、ゲート電位が最大と
なる画素を検出してその電荷蓄積量を読出す周辺回路を
接続するようにしたので、電子シャッタと組合わせるこ
とにより、露出を最適に制御できる効果がある。
Furthermore, since the transistor for detecting the amount of accumulated charge is connected to a peripheral circuit that is driven by the transistor and detects the pixel with the maximum gate potential and reads out the amount of accumulated charge, the electronic shutter In combination with this, it is possible to optimally control exposure.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例を示す要部断面図である。FIG. 1 is a sectional view of a main part showing an embodiment of the present invention.

【図2】本発明の一実施例を示す配線図である。FIG. 2 is a wiring diagram showing one embodiment of the present invention.

【図3】従来の固体撮像素子の要部断面図である。FIG. 3 is a sectional view of a main part of a conventional solid-state image sensor.

【図4】固体撮像素子の平面図である。FIG. 4 is a plan view of a solid-state image sensor.

【図5】固体撮像素子の動作を示すタイミングチャート
図である。
FIG. 5 is a timing chart diagram showing the operation of the solid-state image sensor.

【図6】1サイクル間における蓄積電荷量の変化を示す
図である。
FIG. 6 is a diagram showing changes in the amount of accumulated charge during one cycle.

【符号の説明】[Explanation of symbols]

1    受光部 2    CCD部 3    読み出しMOSFET 4    増幅器 5    掃き出しドレイン 6    掃き出しMOSFET 7    P型シリコン基板 8    n型拡散層 9    酸化膜 10  保護膜 11  読み出しMOSFETの動作 12  読み出しMOSFETがオン状態になるタイミ
ング及び時間 13  掃き出しMOSFETの動作 14  掃き出しMOSFETがオン状態になるタイミ
ング及び時間 15  CCD部の動作 16  CCD部が転送状態になるタイミング及び時間
17  1サイクル時間 18  過剰電荷が蓄積される時間 19  信号電荷が蓄積される時間 20  本発明による蓄積電荷量検知用MOSFETの
ゲート 21  蓄積電荷量検知用MOSFETのゲートと受光
部を接続する金属配置 22  蓄積電荷量検知用MOSFET23  周辺回
路 24  周辺回路の電源電圧端子 25  周辺回路の出力端子 26  周辺回路の抵抗 27  周辺回路のMOSFET
1 Light receiving section 2 CCD section 3 Readout MOSFET 4 Amplifier 5 Sweep drain 6 Sweep out MOSFET 7 P-type silicon substrate 8 N-type diffusion layer 9 Oxide film 10 Protective film 11 Operation of readout MOSFET 12 Timing and time when readout MOSFET turns on state 13 Operation of the sweep MOSFET 14 Timing and time when the sweep MOSFET turns on 15 Operation of the CCD section 16 Timing and time when the CCD section enters the transfer state 17 One cycle time 18 Time during which excess charges are accumulated 19 Signal charges are accumulated Time 20 Gate 21 of the MOSFET for detecting the amount of accumulated charge according to the present invention Metal arrangement 22 connecting the gate of the MOSFET for detecting the amount of accumulated charge and the light receiving part MOSFET 23 for detecting the amount of accumulated charge Peripheral circuit 24 Power supply voltage terminal 25 of the peripheral circuit Output terminal 26 Peripheral circuit resistance 27 Peripheral circuit MOSFET

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  受光により信号電荷を発生する受光部
と、当該信号電荷を転送する電荷転送部とを半導体基板
の一主面上に配列してなる構造を有する固体撮像素子に
おいて、上記各画素の受光部と同一半導体基板上に蓄積
電荷量検知用トランジスタが形成され、該蓄積電荷量検
知用トランジスタのゲートが上記各画素に接続された構
造を有することを特徴とする固体撮像素子。
1. A solid-state imaging device having a structure in which a light receiving section that generates signal charges upon receiving light and a charge transfer section that transfers the signal charges are arranged on one principal surface of a semiconductor substrate, wherein each pixel 1. A solid-state image sensing device having a structure in which a transistor for detecting the amount of accumulated charge is formed on the same semiconductor substrate as a light receiving section, and a gate of the transistor for detecting the amount of accumulated charge is connected to each of the pixels.
【請求項2】上記蓄積電荷量検知用トランジスタには、
該トランジスタにより駆動され、ゲート電位が最大とな
る画素を検出しその電荷蓄積量を読出す周辺回路が接続
されていることを特徴とする請求項1記載の固体撮像素
子。
2. The transistor for detecting the amount of accumulated charge includes:
2. The solid-state image sensing device according to claim 1, further comprising a peripheral circuit connected thereto that is driven by said transistor, detects a pixel having a maximum gate potential, and reads out the amount of charge accumulated therein.
JP3106329A 1991-03-26 1991-03-26 Solid-state image pick-up element Pending JPH04298078A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3106329A JPH04298078A (en) 1991-03-26 1991-03-26 Solid-state image pick-up element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3106329A JPH04298078A (en) 1991-03-26 1991-03-26 Solid-state image pick-up element

Publications (1)

Publication Number Publication Date
JPH04298078A true JPH04298078A (en) 1992-10-21

Family

ID=14430866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3106329A Pending JPH04298078A (en) 1991-03-26 1991-03-26 Solid-state image pick-up element

Country Status (1)

Country Link
JP (1) JPH04298078A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9233455B2 (en) 2010-12-02 2016-01-12 Fuji Electric Co., Ltd. Chucking device and chucking method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9233455B2 (en) 2010-12-02 2016-01-12 Fuji Electric Co., Ltd. Chucking device and chucking method

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