JPH04288619A - Bit build control system - Google Patents

Abstract

PURPOSE:To easily transmit data between devices having different boundaries at high speed in the bit built control system which generates data to be transmitted between devices having different boundaries. CONSTITUTION:When data having special boundaries is transmitted between an information processor main body 11 having prescribed boundaries and a plotter 12 having special boundaries other than prescribed boundaries in the bit build control system which builds bits of data to be transmitted between the information processor main body 11 and the plotter 12, not only an ineffective bit is provided besides data of special boundaries to build bits of data having a data format of prescribed boundaries but also data related to the set position of the ineffective bit transmitted between a data access controller 14 and a frame memory access controller 15 is generated.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bit-built control system, and more particularly to a bit-built control system for generating data to be transmitted between devices having different boundaries.

For example, in a three-dimensional image processing device that performs graphic processing, the information processing device main body and the image processing device are separated and independent, and the device has a configuration that enables high-speed processing by using a high-speed, high-capacity information processing device main body. is being provided.

[0003] Therefore, it becomes necessary to transmit data between the main body of the information processing apparatus and the image processing apparatus, and it is important to transmit this data with easy processing and at high speed.

0004

2. Description of the Related Art FIG. 7 is a conceptual diagram of a conventional image processing apparatus 1. As shown in FIG. In the figure, 2 is a host computer operated by a user, 3 is a frame memory access control section, 4 is a frame memory, and 5 is a display device. A conventional image processing apparatus 1 has a configuration in which a host computer 2, a frame memory access control section 3, and a frame memory 4 are arranged in the same apparatus, as shown in the figure. Therefore, when the user attempts to read/write to the frame memory 4, the boundary within the device is shared between the host computer 2 and the frame memory access control unit 3, so the frame memory access is requested by the user. The control unit 3 was able to directly access the frame memory 4.

[0005]

[Problems to be Solved by the Invention] In order to increase the speed of image processing, which has been desired in recent years, it is necessary to increase the size of the host computer 6. In this case, it is necessary to increase the size of the host computer 6. It becomes difficult to incorporate. Therefore, as shown in FIG. 8, image processing apparatuses 7 are being manufactured in which a host computer 6 is separated and independent from a frame memory access control section 3 and a frame memory 4.

In this way, the host computer 6 (hereinafter, the device on which the host computer 6 is installed is referred to as the information processing device main body 8), the frame memory access control unit 3, and the frame memory 4 (hereinafter, the frame memory access control unit 8) The image processing device 7 has a configuration in which the side where the section 3 and the frame memory 4 are provided is separated from the rendering device 9.
Then, it is inevitably necessary to transmit data between the information processing device main body 8 and the drawing device 9.

However, if the boundary of the information processing device main body 8 and the boundary of the frame memory access control unit 3 are different, an interface mismatch occurs and data cannot be transmitted, and the information processing device main body 8 cannot be operated. Users will no longer be able to read/write from frame memory.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a bit-build control method that can easily and quickly transmit data between devices having different boundaries.

[0009]

[Means for Solving the Problems] In order to solve the above problems, in the present invention, a predetermined boundary (default boundary)
In a bit-build control method that bit-builds data transmitted between a first device having a predetermined boundary and a second device having a boundary (special boundary) different from the predetermined boundary, the data of the special boundary is bit-built. When transmitting between a first device and a second device, data having a predetermined boundary data format is bit-built by providing an invalid bit in addition to special boundary data.

[0010] Furthermore, the information processing apparatus main body is composed of a host computer and a data access control device, and has a predetermined boundary (default boundary), a frame memory and a frame memory access control device, and the above-mentioned In a bit-build control method that bit-builds data transmitted between a rendering device having a boundary (special boundary) different from a default boundary, data of the special boundary is transmitted between the information processing device main body and the rendering device. When doing so, in addition to the special boundary data, an invalid bit is provided to bit-build data having the data format of the default boundary, and the data is exchanged between the data access control device and the frame memory access control device.
This method is characterized by generating data regarding the setting position of an invalid bit.

[0011]

[Operation] With the above configuration, the first device and the second
Even if the boundaries of the devices are different, data can be read/written between the devices without changing the interface of each device.

[0012] Furthermore, since data at the position where an invalid bit is provided in the data is also exchanged between the first device and the second device, the process of removing the invalid bit and extracting the necessary data is facilitated. be able to.

[0013]

Embodiments Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a configuration diagram showing an image information processing apparatus 10 to which a bit-built control method is applied, which is an embodiment of the present invention. The image information processing device 10 includes an information processing device main body 11 and a drawing device 12. The information processing device main body 11 includes a host computer 13 that is operated by a user and performs three-dimensional graphic processing, and a data access control device 14. The drawing device 12 also includes a frame memory access control section 15, a frame memory 16, and a display device (not shown). It is also assumed that the boundary (default binder) of the information processing apparatus main body 11 is 16 bits, and that the data stored in the frame memory is a 7-bit boundary (special boundary).

First, in the image information processing apparatus 10 having the above configuration, a bit build control process when data is read from the frame memory 16 to the information processing apparatus main body 11 will be explained. Note that FIG. 1 shows the image information processing apparatus 10 at the time of this read.

Now, let us consider a case where a pattern of data as shown in FIG. 2 (the letter "A" displayed with 7 dots in the X direction and 7 dots in the Y direction) is notified to the information processing apparatus main body 11. At this time, since the boundary of the information processing device main body 11 is 16 bits (that is, a word boundary), the format of the data notified to the information processing device main body 11 is a state in which data is packed in bits as shown in FIG. There is a need to. Note that "1" in Figure 3 is "●" in Figure 2.
, and "0" in FIG. 3 corresponds to "○" in FIG. 2.

Therefore, in this method, when reading data from the frame memory 16 to the information processing device main body 11, the data access control device 14 first inputs the coordinate values (x, y) of the data to be read to the frame memory access control device 15. Perform prerequisite processing to provide the number of words of data to be read (for word bounding) as an interface. Subsequently, the data access control device 14 calls the frame memory access control device 15 that has taken in the above interface, and thereby the frame memory access control device 15 takes in data from the frame memory 16. The data captured at this time is data corresponding to the first line (the top line) of the y coordinate in FIG.

When the frame memory access control device 15 takes in data (7-bit data) from the frame memory 16, it bit-builds data corresponding to a word boundary (16 bits). Specifically, data fetched from the frame memory 16 is recorded in the first 7 bits, and invalid bits are set in the remaining 9 bits. The data indicated by ■ in FIG. 4 is data that has been bit-built as described above, and the portion indicated by the matte finish in the figure is an invalid bit. Since the data bit-built in this way is data compatible with word bounding, it can be transferred from the frame memory access control device 15 to the information processing device main body 11.

When the data transfer process described above is completed, the data access control device 14 calls the frame memory access control device 15 again, and the frame memory access control device 15 transfers the second y-coordinate of the frame memory 16 in FIG. Line (second line from the top)
Import the relevant data. Subsequently, the data access control device 14 records data from a position shifted by the area where the data from the frame memory 16 was previously recorded, and sets invalid bits in areas other than this data. As a result, data corresponding to word bounding is bit-built. The data bit-built in this way is the data indicated by ■ in FIG. Since the bit-built data is also data that corresponds to word boundaries, the frame memory access control device 1
5 to the information processing apparatus main body 11.

[0019] Furthermore, the data access control device 14:
The data shown in FIG. 3 that does not include invalid bits is generated from the transferred data. Specifically, the following processing is performed. As mentioned above, between the data to be transferred this time and the data to be transferred next time, the data in the frame memory 16 recorded in the data to be transferred next time is equal to the area where the data in the frame memory 16 was recorded last time. recorded at a different position. To explain using Figure 4 as an example, the data marked with ■ in the figure is the current data, and ■
The data indicated by is the next data. Therefore, by ANDing the current data (2) and the next data (2), it is possible to obtain bit data of only the data stored in the frame memory 16 that does not include invalid bits.

Hereinafter, by repeatedly performing the above processing on all data stored in the frame memory 16, information from the drawing device 12 is transmitted between the information processing device main body 11 and the drawing device 12, which have different boundaries. Data read processing can be performed on the processing device main body 11.

Next, a bit build control process when writing data from the information processing device main body 11 to the frame memory 16 will be explained. Incidentally, FIG. 5 shows the image information processing apparatus 10 at the time of this read. Further, a case where bit data shown in FIG. 3 that is included in the information processing apparatus main body 11 is written to the frame memory 16 will be described as an example.

When writing data from the information processing device main body 11 to the frame memory 16, the data access control device 14 first writes data to the frame memory access control device 14 as shown in FIG.
Preliminary processing is performed to provide the data of the first word of the bit data indicated by , the write start coordinates (xs, y), and the end coordinates (xe, y) as an interface.

When the prerequisite processing is completed, the data access control device 14 transfers the bit data shown in FIG. 3 to the frame memory access control device 15 in word boundary units.
Transfer to. In the frame memory access control device 15, the starting coordinates (xs, y) given as a precondition
Based on the end coordinates (xe, y), xs-xe worth of data (7 bits worth of data) from the first transferred data is written to the y-coordinate 1 position of the frame memory 16. Assuming that the data indicated by ■ in FIG. 6 is the transferred data, the area that is written is the area indicated by the matte finish in the figure.

Next, the data access control device 14
The coordinates are changed to 2, and the bit data is again transferred to the frame memory access control device 15 in word boundary units. At this time, the data access control device 14 sets an invalid bit in the area corresponding to the data written to the frame memory 16 last time. 6 in FIG. 6 indicates data in which an invalid bit is set. When data including an invalid bit is transferred, the frame memory access control device 15 skips the invalid bit and transfers xs-xe worth of data from the bit position where the invalid bit was skipped to the y-coordinate 2 of the frame memory 16. Write to the position. Hereinafter, by repeatedly performing the above processing on all data stored in the host computer 13, the information processing device main body 11 and the drawing device 1, which have different boundaries from each other.
2, data can be written from the information processing device main body 11 to the drawing device 12.

In the above embodiment, the image processing device 10
Although an example in which the present invention is applied to data transmission between the information processing device main body 11 and the drawing device 12 in Of course.

[0026]

As described above, according to the present invention, even if the first device and the second device have different boundaries, it is possible to read/read data between each device without changing the interface of each device. light can be done.

[0027] Furthermore, since the data at the position where the invalid bit is provided in the data is exchanged between the first device and the second device, it is easy to remove the invalid bit and extract the necessary data. be able to.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an image processing apparatus to which a bit-built control method is applied, which is an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a read/write pattern to be transferred between the information processing device main body and the drawing device.

FIG. 3 is a diagram illustrating an example of bit data of a read/write pattern according to boundaries on the information processing apparatus main body side.

FIG. 4 is a diagram for explaining bit build control processing when reading data from a frame memory to the information processing apparatus main body.

FIG. 5 is a diagram for explaining the image information processing device at the time of reading.

FIG. 6 is a diagram for explaining bit build control processing when writing data from the information processing device main body to a frame memory.

FIG. 7 is a diagram for explaining access to a frame memory in the related art.

FIG. 8 is a diagram for explaining an image processing apparatus in which an information processing apparatus main body and a drawing device are independent;

Claims (2)

[Claims] [Claim 1] Default boundary (default boundary)
A bit-build control method that bit-builds data transmitted between a first device (13) having a boundary (13) and a second device (16) having a boundary (special boundary) different from the predetermined boundary, When transmitting the data of the special boundary between the first device (13) and the second device (16), an invalid bit is provided in addition to the data of the special boundary, so that the data of the predetermined boundary is transmitted. A bit-built control method characterized by generating data having a format. 2. Consisting of a host computer (13) and a data access control device (14),
The information processing device main body (11) has a predetermined boundary (default boundary), a frame memory (16), and a frame memory access control device (15). A bit-build control method that bit-builds data transmitted between the information processing device main body (11) and the drawing device (12), the data being transferred between the information processing device main body (11) and the drawing device (12). When transmitting the data, in addition to the data of the special boundary, an invalid bit is provided to bit-build the data having the data format of the predetermined boundary, and the data access control device (14) and the frame memory access control device ( 15) A bit build control method characterized by generating data regarding the setting position of the invalid bit, which is exchanged between the bit build control method and the invalid bit.