JPH0428452U - - Google Patents

Info

Publication number
JPH0428452U
JPH0428452U JP6870290U JP6870290U JPH0428452U JP H0428452 U JPH0428452 U JP H0428452U JP 6870290 U JP6870290 U JP 6870290U JP 6870290 U JP6870290 U JP 6870290U JP H0428452 U JPH0428452 U JP H0428452U
Authority
JP
Japan
Prior art keywords
lead
semiconductor chip
base portion
serve
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6870290U
Other languages
English (en)
Japanese (ja)
Other versions
JP2507271Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6870290U priority Critical patent/JP2507271Y2/ja
Publication of JPH0428452U publication Critical patent/JPH0428452U/ja
Application granted granted Critical
Publication of JP2507271Y2 publication Critical patent/JP2507271Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP6870290U 1990-06-28 1990-06-28 半導体装置 Expired - Fee Related JP2507271Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6870290U JP2507271Y2 (ja) 1990-06-28 1990-06-28 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6870290U JP2507271Y2 (ja) 1990-06-28 1990-06-28 半導体装置

Publications (2)

Publication Number Publication Date
JPH0428452U true JPH0428452U (xx) 1992-03-06
JP2507271Y2 JP2507271Y2 (ja) 1996-08-14

Family

ID=31603365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6870290U Expired - Fee Related JP2507271Y2 (ja) 1990-06-28 1990-06-28 半導体装置

Country Status (1)

Country Link
JP (1) JP2507271Y2 (xx)

Also Published As

Publication number Publication date
JP2507271Y2 (ja) 1996-08-14

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees