JPH04278472A - Method for evaluating characteristics of thin film transistor - Google Patents

Abstract

PURPOSE:To make high-speed measurement and evaluation. CONSTITUTION:A gate sweep area between a gate voltage (VTH1+VA)2 for starting actually a sweep and a gate voltage (VTH1+VB)3 for ending the sweep is set. Next, an OFF-state voltage (VGoff)4 is applied to a gate terminal of a tested sample and an OFF-state output current (Ioff)5 at this time is measured. After the measurement of the output current Ioff is finished, the gate voltage is jumped up to (VTH1+VA)2, and the output current is measured while the gate voltage is swept at a constant speed to become (VTH1+VB)3. Then, the gate voltage is jumped up to an ON-state voltage (VGon)7, and the OFF-state output current (Ion)8 at this time is measured.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for evaluating characteristics of thin film transistors.

0002

[Prior Art] TFTs are mainly used for voltage driving of pixels in liquid crystal display devices;
The parameters that especially need to be evaluated as the DC characteristics of the
(off voltage) or VGon (on voltage) is applied to the gate, the off output current (Ioff) and on output current (Ion), and as with normal FETs, the threshold voltage VTH and effective mobility μeff etc. It is also necessary to evaluate

A conventional method for evaluating the direct current characteristics of a thin film transistor (hereinafter abbreviated as TFT) was performed as follows. First, as shown in FIG. 2(a), the gate voltage (VGoff) 4 in the off-gate voltage region where the output current of the TFT under test is cut off (Ioff) 5 is set as the sweep start voltage, and the TFT
The output current was measured by sweeping the gate voltage at a constant speed to an on-gate voltage (VGon) of 7 within the gate voltage region where the output current of T is saturated and becomes (Ion) 8.

In the example shown in FIG. 2(a), the gate voltage is set to V
When Goff and VGon are defined, the corresponding output currents are evaluated as Ioff and Ion, respectively.
The evaluation of VTH and μeff is the output current I to the (1/2) power (
It was determined from the relationship of equations (1) and (2), which is the slope (square root of the gain coefficient β) of the linear portion of the correlation curve between the vertical axis) and the gate voltage (horizontal axis).

[0005]

Here, VG: gate voltage, VTH: threshold voltage, μeff: effective mobility, ε0: permittivity in vacuum, εr: relative dielectric constant of gate insulating film, W: gate width, L:
Gate length, t: Gate insulating film thickness.

In order to make equation (1) hold, a voltage of (VG-VTH) or more is applied between the two output terminals.

Further, the threshold voltage VTH is specifically determined from the point VTH where the correlation straight line 11, which is an extension of the straight line portion of the correlation curve 22 in FIG. 2(b), intersects with the horizontal axis.

Further, the VTH of an FET formed on a single-crystal semiconductor substrate is sometimes measured at high speed by the method shown in the graph of FIG. First, the output current has a certain small value (IT
H) The gate voltage when it becomes 18 is the threshold voltage (VT
H) Define as 17.

[0010] Next, a gate voltage (V1) 13 higher than the threshold value VTH obtained in advance by measurement of a sample previously manufactured in a similar process is applied to the gate, and the output current (I1) 14 at that time is measured. do. Comparing I1 and ITH, I
If 1 is large, a value (V2) 15 obtained by subtracting a certain value ΔV from V1 is applied to the gate, and the output current (I2)
Measure 16.

[0011] Furthermore, when I2 is smaller by comparing I2 and ITH, a value (V3) obtained by adding (ΔV/2) to V2 is applied to the gate, and the output current I3 at that time is measured.
Compare with H. If the difference between the output current I3 and ITH is within the allowable range, the gate applied voltage at that time is applied to the FET under test.
It was close to the threshold voltage VTH of .

0012

[Problem to be solved by the invention] The above-mentioned conventional TFT
The method for evaluating the DC characteristics of is Ioff, Ion, VTH,
In order to measure each parameter of μeff, the gate voltage was swept from VGoff to VGon at a constant speed, which had the disadvantage that the measurement time was extremely long. For example, VGoff is -5V, VGon is 10V
, the time for one measurement was 30 seconds when the gate sweep rate was 0.5 V/sec.

In addition, the high-speed measurement of VTH shown in FIG.
When applied to FT, since the channel layer of TFT is formed of an amorphous or polycrystalline semiconductor, the fast surface state density NST is large and fluctuates, so if the gate voltage is changed rapidly, the output current will change. The drawback was that it fluctuated, making it impossible to make highly accurate measurements.

[0014]

[Means for Solving the Problems] The method for specific evaluation of thin film transistors of the present invention is to apply a predetermined test cutoff gate voltage to the gate in a cutoff gate voltage region corresponding to the cutoff region of the output current of the transistor under test to cut it off. After measuring the output current, jump the output current monotonically to a predetermined test small gate voltage within the linear gate voltage region, and then jump from the test small gate voltage to a predetermined test within the linearly increasing gate voltage region. A test sweep gate voltage is applied to the gate up to a large gate voltage, and a linear output current that increases monotonically and corresponds to the test large gate voltage is measured, and then a linear output current corresponding to the test large gate voltage is measured, and then a linear output current corresponding to the saturation region of the output current of the transistor under test is measured. The gate voltage is jumped up to a predetermined test saturation gate voltage within the saturation gate voltage region, and the saturation output current of the corresponding transistor under test is measured.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings. FIG. 1 is a characteristic diagram of gate voltage and output current for explaining one embodiment of the present invention. First, in the region where the output current increases linearly based on the threshold voltage (VTH1) 1 of a similar sample measured using the conventional method, we will compare the gate voltage (VTH1 + VA) 2 where the sweep actually starts and the sweep The gate sweep region of the gate voltage (VTH1+VB) 3 to be completed is set. Here, VA and VB are constants determined by the expected magnitude of variation in threshold voltages of a plurality of samples to be measured.

Next, an off voltage (VGoff) 4 is applied to the gate terminal of the sample under test, and the off output current (VGoff) at this time is
Measure Ioff)5. After completing the measurement of the output current Ioff, jump the gate voltage to (VTH1+VA)2,
The output current is measured while sweeping the gate voltage at a constant speed until it reaches (VTH1+VB)3. Next, the gate voltage is jumped to the on voltage (VGon) 7 and the off output current (Ion) 8 at this time is measured.

Note that in this series of measurements, the gate voltage V
When G is VG<(VTH1+VB)3, if a potential difference of at least (VG-VTH1) is applied between the two output terminals,
Since the above equation (1) holds true, the vertical axis is (1/1) of the output current.
2) is plotted in FIG. 1(b), a correlation straight line 11 is drawn by extending the straight line part of this correlation curve 22 downward, and the threshold voltage of the test sample is calculated from the intersection of this straight line 11 and the horizontal axis. (VTH2)12 is found. Further, the effective mobility μeff can also be determined from the above-mentioned slope of the straight line and equation (2).

Therefore, when the present invention is applied to the measurement of thin film transistors (TFTs) used as driving devices for liquid crystal displays, Ioff, Ion, VTH, μef, which are necessary for monitoring voltage holding characteristics, response characteristics, etc.
It becomes possible to quickly evaluate each parameter of f.

For example, VGoff is -5V, VGon is +
10V, the estimated threshold voltage VTH1 is +2V, and the gate voltage sweep speed is 0.5V/s, (VTH1+
VA) = 1.0V, (VTH1+VB) = 4.0V, the measurement that conventionally took 30 seconds takes 6 to 6 seconds in this example.
This can be done in about 8 seconds.

Next, as a second embodiment, a case where the present invention is applied to measurement of DC parameters of TFTs of a large number of samples will be described.

[0021] If the threshold voltage of the test sample fluctuates with a certain tendency in the population, the first
If the average value (VTHav) of the threshold voltages of several samples measured immediately before the measurement of the transistor under test is applied as the estimated threshold voltage (VTH1)1 shown in the example, it will always be (VTH1+VA). The gate voltage sweep section of (VTH1+VB) can be kept within the optimum region.

In addition, the correlation curve 22 used when determining the threshold voltage VTH of the TFT under test in FIG. 1(b)
By confirming that the square root of Ion, which is the on-state current (1/2), exists on the correlation straight line 11 obtained by extending the straight line part of The reliability of the embodiment can be further improved.

[0023]

Effects of the Invention As explained above, the present invention can improve the typical DC characteristics of TFTs such as Ioff, Ion, VTH, μ
Since the gate voltage is applied and swept only in the region necessary to obtain eff, and the voltage does not jump and sweep in other gate voltage regions, it has the effect of enabling high-speed measurement and evaluation.

[Brief explanation of the drawing]

FIG. 1 is a characteristic diagram of gate voltage and output current of a transistor for explaining a first embodiment of the present invention.

FIG. 2 is a characteristic diagram of gate voltage and output current for explaining an example of a conventional thin film transistor characteristic evaluation method.

FIG. 3 is a characteristic diagram of output current for explaining another example of a conventional thin film transistor characteristic evaluation method.

[Explanation of symbols]

1 Estimated threshold 2 Sweep small gate voltage 3 Sweep large gate voltage 4 Off-gate voltage 5,9 Off output current 6 Gate sweep area 7 On-gate voltage 8,10 On output voltage 11 Correlation line 12 Measurement threshold 13, 22 Correlation curve

Claims (2)

[Claims] 1. After applying a predetermined test cutoff gate voltage within a cutoff gate voltage region corresponding to the cutoff region of the output current of the transistor under test to the gate and measure the cutoff output current, the output current is monotonically increased. jump to a predetermined test small gate voltage within the linear gate voltage region, and then increase the test sweep gate voltage between the test small gate voltage and the predetermined test large gate voltage within the linear increasing gate voltage region. Measure the linear output current corresponding to the test large gate voltage that increases monotonically by applying the 1. A method for evaluating the characteristics of a thin film transistor, the method comprising measuring the saturation output current of the corresponding transistor under test by jumping the gate voltage. 2. A gate voltage or threshold that provides the maximum slope within the triode characteristic region of an output current and gate voltage characteristic curve determined in advance using test results of a transistor manufactured in the same manufacturing process as the transistor under test. 2. The thin film transistor characteristic evaluation method according to claim 1, further comprising determining the linear gate voltage region that linearly increases in correspondence with the square root of the linear output current of the transistor under test based on the value voltage.