JPH04277620A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To improve throughput for decomposing photoresist away by ashing after this photoresist is used as a mask for ion implantation. CONSTITUTION:A semiconductor manufacture equipment of this invention has a structure comprising an ion implantation chamber 1 which implants impurity ions to the surface of a semiconductor wafer 3 and an ashing chamber 2 which decomposes photoresist away, with the above-mentioned ion implantation chamber 1 and the ashing chamber 2 coupled by a vacuum transfer chamber 8 which can evolve internally a vacuum or non-oxidative dry gas atmosphere.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a manufacturing technology for semiconductor integrated circuit devices, and is particularly applicable to an ashing process after ion implantation using a photoresist deposited on a semiconductor wafer as a mask. It's about technology.

0002

2. Description of the Related Art Ion implantation is mainly used to form semiconductor regions such as sources, drains, and wells by doping impurities onto semiconductor wafers. To form the above semiconductor region by ion implantation, other regions are masked with photoresist, and then predetermined impurity ions are implanted into the entire surface of the wafer, and then the unnecessary photoresist on the wafer surface is removed by ashing. Remove.

[0003] Regarding photoresist ashing technology, please refer to Press Journal Co., Ltd., November 1989.
"'90 Latest Semiconductor Process Technology" P2 published on the 2nd of the month
20-P229, etc.

0004

[Problems to be Solved by the Invention] Conventionally, in the photoresist ashing process, there has been a problem that the ashing throughput decreases due to the deterioration of the photoresist due to ion implantation.How can this be improved? is an important issue in the ashing process.

[0005] Also, in the ion implantation process, harmful substances such as arsenic (As) are used as impurities. Although it is necessary to prevent the leakage of liquid to the outside of the device, in the prior art, insufficient consideration has been given to this point.

The present invention has been made in view of the above-mentioned problems, and its purpose is to provide a technology that can improve the throughput when removing unnecessary photoresist by ashing after ion implantation. Our goal is to provide the following.

Another object of the present invention is to reliably prevent harmful substances attached to the wafer from leaking out of the ashing device when the wafer after ion implantation is transferred from the ion implantation device to the ashing device. Our goal is to provide the technology that makes it possible.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[0009]

SUMMARY OF THE INVENTION According to the present invention, a wafer is transferred from an ion implantation process using a photoresist as a mask to an ashing process in a vacuum or in an atmosphere of non-oxidizing dry gas.

0010

[Effect] Photoresist changes in quality due to ion implantation,
One reason why the throughput of ashing decreases is that after ion implantation, the photoresist reacts with oxygen and moisture in the atmosphere to form a hardened layer on the surface. Therefore, by setting the atmosphere when the wafer is transferred from the ion implantation process to the ashing process to be a vacuum or a non-oxidizing dry gas atmosphere, it is possible to prevent the formation of a hardened layer on the photoresist surface.

Furthermore, harmful substances such as arsenic attached to the wafer during the ion implantation process can be prevented from leaking out of the apparatus when the wafer is transferred from the ion implantation process to the ashing process.

0012

Embodiment FIG. 1 is a diagram showing the overall configuration of a semiconductor manufacturing apparatus according to this embodiment. This manufacturing apparatus is an apparatus that performs ion implantation and ashing in an integrated manner, and includes an ion implantation chamber 1 and an ashing chamber 2 that are arranged separately.

A wafer stage 4 on which a semiconductor wafer 3 is placed is installed in an ion implantation chamber 1 whose interior can be evacuated to a predetermined degree of vacuum. Although not shown,
The ion implantation chamber 1 is connected to other components of the ion implantation apparatus, such as an ion source, a mass spectrometer, a slit electrode, and the like.

A vacuum load lock chamber 6 equipped with a robot arm 5 is installed in the front stage of the ion implantation chamber 1, and a plurality of wafers 3 housed in a wafer cassette 7 are handled by the robot arm 5. The sheets are transported one by one to the vacuum load lock chamber 6 and then to the next stage ion implantation chamber 1.

The wafer 3 housed in the wafer cassette 7 has a photoresist mask formed on its surface. That is, the wafer 3 is transported to this manufacturing apparatus through photoresist coating, exposure, and development steps.

A vacuum transfer chamber 8 that can evacuate the interior to a predetermined degree of vacuum is installed downstream of the ion implantation chamber 1, and the ion implantation chamber 1 and the ashing chamber 2 are connected to this vacuum transfer chamber. They are connected via a chamber 8. A robot arm 5 is installed inside the vacuum transfer chamber 8 to transfer the wafer 3 from the ion implantation chamber 1 to the ashing chamber 2 .

The ashing chamber 2 has a wafer stage 9
This is a chamber for decomposing photoresist by supplying, for example, ozone activated by ultraviolet rays to the surface of the wafer 3 placed thereon, and although not shown, there are an ultraviolet lamp,
UV monitors, ozone monitors, etc. are installed.

A vacuum unload lock chamber 10 equipped with a robot arm 5 is installed downstream of the ashing chamber 2, and the wafer 3 that has been ashed is transferred from the ashing chamber 2 to the next vacuum stage by the robot arm 5. The wafers are transported one by one to the unload lock chamber 10 and then to the wafer cassette 7.

Each of the above vacuum load lock chamber 6, ion implantation chamber 1, vacuum transfer chamber 8, ashing chamber 2, and vacuum unload lock chamber 10 is provided with a gate valve 11 for maintaining airtightness inside the chamber. is provided.

To perform ion implantation and ashing using the above manufacturing apparatus, first, the wafer 3 housed in the wafer cassette 7 is transferred to the vacuum load lock chamber 6 via the robot arm 5, and then to the ion implantation chamber 1. After sequentially transporting the wafer 3 and positioning it on the wafer stage 4 of the ion implantation chamber 1, a predetermined amount of impurity ions such as arsenic are implanted into the surface of the wafer 3 using a predetermined current.

As shown in FIG. 2, on the surface of the wafer 3,
A photoresist mask 13 having an opening is formed on the active region surrounded by the element isolation film 12, and the impurity ions such as arsenic are implanted into the surface of the substrate through this opening.

The wafer 3 on which ion implantation has been completed is transferred to the vacuum transfer chamber 8 via the robot arm 5. The pressure inside the vacuum transfer chamber 8 is reduced to 1000 Pa (Pascal) or lower in advance, and at the same time as the wafer 3 is carried in, an inert gas is introduced into the chamber, and the pressure inside the chamber is returned to atmospheric pressure. The inert gas has a dew point of -40, for example.
Consisting of dry nitrogen gas or dry argon gas at ℃ or below.

Next, the wafer 3 is transferred from the vacuum transfer chamber 8 to the ashing chamber 2 via the robot arm 5.
After positioning on a wafer stage 9 heated to about 50 to 300° C., ozone activated by ultraviolet light is supplied to the surface of the wafer 3 to decompose and remove unnecessary photoresist.

After ashing, the wafer 3 is transferred to a vacuum unload lock chamber 8 into which air at a pressure equal to atmospheric pressure has been introduced, and then transferred to a wafer cassette 7.
After being stored in the wafer, the wafer is transported to the next process, a wafer cleaning process.

As described above, according to this embodiment, when the wafer 3 in the ion implantation chamber 1 is transferred to the ashing chamber 2 through the vacuum transfer chamber 8, the atmosphere in the vacuum transfer chamber 8 is changed to a dry inert gas atmosphere. This makes it possible to prevent moisture and oxygen from adhering to the surface of the photoresist during transportation. This makes it possible to prevent the formation of a hardened layer on the surface of the photoresist, thereby improving the throughput of the ashing process.

Furthermore, since the ion implantation chamber 1 and the ashing chamber 2 are connected via the vacuum transfer chamber 8, and ion implantation and subsequent ashing are performed consistently within the apparatus, arsenic etc. attached to the wafer during ion implantation can be removed. It is possible to prevent harmful substances from leaking out of the device during transportation.

[0027] Above, the invention made by the present inventor has been specifically explained based on examples, but the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Needless to say.

For example, ashing of the photoresist may be performed by a plasma ashing method using oxygen or ozone. In this case, the atmospheric pressure inside the vacuum transfer chamber 8 is set to 100
By transporting the wafer 3 from the ion implantation chamber 1 to the ashing chamber 2 while maintaining the pressure at 0 Pa or lower,
It is possible to prevent moisture and oxygen from adhering to the surface of the photoresist during transportation.

Further, as shown in FIG. 2, the ashing chamber 2
A wafer cleaning chamber 15 equipped with a wafer cleaning stage 14 is disposed at the rear stage, and the ashing chamber 2 and the wafer cleaning are connected via a second transfer chamber 16 that can create a vacuum or non-oxidizing dry gas atmosphere inside. The chamber 15 may also be connected. In this case, ion implantation, ashing, and wafer wet cleaning can all be performed in the same device, so harmful substances such as arsenic attached to the wafer during ion implantation can be prevented from leaking out of the device during transportation. This can be prevented more reliably.

[0030]

[Effects of the Invention] Among the inventions disclosed in this application, the effects obtained by the typical inventions will be briefly explained as follows.
It is as follows.

After ion-implanting impurities into the wafer using the photoresist as a mask, when the wafer is transported to the ashing process, the atmosphere in the transport system is set to a vacuum or a non-oxidizing dry gas atmosphere, so that the photoresist can be ion-implanted into the wafer. Since the formation of a hardened layer on the surface of the ashing process can be prevented, the throughput of the ashing process can be improved.

Furthermore, harmful substances such as arsenic attached to the wafer during ion implantation can be prevented from leaking out of the apparatus.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the overall configuration of a semiconductor manufacturing apparatus that is an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing a main part of a semiconductor wafer during ion implantation.

FIG. 3 is a diagram showing the overall configuration of a semiconductor manufacturing apparatus according to another embodiment of the present invention.

[Explanation of symbols]

1 Ion implantation chamber 2 Ashing room 3 Semiconductor wafer 4 Wafer stage 5 Robot arm 6 Vacuum load lock chamber 7 Wafer cassette 8 Vacuum transfer chamber 9 Wafer stage 10 Vacuum unload lock chamber 11 Gate valve 12 Element isolation film 13 Photoresist mask 14 Wafer cleaning stage 15 Wafer cleaning room 16 Transfer room

Claims (6)

[Claims] 1. A semiconductor integrated circuit device comprising the step of implanting impurity ions into a predetermined region of the semiconductor wafer using a photoresist deposited on a semiconductor wafer as a mask, and then removing the photoresist by ashing. 1. A method for manufacturing a semiconductor integrated circuit device, wherein the semiconductor wafer is transferred from the ion implantation step to the ashing step in a vacuum or in a non-oxidizing dry gas atmosphere. 2. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the semiconductor wafer is transported in a non-oxidizing dry gas atmosphere with a dew point of -40° C. or lower. 3. Claim 1, wherein the semiconductor wafer is transported in a vacuum of 1000 Pa or less.
A method of manufacturing the semiconductor integrated circuit device described above. 4. The semiconductor wafer is transferred from the ashing process to the wafer cleaning process in a vacuum or in a non-oxidizing dry gas atmosphere.
A method of manufacturing the semiconductor integrated circuit device described above. 5. An ion implantation chamber for implanting impurity ions into the surface of a semiconductor wafer, and an ashing chamber for removing photoresist deposited on the surface of the semiconductor wafer, the interior of which is equipped with a vacuum or non-oxidizing dry gas. A manufacturing apparatus for a semiconductor integrated circuit device, characterized in that the ion implantation chamber and the ashing chamber are connected via a transfer chamber capable of forming an atmosphere. 6. A wafer cleaning chamber for wet cleaning the surface of the semiconductor wafer is installed downstream of the ashing chamber, and the wafer cleaning chamber is provided with a second transfer chamber capable of forming a vacuum or non-oxidizing dry gas atmosphere inside. 6. The semiconductor integrated circuit device manufacturing apparatus according to claim 5, wherein the ashing chamber and the wafer cleaning chamber are connected.