JPH04276793A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To reduce uneven display of crosstalk by improving a voltage pulse waveform which drives a multiplex-driven matrix type liquid crystal display cell. CONSTITUTION:A scan electrode driving part 20 which outputs a common pulse voltage and a signal electrode driving part 30 which outputs a segment pulse voltage are connected to a liquid crystal display cell 10 in which a picture element is formed by locating liquid crystal between scan electrode groups X1, X2, X3,... and signal electrode groups Y1, Y2, Y3,... by confronting and crossing with each other. Pulses of ON-level and OFF-level are applied to the electrode groups by a driving means. Segment pulse voltage output is set at a period selection potential level shorter than a selection period at every selection period, and residual periods are set at non-selection potential levels.

Description

[Detailed description of the invention]

[Purpose of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplex-driven matrix type liquid crystal display device.

0002

2. Description of the Related Art Liquid crystal display devices have the advantages of being thin, lightweight, and low power consumption. Taking advantage of this advantage, matrix type liquid crystal display devices are often used in personal word processors and computer display units. This matrix type liquid crystal display device has a signal electrode group and a scanning electrode group in which a large number of strips made of a transparent conductor such as indium tin oxide are arranged in parallel on the opposing inner surfaces of two transparent glass substrates.
The electrodes are arranged so as to intersect with each other at intervals, and a liquid crystal is positioned between these cells to form a cell.By applying a pulse voltage of a selection potential or a non-selection potential to these electrodes in a line sequential manner, the liquid crystal display surface can be changed. It forms an image on the image.

[0003] Since applying a DC voltage to a liquid crystal causes the liquid crystal to decompose and deteriorate, the liquid crystal cell is driven using an AC voltage waveform.
In practice, a frame inversion method is used in which the polarity of the drive voltage is inverted every frame. For example, FIG. 6 forms a normally closed matrix screen of 9×9 dots. In the figure, in order to turn off the pixel at the intersection of the signal electrode X3 and the scanning electrode Y3, the OFF state is required only when the signal electrode , and must remain in the ON state under other conditions. Therefore, as shown in FIG. 5, a voltage waveform that turns off the pixels X3-Y3 is applied to the scanning electrode and the signal electrode. Here, (a) is a common pulse voltage output waveform output from the scanning electrode drive means, (b) is a segment pulse voltage output waveform output from the signal electrode drive means, and (c) is a composite waveform of these.

[0004] When one frame period ends and the next frame period begins, the polarities of both the common pulse and the segment pulse are reversed.

[0005] In this type of driving, it is possible to increase the voltage level difference between the OFF state and the ON state, so a display with less crosstalk can be obtained for multi-digit display by multiplex driving, but in reality, Depending on the display pattern, this crosstalk may not be completely eliminated, making the display difficult to see.

For example, in FIG. 6, the signal electrode X3 and the scanning electrode Y
3 to Y7, pixels at the intersection of scanning electrode Y7 and signal electrodes X4 to X7, etc. If the pixel P1 in the darkly shaded area in the diagram is displayed as OFF state and the others as ON state, the ON state is displayed. In the pixel P2, which should be the same, crosstalk of different degrees occurs between the scanning electrode and the signal electrode in a pattern as shown by the hatched area. Such display unevenness is thought to be caused by the electrical resistance of the electrode strips of the liquid crystal display cell, the capacitance of the liquid crystal, the anisotropy of the dielectric constant of the liquid crystal, and the frequency characteristics.

For example, FIG. 7 shows the state of liquid crystal molecules LM sandwiched between the upper and lower electrodes E1 and E2 in an ON state and an OFF state. Liquid crystal molecules have dielectric constant anisotropy in directions parallel and perpendicular to the molecular axis. εa and εb shown in the figure,
These have a relationship of εa > εb. This anisotropy causes the liquid crystal molecules to respond to the electric field of the applied voltage. Therefore, in the ON state with high voltage, the axis with a large dielectric constant (εa)
follows the electric field of the applied voltage, and the capacitance between the cells increases.

On the other hand, in the OFF state, the axis (εb) is aligned with the electric field of the applied voltage, and the capacitance between the cells becomes small.

At this time, the voltage waveform applied from the electrodes of the matrix to the liquid crystal varies in degree of waveform rounding due to the difference in capacitance load between cells depending on the ratio of ON pixels to OFF pixels on the same electrode.

In FIG. 7, when a square wave is applied between electrodes E1 and E2, as shown by the broken line in the same figure,
The waveform rounding r becomes larger when the voltage is applied to an ON pixel having a larger capacitance than an OFF pixel. Therefore, the rate at which the effective value of the voltage actually applied to the liquid crystal decreases relative to the effective value of the power supply voltage that should originally be applied is greater than for OFF pixels. Furthermore, regarding the signal electrode direction, in addition to the above, if there are many repeated ON and OFF displays on the same electrode, waveform distortion as described above is added each time the polarity is reversed. The voltage applied to the signal electrode is lower than that of a signal electrode with a small amount of noise, which also causes crosstalk.

[0011]

As described above, multiplex driving has the disadvantage that display unevenness such as crosstalk depending on the display pattern occurs, making the display difficult to see.

The present invention aims to improve such disadvantages and provide a liquid crystal display device capable of displaying good images with less display unevenness.

[Configuration of the invention]

[0014]

[Means for Solving the Problems] The present invention arranges a scanning electrode group and a signal electrode group, each formed in a plurality of parallel lines, facing each other at intervals, and positions a liquid crystal at least at the intersection of these electrodes to form a pixel. A liquid crystal display cell formed by forming a
scanning electrode driving means connected to the scanning electrode group and outputting a common pulse voltage for periodically driving the scanning electrode group; and a signal connected to the signal electrode group and outputting a segment pulse voltage for driving the signal electrode group. In a liquid crystal display device comprising an electrode driving means, a means for periodically inverting the polarity of the pulse voltage between a positive polarity and an inverted polarity, and a means for applying a selection potential and a non-selection potential to the pulse voltage, the segment pulse voltage The output waveform has four potentials: a selection potential and a non-selection potential when the polarity is positive, and a selection potential and a non-selection potential when the polarity is inverted. A liquid crystal display device characterized in that the liquid crystal display device comprises means for always setting a selection potential for a period shorter than the same period within the selection period and a non-selection potential for the remaining period.

Furthermore, means is added for pulse width modulating the period of the selected potential and non-selected potential of the segment pulse voltage output.

[0016]

[Operation] In multiplex driving using the normal voltage averaging method, as in the prior art described above, crosstalk occurs because the number of polarity inversions varies depending on the display pattern, especially in the direction of the signal electrodes.

To solve this problem, the number of polarity inversions of the drive output waveform should be made the same regardless of the display pattern. The present invention focuses on this point, and when performing an ON display, the segment pulse voltage is set to the OFF level for a certain period within the selection period, and is set to the ON level for the remaining period within the same period.
Conversely, even when performing an OFF display, the segment pulse voltage was kept at the ON level for a certain period within the selection period.

Hereinafter, the operation of the present invention will be explained with reference to FIG.
This will be explained in comparison with the conventional waveform shown in .

(a) is a common pulse voltage output output from the scan electrode driver and supplied to the scan electrode, for example, the electrode Y3 of the 9×9 dot liquid crystal display cell shown in FIG. 6, and (b) is the common pulse voltage output from the signal electrode. Output from the drive unit and electrode X3 in Figure 6
is the segment pulse voltage output fed to (c
) is the composite waveform.

As shown in (b), the segment pulse is OFF-ON-OFF-ON-ON-O for each selection period t.
A signal is given at a level of N-OFF-OFF-OFF-OFF. In each selection period t, an ON level period dn and an OFF level period df, which are shorter than this period, are arranged, and the same level is distributed so that the same level does not continue over two or more selection periods.

[0021] That is, the ON level and OF
There is an F level potential, and an OFF signal has a long OFF level period, and an ON signal has a long ON level period.

[0022] Thus, no matter how ON and OFF indications appear continuously or alternately on the signal electrode according to the display pattern, the number of polarity inversions is always approximately the same, and as a result, crosstalk can be reduced. .

Specifically, the segment pulse voltage output consisting of ON-OFF levels is formed as follows.

In FIG. 3, the common pulse (a) has V0 and V4 during the positive frame period, and V5 and V4 during the inverted frame period. On the other hand, the segment pulse (b) has a selection potential V5 and a non-selection potential V3 during the positive frame period, and a selection potential V0 during the inversion frame period.
and a non-selection potential V2.

In the conventional device, these potentials are constant during one selection period as shown in FIG.
As shown in FIG. 3(b), in each selection period, the segment pulse voltage has a selection potential and a non-selection potential.

[0026] Such a segment pulse voltage waveform is
As shown in FIG. 4, it is created by a latch pulse LP having an interval of one selection period t and a clock pulse CP that generates, for example, 160 pulses during this period. If switching pulses are generated at the 10th and 150th clock pulses counting from one latch pulse and the potential is switched every selection period, the selection potential Vv0 in the positive frame period will be the first 150 clock periods. potential V
0 and a potential V2 of 10 clock periods.

Similarly, the non-selection potential Vv2 in the positive frame period
is the potential V0 of the first 10 clock periods and the remaining 150
It has a potential V2 during the clock period.

Furthermore, during the inversion frame period, the selection potential V
v5 consists of the potential V5 for the first 150 clock periods and the potential V3 for the remaining 10 clock periods. The non-selection potential Vv3 is the potential V5 of the first 10 clock periods,
The potential is V3 for the remaining 150 clock periods. An arbitrary display pattern can be obtained by supplying power to the signal electrodes by a signal electrode driving section according to an input signal.

Furthermore, by applying the pulse width modulation method, an intermediate state is created by appropriately adjusting the ratio of the selected potential to the non-selected potential within one selection period, that is, the time ratio of the ON level to the OFF level. It can be performed.

[0030]

Embodiment 1 FIG. 1 shows an embodiment of the present invention, in which a liquid crystal display cell 10 includes a scanning electrode drive section 20, a signal electrode drive section 30, a control section 40, and a drive voltage generation circuit 50. It is connected.

The liquid crystal display cell 10 has an electrode group in which many thin strips of a transparent conductor made of indium tin oxide are arranged in parallel on the opposing surfaces of two glass substrates. The substrates are combined to form a matrix with the substrates orthogonal to each other, and liquid crystal is sealed between them. The electrode group extending horizontally is the scanning electrode group Y.
1, Y2, Y3, . . . The electrode groups extending in the vertical direction are signal electrode groups X1, X2, X3, . . . , and a pixel is formed at the intersection thereof.

When each pixel or number of dots on the cell substrate is, for example, 640×400 dots, the number of electrodes in the scanning electrode group is 400, the number of electrodes in the signal electrode group is 640, and each electrode is individually connected to the feeding end. are connected to the scan electrode drive unit 20 or the signal electrode drive unit 30. Note that for ease of connection, the scan electrode drive unit 20 and the signal electrode drive unit 30
In some cases, each electrode is divided into two parts on both sides of the cell and connected to every other electrode alternately as a power supply end and an open end.

The control unit 40 is composed of a shift register, a latch circuit, a polarity reversing circuit, etc., and generates a common pulse voltage from the scan electrode drive unit 20 to drive the scan electrodes at a constant cycle, and converts the input signal into serial-parallel signals. signal electrode drive section 3
A segment pulse voltage is output from 0 to drive the signal electrode.

The drive voltage generation circuit 50 is a multiple power source that generates and supplies various voltages to each electrode according to the switching of the electrode drive section, that is, voltages of a common pulse voltage and a segment pulse voltage, selected potentials and non-selected potentials. It is controlled by the control section 40 and connected to the scan electrode drive section 20 and the signal electrode drive section 30.

That is, the circuit 50 generates a voltage for common pulses, and also includes a power supply switching signal generation circuit 51 and a switch circuit 52 for segment pulses. The power supply switching signal generation circuit 51 is composed of a counter and a ROM, and the control section 40
A switching signal SP (combined pulse of high level H and low level L) is generated while timing is set using the latch pulse LP and clock pulse CP from the switch circuit 52, and the switch circuit 52 is operated to output the necessary potential. The switch circuit 52 consists of a first circuit 53 and a second circuit 54, and the first circuit 53 selects the selection potential Vv of the segment pulse voltage in the positive frame period.
0 and the non-selection potential Vv2, and the second circuit 54 outputs the selection potential Vv5 and the non-selection potential Vv3 during the inversion frame period.

As described above, the selection potentials Vv0 and Vv5
, non-selection potentials Vv2 and Vv3 both have a selection potential level for a period shorter than this period and a non-selection potential level for the remaining period within one selection period, and depending on the ratio of this period, it is selected or not selected. is determined.

This ratio is controlled by a timing switch determined by a latch pulse with a period corresponding to one selection period and a count of 160 clock pulses between one latch pulse.

That is, each time output for one pixel corresponding to one selection period is performed, the predetermined time period of the first half of the segment pulse voltage output waveform, in this case, one selection period t is 160
In the case of clock pulses, Vv0 and Vv5 are configured with an ON level for 150 clock periods and an OFF level for 10 clock periods, and Vv2 and Vv3 are configured with ON levels for 10 clock periods according to the ROM data corresponding to the count number.
It consists of a level and an OFF level of 150 clock periods.

[0039] In this example, A4 size, 640 x 400
A dot super twist type liquid crystal display cell was driven by connecting a scanning electrode drive section (T9822 manufactured by Toshiba) and a signal electrode drive section (T9821 manufactured by Toshiba) using the TAB method.

[0040] Duty ratio 1/200, bias ratio 1/
13. Frame frequency 70Hz, V0 - V5 is approximately 2
Various patterns were displayed at 2V, and good display with almost no crosstalk was obtained in all the patterns.

In this case, with the conventional drive waveform shown in FIG. 3, various levels of crosstalk occur depending on the display pattern, resulting in a display that is difficult to see.

(Example 2) Seiko Epson driver IC (SED170) was used in the scanning electrode drive section in Example 1.
3) Seiko Epson driver I in the signal electrode drive section
A liquid crystal display element was driven by the TAB method using C (SED1766). This driver IC can perform pulse width modulation using a clock pulse for grayscale control, and among the grayscale levels that can be output, the 0th grayscale (the segment pulse voltage is always composed of only the OFF level during one latch) and the 1st
5th gradation (segment pulse voltage between 1 latch is always O)
(consisting of only N levels), the first gradation is OF
The drive waveform of the present invention was realized by using F and using the 14th gradation as ON.

Further, it was driven with a duty of 1/200, a bias of 1/15, and a frame frequency of 70 Hz.

When various patterns of binary display were displayed using the liquid crystal display device having this configuration, good display with almost no strokes was obtained in any pattern. Furthermore, when an 8-gradation display was performed using an intermediate state between ON and OFF by pulse width modulation, a good display was also obtained, and all 8 gradations could be distinguished.

In the above embodiment, a one-frame inversion method has been described, but the present invention can also be applied to devices using other driving methods such as N-line inversion, which inverts in a period shorter than this period. It should be noted that the present invention is not limited to the super-twist type cell described in the embodiment, but can be applied to all liquid crystal display cells that perform multiplex driving, such as simple matrix type liquid crystal display devices in other modes and two-terminal type active matrix type liquid crystal display devices. Not even.

[0046]

As described above, according to the present invention, a good display with very little crosstalk can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram illustrating the drive voltage generation circuit of the embodiment of FIG. 1;

FIG. 3 is a waveform diagram illustrating the present invention.

FIG. 4 is a waveform diagram illustrating the present invention.

FIG. 5 is a waveform diagram illustrating the prior art.

FIG. 6 is a plan view illustrating a liquid crystal display screen.

FIG. 7 is a schematic diagram illustrating dielectric anisotropy and waveform rounding of liquid crystal molecules.

[Explanation of symbols]

10...Liquid crystal display cell X1, X2, X3...Scanning electrode group Y1, Y2, Y3...Signal electrode group 20...Scanning electrode drive section 30...Signal electrode drive section 40...Control unit 50... Drive voltage generation circuit

Claims (2)

[Claims] 1. A liquid crystal display cell in which a scanning electrode group and a signal electrode group, each formed in a plurality of parallel lines, are arranged facing each other at intervals, and a liquid crystal is positioned at least at the intersection of these electrodes to form a pixel. a scanning electrode driving means connected to the scanning electrode group and outputting a common pulse voltage for periodically driving the scanning electrode group; and a scanning electrode driving means connected to the signal electrode group and outputting a segment pulse voltage for driving the signal electrode group. In the liquid crystal display device, the liquid crystal display device has a signal electrode driving means for driving the segment, a means for periodically inverting the polarity of the pulse voltage between a positive polarity and an inverted polarity, and a means for applying a selection potential and a non-selection potential to the pulse voltage. The waveform of the pulse voltage output takes four types of potentials: two potentials, a selection potential and a non-selection potential at the time of positive polarity, and two potentials, a selection potential and a non-selection potential at the time of inversion polarity, and one corresponding to one selection period. A liquid crystal display device characterized by comprising means for setting a pixel so that the selection potential always consists of a selection potential for a period shorter than the same period within the selection period and a non-selection potential for the remaining period.
2. The liquid crystal display device according to claim 1, further comprising means for pulse width modulating a period of a selected potential and a non-selected potential of the segment pulse voltage output.