JPH04273439A - Formation of layer insulation film for semiconductor device - Google Patents

Abstract

PURPOSE:To uniformly form a film by continually changing the degree of vacuum in the chamber of a CVD device so as to successively lower the degree when forming the metal wiring layer insulation film for the semiconductor device using the plasma CVD device. CONSTITUTION:The degree of vacuum in a chamber 11 is changed from 0.35 Torr to 0.85 Torr at 6.8X10<-4> Torr/sec by the control instruction from a vacuum degree setting machine 19, and a 0.6mum layer insulation film 3 is formed on bottom layer Al wiring 2. The layer insulation film 3 is coated with photoresist 4 to be patterned, BHF etching and resistor peeling are performed, and 1.0mum top layer Al wiring 7 is formed on the layer insulation film 3 by sputtering as a contact. The thickness of the top layer Al wiring 7 on the side wall of a through hole 6 is 0.8mum, which is not much thinner than a target of 1.0mum.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming an interlayer insulating film for a semiconductor device.

0002

2. Description of the Related Art Conventionally, an interlayer insulating film of a semiconductor device is generally formed using an atmospheric pressure CVD method or a low pressure CVD method to form an insulating film having uniform film quality in the depth direction. FIGS. 2A to 2F show the process of forming a conventional interlayer insulating film. In the figure, 1 is a semiconductor substrate, 2 is a lower layer Al wiring formed on the semiconductor substrate 1, and 3 is a semiconductor substrate.
4 is an interlayer insulating film laminated on the lower Al wiring 2, and 4 is a photoresist coated on the interlayer insulating film 3. 5 is a resist hole opening formed by transferring a mask pattern to this photoresist 4 by photolithography, and 6 is an isotropic process using a wet method by masking the resist pattern in which the resist hole opening 5 is formed. A through hole 7 is formed by etching the interlayer insulating film 3 laminated on the semiconductor substrate 1 by chemical etching, and is an upper layer Al wiring that forms a circuit with the lower layer Al wiring 2.

[0003] To explain the process of forming the through hole 6, first, as shown in FIG.
An interlayer insulating film 3 is formed on the wiring 2. To explain in a little more detail the order in which this interlayer insulating film 3 is formed using the plasma CVD method, as shown in FIG.
The semiconductor substrate 1 on which the lower layer Al wiring 2 is laminated is placed on the heating body 12 provided in the chamber 11 of the apparatus 10, and is evacuated from the exhaust port 13 with the vacuum pump 14 to 0.3 To
Maintain a vacuum level of about rr. On the other hand, raw material gases such as SiH4 and N2O supplied from the gas supply port 15 are R
They are converted into chemically active species by plasma discharge from the excitation electrode 17 connected to the F power source 16, and an interlayer insulating film 3 of SiO2 is formed on the lower layer Al wiring 2 of the semiconductor substrate 1. Note that the heating temperature of the semiconductor substrate 1 at this time by the heating body 12 is maintained at approximately 300°C. Finally, the pressure inside the chamber 11 is returned to normal pressure to complete the film formation.

Subsequently, as shown in FIG. 2(b), a photoresist 4 is applied on the interlayer insulating film 3, and then a mask pattern for forming through holes 6 is transferred to the photoresist 4 by photolithography. A resist hole opening 5 is formed (FIG. 2(c)). The resist pattern in which the resist hole opening 5 is formed is masked, and the semiconductor substrate 1 is etched by wet isotropic etching.
The interlayer insulating film 3 laminated on top is etched, as shown in FIG. 2(d).
) A through hole 6 is formed as shown in FIG. next,
Remove the resist pattern as shown in Figure 2(e),
By forming the upper layer Al wiring 7 as shown in FIG. 2(f), contacts between the lower and upper layer Al wirings 2 and 7 are obtained.

[0005]

[Problems to be Solved by the Invention] However, in the conventional film forming method as described above, since the film quality is constant in the depth direction, the interlayer insulating film is 3 is etched in a tapered shape as shown in the portion 8 shown in FIG.
The thickness of the through hole 6 formed in the side wall portion of the through hole 6 becomes thinner, which may cause an increase in contact resistance, a contact failure, or even a disconnection.

By the way, Japanese Patent Application Laid-Open No. 63-34928 discloses a method for forming through holes, but the content is that the etching rate is higher than that of the underlying insulating film on the wiring metal formed on the semiconductor substrate. In this method, a plurality of layers of insulating films are formed with an insulating film having a high rate of conductivity as the upper layer, a resist pattern is formed on the insulating film, and then tapered through holes are formed by etching. However, even with this method, a step is created at the boundary between the interlayer insulating film and the insulating film with a high etching rate, and a smooth tapered shape is not obtained. Since there is a problem that the thickness is not uniform, it cannot be a fundamental solution.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming an interlayer insulating film of a semiconductor device, which is designed to solve the above problems.

[0008]

[Means for Solving the Problems] The present invention provides plasma CV
A semiconductor device characterized in that when forming an interlayer insulating film for metal wiring in a semiconductor device using the D device, the film is formed while continuously changing the degree of vacuum in the chamber of the CVD device so as to gradually lower the degree of vacuum. This is a method for forming an interlayer insulating film.

[0009]

[Function] As a result of extensive research and experiments regarding the above-mentioned problems, the present inventor has found that when forming an interlayer insulating film using the plasma CVD method, the quality of the film changes by changing the degree of vacuum in the chamber. Furthermore, they discovered that the etching rate changes depending on the film quality, leading to the completion of the present invention.

That is, according to the present invention, plasma CV
By controlling the degree of vacuum in the chamber of D equipment so that it gradually decreases from a predetermined value and changing the film quality in the vertical direction, the etching rate of the interlayer insulating film is slowed at the bottom in the vertical direction and becomes faster toward the top. As a result, the shape of the side wall portion of the through hole can be made into a smooth tapered shape, and therefore, it is possible to make the film thickness of the upper layer Al wiring substantially uniform. In addition, the upper limit value of the degree of vacuum to be changed is preferably in the range of 0.33 to 0.37 Torr, and the lower limit value is preferably in the range of 0.83 to 0.87 Torr.
r is desirable. The reason for this is that if the degree of vacuum is higher than the upper limit, abnormal discharge will occur within the electrode, making it difficult to form a uniform film, and if the degree of vacuum is lower than the lower limit, the deposition rate will be lower and the throughput will be reduced. This is because it becomes worse.

[0011]

[Embodiment] An embodiment of the present invention will be described below with reference to FIG. As shown in the figure, the plasma CVD apparatus 10 of the present invention is provided with a vacuum degree control device 18 that measures the degree of vacuum inside the chamber 11 and controls the vacuum pump 14. A program is set to continuously increase the degree of vacuum.

Therefore, the vacuum level controller 18 uses the vacuum level setting device 19 to set the vacuum level in the chamber 11 to 0.35To.
rr to 0.85Torr 6.8×10-4To
A control instruction is given to change the temperature at a rate of rr/sec, and as shown in Figure 2(a) above,
An interlayer insulating film 3 of 0.6 μm was formed. The film forming time at that time was about 740 seconds, and the heating temperature was 300 seconds.
℃. Then, on top of that, the above-mentioned figures 2(b) to (f
), a photoresist 4 was applied and patterned, and after BHF etching and peeling off the resist, a contact portion was formed on the interlayer insulating film 3 by sputtering an upper layer Al wiring 7 of 1.0 μm. At this time, the film thickness of the upper layer Al wiring 7 on the side wall of the through hole 6 was 0.8 .mu.m, which was hardly thinner than the target of 1.0 .mu.m. This semiconductor element was subjected to PCT for 240 hours at a temperature of 121 °C and a humidity of 100%.
The test yield was 100%. In addition, when an interlayer insulating film was formed using a conventional example with a constant vacuum level of 0.3 Torr, the film thickness of the upper layer Al wiring 7 on the side wall portion of the through hole 6 was as thin as 0.2 μm, and P
The yield in the CT test was 20%, which was lower than that of the inventive examples.

[0013]

As explained above, according to the present invention, since the film quality of the interlayer insulating film can be changed in the vertical direction, a smooth tapered shape can be formed on the side wall portion of the through hole. This makes it possible to form the upper layer Al wiring with a substantially uniform thickness, which greatly contributes to improving the yield of semiconductor devices.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram schematically showing an embodiment of the present invention.

FIG. 2 is an explanatory diagram showing the process of forming a conventional interlayer insulating film.

FIG. 3 is a schematic diagram of a conventional plasma CVD apparatus.

FIG. 4 is a cross-sectional view showing a conventional example of a semiconductor device.

[Explanation of symbols]

1 Semiconductor substrate 2 Lower layer Al wiring 3 Interlayer insulation film 4 Photoresist 6 Through hole 7 Upper layer Al wiring 10 Plasma CVD equipment 11 Chamber 14 Vacuum pump 16 RF power supply 17 Excitation electrode 18 Vacuum degree control device 19 Vacuum degree setting device

Claims (1)

[Claims] 1. When forming an interlayer insulating film for metal wiring in a semiconductor device using a plasma CVD apparatus, the film is formed while continuously changing the degree of vacuum in a chamber of the CVD apparatus so as to gradually lower the degree of vacuum. A method for forming an interlayer insulating film for a semiconductor device, characterized by: