JPH04273416A - Capacitor - Google Patents

Capacitor

Info

Publication number
JPH04273416A
JPH04273416A JP3429291A JP3429291A JPH04273416A JP H04273416 A JPH04273416 A JP H04273416A JP 3429291 A JP3429291 A JP 3429291A JP 3429291 A JP3429291 A JP 3429291A JP H04273416 A JPH04273416 A JP H04273416A
Authority
JP
Japan
Prior art keywords
capacitor
internal electrode
low
electrode layers
conductive material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3429291A
Other languages
Japanese (ja)
Other versions
JPH0828305B2 (en
Inventor
Hideki Kabasawa
樺澤 英樹
Kazuharu Onigata
鬼形 和治
Minoru Oshio
大塩 稔
Shoichi Tosaka
正一 登坂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP3034292A priority Critical patent/JPH0828305B2/en
Publication of JPH04273416A publication Critical patent/JPH04273416A/en
Publication of JPH0828305B2 publication Critical patent/JPH0828305B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To provide a capacitor which can eliminate both a pulsive noise and a change in a low-frequency voltage. CONSTITUTION:The following are installed: first counter electrodes (internal electrode layers 11a, 11b) composed of a conductive material whose resistivity is low; and second counter electrodes (internal electrode layers 12a, 12b) composed of a conductive material whose resistivity is high. Thereby, a pulse-shaped noise is removed by a capacitor constituted of the first counter electrodes and a change in a low-frequency voltage is removed by a capacitor constituted of the second counter electrodes. A mounting area used to arrange the capacitor can be made narrow as compared with that in conventional cases, and an apparatus can be made small-sized.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、異なる比抵抗の対向電
極を有するコンデンサに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor having opposing electrodes of different resistivities.

【0002】0002

【従来の技術】従来、IC及びオペアンプ等を用いた電
子回路においては、電源の電圧変動及び電源ラインに重
畳するノイズによって、電子回路の誤動作を招くことが
多々ある。このため、図2に示すように電子回路1の電
源ライン2と接地導体との間に、例えばアルミ又はタン
タル電解コンデンサ3及びセラミックコンデンサ4等を
並列に接続して、電圧変動及びノイズを除去している。
2. Description of the Related Art Conventionally, in electronic circuits using ICs, operational amplifiers, etc., malfunctions of the electronic circuits are often caused by fluctuations in power supply voltage and noise superimposed on power supply lines. Therefore, as shown in Figure 2, for example, an aluminum or tantalum electrolytic capacitor 3 and a ceramic capacitor 4 are connected in parallel between the power line 2 of the electronic circuit 1 and the ground conductor to eliminate voltage fluctuations and noise. ing.

【0003】図3は電源ライン2と接地導体との間にコ
ンデンサ5を接続したときの等価回路を示す図である。 図において、Rはコンデンサ5の等価直列抵抗(ESR
)、Lはコンデンサの等価直列インダクタンス(ESL
)、Cはコンデンサ5のキャパシタンス、L´は電源ラ
イン2の等価インダクタンスである。即ち、コンデンサ
5のリ−ド線及び電極の抵抗分により等価直列抵抗Rが
生じ、リ−ド線のインダクタンス分により等価直列イン
ダクタンスLが生じる。このため、電源ライン2と接地
導体との間に公知のRLC直列回路が形成される。
FIG. 3 is a diagram showing an equivalent circuit when a capacitor 5 is connected between the power supply line 2 and the ground conductor. In the figure, R is the equivalent series resistance (ESR
), L is the equivalent series inductance of the capacitor (ESL
), C is the capacitance of the capacitor 5, and L' is the equivalent inductance of the power supply line 2. That is, an equivalent series resistance R is generated by the resistance of the lead wire and electrode of the capacitor 5, and an equivalent series inductance L is generated by the inductance of the lead wire. Therefore, a known RLC series circuit is formed between the power supply line 2 and the ground conductor.

【0004】電子回路1内のOPアンプ、IC等による
高周波の方形波出力に伴い、電源ライン2に重畳するパ
ルス状の電圧変動(以下、パルス状のノイズと言う)を
除去するには、等価直列抵抗R及び等価直列インダクタ
ンスLが小さいコンデンサ5を接続する必要がある。こ
のため、他種のものに比べて電極の比抵抗の小さいセラ
ミックコンデンサ4が用いられている。
[0004] In order to remove pulse-like voltage fluctuations (hereinafter referred to as pulse-like noise) superimposed on the power supply line 2 due to the high-frequency square wave output from the OP amplifier, IC, etc. in the electronic circuit 1, an equivalent It is necessary to connect a capacitor 5 with a small series resistance R and equivalent series inductance L. For this reason, ceramic capacitors 4 are used whose electrodes have a lower resistivity than other types of capacitors.

【0005】また、電源回路内のOPアンプ、IC等に
よる低周波の方形波に伴い、電源ライン2に重畳する電
圧変動(以下、低周波の電圧変動と言う)を除去するに
は、等価直列抵抗Rの大きなコンデンサ5を接続する必
要がある。即ち、電源ライン2の電圧が低周波変動した
場合、コンデンサ5によって形成されるRLC直列回路
に電源ライン2の等価インダクタンスL´を加えた回路
が定常状態に至るまでの過渡状態において、(1) 式
に示すように等価直列抵抗Rが小さいときは、電源ライ
ン2の電圧は振動する。例えば電源をオンした場合には
、電源ライン2の電圧は図4の(a) に示すように振
動して定常状態に至る。このため、電子回路1の誤動作
を招きやすい。また、電子回路1内のOPアンプ、IC
等が低周波の方形波を出力した場合には、電源ライン2
の電圧は図4の(b) に示すように振動的に変化し、
安定するまでに時間がかかるので、電子回路1の誤動作
を招きやすい。 R<2・{(L+L´)/C}1/2     …(1
)また、(2) 式に示すように等価直列抵抗が大きい
ときは、電源ライン2の電圧は指数関数的に変化する。 例えば電源をオンした場合には、電源ライン2の電圧は
図5の(a) に示すように指数関数的に定常状態に至
り、電子回路1の誤動作を招くことはない。また、電源
回路内のOPアンプ、IC等が低周波の方形波を出力し
た場合には、電源ライン2の電圧は図5の(b) に示
すように瞬時、指数関数的に変化して安定するので、電
子回路1の誤動作を招くことはない。 R>2・{(L+L´)/C}1/2     …(2
) ◎このため、電源ライン2に重畳した低周波による
電圧の変動を除去するためには、他種のものに比べて電
極の比抵抗の大きなコンデンサ、例えばアルミ又はタン
タル電解コンデンサ3が用いられている。
[0005] Furthermore, in order to remove voltage fluctuations (hereinafter referred to as low-frequency voltage fluctuations) superimposed on the power supply line 2 due to low-frequency square waves caused by OP amplifiers, ICs, etc. in the power supply circuit, equivalent series It is necessary to connect a capacitor 5 with a large resistance R. That is, when the voltage of the power supply line 2 fluctuates at low frequency, in a transient state until the circuit obtained by adding the equivalent inductance L' of the power supply line 2 to the RLC series circuit formed by the capacitor 5 reaches a steady state, (1) As shown in the equation, when the equivalent series resistance R is small, the voltage of the power supply line 2 oscillates. For example, when the power is turned on, the voltage of the power line 2 oscillates as shown in FIG. 4(a) and reaches a steady state. Therefore, malfunction of the electronic circuit 1 is likely to occur. In addition, the OP amplifier and IC in the electronic circuit 1
etc. outputs a low frequency square wave, power line 2
The voltage changes oscillally as shown in Figure 4(b),
Since it takes time to stabilize, the electronic circuit 1 is likely to malfunction. R<2・{(L+L')/C}1/2...(1
) Furthermore, as shown in equation (2), when the equivalent series resistance is large, the voltage of the power supply line 2 changes exponentially. For example, when the power is turned on, the voltage of the power supply line 2 exponentially reaches a steady state as shown in FIG. 5(a), and the electronic circuit 1 does not malfunction. In addition, when an OP amplifier, IC, etc. in the power supply circuit outputs a low-frequency square wave, the voltage of power supply line 2 changes instantaneously and exponentially and becomes stable, as shown in Figure 5(b). Therefore, malfunction of the electronic circuit 1 is not caused. R>2・{(L+L')/C}1/2...(2
) ◎For this reason, in order to eliminate voltage fluctuations due to low frequencies superimposed on the power line 2, a capacitor with electrode resistivity larger than other types, such as an aluminum or tantalum electrolytic capacitor 3, is used. There is.

【0006】従って、パルス状のノイズと低周波変動の
両方を除去するために、例えば電源ライン2と接地導体
との間にセラミックコンデンサ4とアルミ又はタンタル
電解コンデンサ3が並列に接続されている。
Therefore, in order to eliminate both pulse-like noise and low frequency fluctuations, for example, a ceramic capacitor 4 and an aluminum or tantalum electrolytic capacitor 3 are connected in parallel between the power supply line 2 and the ground conductor.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前述し
たようにパルス状のノイズと低周波変動の両方を除去す
るためには、電源ライン2と接地導体との間にセラミッ
クコンデンサ4とアルミ又はタンタル電解コンデンサ3
の2個のコンデンサを並列に接続しなければならないた
め、これらを配置するための広い実装面積が必要となり
装置の小形化の障害となっている。
However, as mentioned above, in order to eliminate both pulse noise and low frequency fluctuations, it is necessary to connect a ceramic capacitor 4 and an aluminum or tantalum electrolytic capacitor between the power supply line 2 and the ground conductor. capacitor 3
Since the two capacitors must be connected in parallel, a large mounting area is required for arranging them, which is an obstacle to miniaturizing the device.

【0008】本発明の目的は上記の問題点に鑑み、パル
ス状のノイズと低周波の電圧変動の両方を除去すること
ができるコンデンサを提供することにある。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a capacitor that can eliminate both pulse-like noise and low-frequency voltage fluctuations.

【0009】[0009]

【課題を解決するための手段】本発明は上記の目的を達
成するために、請求項1では、対向電極と、該対向電極
の間に介在された誘電体とを備えてなるコンデンサにお
いて、低比抵抗の導電材からなる少なくとも一対の第1
の対向電極と、高比抵抗の導電材からなる少なくとも一
対の第2の対向電極とを設けたコンデンサを提案する。
Means for Solving the Problems In order to achieve the above object, the present invention provides a capacitor comprising a counter electrode and a dielectric interposed between the counter electrodes. at least one pair of first conductive materials having a specific resistance;
The present invention proposes a capacitor provided with a counter electrode of 1 and at least a pair of second counter electrodes made of a conductive material with high specific resistance.

【0010】また、請求項2では、請求項1記載のコン
デンサにおいて、前記第1及び第2の対向電極は積層配
置されているコンデンサを提案する。
A second aspect of the present invention proposes a capacitor according to the first aspect, in which the first and second opposing electrodes are arranged in a stacked manner.

【0011】[0011]

【作用】本発明の請求項1によれば、第1の対向電極は
低比抵抗の導電材によって形成され、第2の対向電極は
高比抵抗の導電材によって形成される。これにより、前
記第1の対向電極によって構成されるコンデンサの等価
直列抵抗は小さくなり、また前記第2の対向電極によっ
て構成されるコンデンサの等価直列抵抗は大きくなる。 このコンデンサを電源ラインのノイズ及び電圧変動の除
去に用いた場合、パルス状のノイズは第1の対向電極に
よって構成されるコンデンサによって除去され、低周波
の電圧変動は第2の対向電極によって構成されるコンデ
ンサによって除去される。
According to claim 1 of the present invention, the first counter electrode is made of a conductive material with low specific resistance, and the second counter electrode is made of a conductive material with high specific resistance. As a result, the equivalent series resistance of the capacitor formed by the first opposing electrode becomes small, and the equivalent series resistance of the capacitor formed by the second opposing electrode increases. When this capacitor is used to remove noise and voltage fluctuations in a power supply line, pulse-like noise is removed by the capacitor formed by the first opposing electrode, and low-frequency voltage fluctuations are removed by the second opposing electrode. removed by a capacitor.

【0012】また、請求項2によれば、前記第1及び第
2の対向電極は積層配置される。
According to a second aspect of the present invention, the first and second opposing electrodes are arranged in a stacked manner.

【0013】[0013]

【実施例】図1は本発明の一実施例を示す断面図である
。図において、10はコンデンサ本体(以下、本体と称
する)で、直方体形状を有し、その大きさは例えば3.
2mmx 2.5mm x 2.5mm である。また
、本体10は複数の内部電極層11a,11b,12a
,12bと誘電体層13が積層して形成され、内部電極
層11a,12aは本体10の長手方向一端側に導出さ
れ、内部電極層11b,12bは他端側に導出されてい
る。内部電極層11aと内部電極層11bによって一対
の対抗電極が形成され、内部電極層12aと内部電極層
12bによって一対の対抗電極層が形成される。さらに
、本体10の両端部には、内部電極層11a,11b,
12a,12bに導通する外部電極14が形成され、こ
の外部電極14を介して外部回路と接続できるようにな
っている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view showing an embodiment of the present invention. In the figure, 10 is a capacitor main body (hereinafter referred to as main body), which has a rectangular parallelepiped shape and has a size of, for example, 3.
It is 2mm x 2.5mm x 2.5mm. Further, the main body 10 has a plurality of internal electrode layers 11a, 11b, 12a.
, 12b and a dielectric layer 13 are stacked, and the internal electrode layers 11a and 12a are led out to one end side in the longitudinal direction of the main body 10, and the internal electrode layers 11b and 12b are led out to the other end side. A pair of opposing electrodes is formed by the internal electrode layer 11a and the internal electrode layer 11b, and a pair of opposing electrode layer is formed by the internal electrode layer 12a and the internal electrode layer 12b. Furthermore, internal electrode layers 11a, 11b,
An external electrode 14 is formed which is conductive to 12a and 12b, and can be connected to an external circuit via this external electrode 14.

【0014】また、内部電極層11a,11bは低比抵
抗の導電材、例えばニッケルからなり、本体10の厚さ
方向の上部に26層形成され、内部電極層12a,12
bは高比抵抗の導電材、例えばニッケル(90%)とク
ロム(8%)とその他(2%)の混合物からなり、本体
10の厚さ方向の下部に70層形成されている。
The internal electrode layers 11a and 11b are made of a conductive material with low resistivity, such as nickel, and are formed in 26 layers on the upper part of the main body 10 in the thickness direction.
b is made of a conductive material with high specific resistance, such as a mixture of nickel (90%), chromium (8%), and others (2%), and is formed in 70 layers at the bottom of the main body 10 in the thickness direction.

【0015】次に、前述した構成のコンデンサの作製手
順を説明する。BaTi2 O3 系のF特性材料から
なる厚さが18μmのグリ−ンシ−トに、バインダ材と
混合してペ−スト状にしたニッケルをスクリ−ン印刷し
て内部電極層11a,11bを形成したものを26枚積
層する。さらに、バインダ材と混合してペ−スト状にし
たニッケル・クロムの混合物を前記グリ−ンシ−トにス
クリ−ン印刷して内部電極層12a,12bを形成した
ものを70枚積層する。このとき、前述したように本体
10の両端に、内部電極層11a,11b,12a,1
2bが交互に導出されるようにする。さらに、これらを
積層して一体となすと共に圧着した後、前述した形状に
合わせてカットし、脱バインダ処理を行う。脱バインダ
処理は、例えば250℃の空気雰囲気中にて行う。この
後、1300℃の温度にて還元焼成する。さらに、本体
10の両端部にニッケルによって外部電極14を形成し
、この上にハンダメッキを施してコンデンサを形成した
Next, a procedure for manufacturing a capacitor having the above-described structure will be explained. Internal electrode layers 11a and 11b were formed by screen printing nickel mixed with a binder material and made into a paste on a green sheet made of a BaTi2O3-based F-characteristic material with a thickness of 18 μm. Stack 26 pieces. Further, a mixture of nickel and chromium made into a paste by mixing with a binder material is screen printed on the green sheets to form internal electrode layers 12a and 12b, and 70 sheets are laminated. At this time, as described above, internal electrode layers 11a, 11b, 12a, 1
2b are derived alternately. Furthermore, after these are laminated into one piece and crimped together, they are cut to match the shape described above and subjected to a binder removal process. The binder removal process is performed, for example, in an air atmosphere at 250°C. Thereafter, reduction firing is performed at a temperature of 1300°C. Further, external electrodes 14 were formed from nickel at both ends of the main body 10, and solder plating was applied thereon to form a capacitor.

【0016】前述の条件で作製した結果、静電容量が4
.7μF、周波数1MHzにおける等価直列抵抗が24
0mΩのコンデンサが得られ、立上りが0.1nSのパ
ルス状ノイズを十分に吸収することができた。さらに、
低周波の電圧変動に対しても良好な特性が得られた。こ
れは、図6の等価回路に示すように、パルス状のノイズ
に対しては低比抵抗のニッケルによって形成された内部
電極層11a,11bにより構成されるコンデンサ11
が効果的に作用し、低周波の電圧変動に対しては高比抵
抗のニッケル・クロム合金によって形成された内部電極
層12a,12bにより構成されるコンデンサ12が効
果的に作用することによる。なお、図6において、R1
,L1,C1のそれぞれはコンデンサ11の等価直列抵
抗、等価直列インダクタンス、キャパシタンスを表し、
R2,L2,C2のそれぞれはコンデンサ12の等価直
列抵抗、等価直列インダクタンス、キャパシタンスを表
している。
As a result of manufacturing under the above conditions, the capacitance was 4.
.. 7μF, equivalent series resistance at 1MHz frequency is 24
A capacitor of 0 mΩ was obtained, and was able to sufficiently absorb pulse-like noise with a rise of 0.1 nS. moreover,
Good characteristics were also obtained against low frequency voltage fluctuations. As shown in the equivalent circuit of FIG. 6, the capacitor 11, which is composed of internal electrode layers 11a and 11b made of nickel with low resistivity, is effective against pulse-like noise.
This is because the capacitor 12 constituted by the internal electrode layers 12a and 12b formed of a nickel-chromium alloy with high resistivity acts effectively against low-frequency voltage fluctuations. In addition, in FIG. 6, R1
, L1, and C1 represent the equivalent series resistance, equivalent series inductance, and capacitance of the capacitor 11, respectively,
R2, L2, and C2 represent the equivalent series resistance, equivalent series inductance, and capacitance of the capacitor 12, respectively.

【0017】高比抵抗の内部電極層12a,12bの導
電材の比抵抗値は、低比抵抗の内部電極層11a,11
bの導電材の比抵抗値の10倍以上とすることが好まし
い。実施例におけるニッケルの体積抵抗率は常温におい
て7×10−6Ωcmであり、これに対してニッケル(
80%)・クロム(8%)・その他(2%)合金の体積
抵抗率は常温において69×10−6Ωcmとなり、約
10倍となっている。さらにクロムの含有率を増し、高
比抵抗の内部電極層12a,12bのによて構成される
コンデンサ12の等価直列抵抗を高めても良い。例えば
、ニッケル(80%)・クロム(16%)・その他(4
%)合金の体積抵抗率は常温において108×10−6
Ωcmとなる。
The specific resistance value of the conductive material of the high specific resistance internal electrode layers 12a, 12b is the same as that of the low specific resistance internal electrode layers 11a, 11.
It is preferable that the resistivity value is 10 times or more the specific resistance value of the conductive material b. The volume resistivity of nickel in the example is 7 x 10-6 Ωcm at room temperature, whereas nickel (
The volume resistivity of the chromium (80%), chromium (8%), and other (2%) alloys is 69 x 10-6 Ωcm at room temperature, which is approximately 10 times as large. Furthermore, the equivalent series resistance of the capacitor 12 constituted by the high resistivity internal electrode layers 12a and 12b may be increased by increasing the chromium content. For example, nickel (80%), chromium (16%), others (4
%) The volume resistivity of the alloy is 108 x 10-6 at room temperature.
It becomes Ωcm.

【0018】また、本実施例のコンデンサはセラミック
コンデンサであり、電解コンデンサに比べて小型に形成
することができるので、コンデンサを配置するための広
い実装面積は不要となり装置の小形化を図ることができ
る。さらに、内部電極層11a,11b,12a,12
bを積層形成しているので、小型にして大きな静電容量
を得ることができる。
Furthermore, since the capacitor of this embodiment is a ceramic capacitor and can be formed smaller than an electrolytic capacitor, a large mounting area for arranging the capacitor is not required, and the device can be made smaller. can. Furthermore, internal electrode layers 11a, 11b, 12a, 12
Since the capacitors b are formed in a laminated manner, it is possible to obtain a large capacitance with a small size.

【0019】尚、本実施例では、内部電極層11a,1
1b,12a,12bを形成する導電材として、前述し
たようにニッケル及びニッケル・クロムの合金を用いた
が、これに限定されることはない。例えば、銅・ニッケ
ル合金等の一般抵抗材料を用いることもできる。
In this embodiment, the internal electrode layers 11a, 1
As described above, nickel and a nickel-chromium alloy were used as the conductive material forming the conductive materials 1b, 12a, and 12b, but the present invention is not limited thereto. For example, general resistance materials such as copper-nickel alloys can also be used.

【0020】また、本実施例では本体10の上部に内部
電極層11a,11bからなるコンデンサ11を形成し
、下部に内部伝競争12a,12bからなるコンデンサ
12を形成したがこれに限定されることはない。例えば
、図7に示すように、低比抵抗の導電材からなる内部電
極層11a,11bと高比抵抗の導電材からなる内部電
極層12a,12bを一対毎に交互に積層配置しても同
様の効果を得ることができる。
Further, in this embodiment, the capacitor 11 consisting of the internal electrode layers 11a and 11b is formed in the upper part of the main body 10, and the capacitor 12 consisting of the internal conductive layers 12a and 12b is formed in the lower part, but the present invention is not limited to this. There isn't. For example, as shown in FIG. 7, internal electrode layers 11a and 11b made of a conductive material with low resistivity and internal electrode layers 12a and 12b made of a conductive material with high resistivity may be stacked alternately in pairs. effect can be obtained.

【0021】[0021]

【発明の効果】以上説明したように、本発明の請求項1
によれば、本発明のコンデンサを電源ラインのノイズ及
び電圧変動の除去に用いた場合、一つのコンデンサによ
ってパルス状のノイズと低周波の電圧変動の両方を除去
することができるので、従来のように2個のコンデンサ
を用いる必要がなく、コンデンサを配置するための広い
実装面積が不要となり、装置の小形化を図ることができ
る。
[Effect of the invention] As explained above, claim 1 of the present invention
According to the authors, when the capacitor of the present invention is used to remove noise and voltage fluctuations in a power supply line, it is possible to remove both pulse-like noise and low-frequency voltage fluctuations with one capacitor. It is not necessary to use two capacitors for each, and a large mounting area for arranging the capacitors is not required, and the device can be made smaller.

【0022】また、請求項2によれば、上記の効果に加
えて、第1及び第2の対向電極は積層形成されているの
で、小型にして大きな静電容量を得ることができるとい
う非常に優れた効果を奏するものである。
According to claim 2, in addition to the above-mentioned effects, since the first and second opposing electrodes are laminated, it is possible to obtain a large capacitance with a small size. It has excellent effects.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】  本発明の一実施例を示す断面図[Fig. 1] Cross-sectional view showing one embodiment of the present invention

【図2】 
 電子回路のノイズ対策を説明する図
[Figure 2]
Diagram explaining noise countermeasures for electronic circuits

【図3】  コン
デンサの等価回路を示す図
[Figure 3] Diagram showing the equivalent circuit of a capacitor

【図4】  RLC直列回路
の振動特性を示す図
[Figure 4] Diagram showing the vibration characteristics of an RLC series circuit

【図5】  RLC直列回路の指数
関数特性を示す図
[Figure 5] Diagram showing the exponential characteristic of the RLC series circuit

【図6】  本発明の一実施例の等価
回路を示す図
[Fig. 6] A diagram showing an equivalent circuit of an embodiment of the present invention.

【図7】  本発明の他の実施例を示す断
面図
[Fig. 7] Cross-sectional view showing another embodiment of the present invention

【符号の説明】[Explanation of symbols]

1…電子回路、2…電源ライン、3…電解コンデンサ、
4…セラミックコンデンサ、5,11,12…コンデン
サ、10…コンデンサ本体、11a,11b,12a,
12b…内部電極層、13…誘電体層、14…外部電極
1...electronic circuit, 2...power line, 3...electrolytic capacitor,
4... Ceramic capacitor, 5, 11, 12... Capacitor, 10... Capacitor body, 11a, 11b, 12a,
12b...Internal electrode layer, 13...Dielectric layer, 14...External electrode.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  対向電極と、該対向電極の間に介在さ
れた誘電体とを備えてなるコンデンサにおいて、低比抵
抗の導電材からなる少なくとも一対の第1の対向電極と
、高比抵抗の導電材からなる少なくとも一対の第2の対
向電極とを設けた、ことを特徴とするコンデンサ。
1. A capacitor comprising a counter electrode and a dielectric interposed between the counter electrodes, wherein at least one pair of first counter electrodes made of a conductive material with a low specific resistance and a dielectric material with a high specific resistance. A capacitor comprising at least one pair of second opposing electrodes made of a conductive material.
【請求項2】  前記第1及び第2の対向電極は積層配
置されていることを特徴とする請求項1記載のコンデン
サ。
2. The capacitor according to claim 1, wherein the first and second opposing electrodes are arranged in a stacked manner.
JP3034292A 1991-02-28 1991-02-28 Capacitor Expired - Fee Related JPH0828305B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3034292A JPH0828305B2 (en) 1991-02-28 1991-02-28 Capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3034292A JPH0828305B2 (en) 1991-02-28 1991-02-28 Capacitor

Publications (2)

Publication Number Publication Date
JPH04273416A true JPH04273416A (en) 1992-09-29
JPH0828305B2 JPH0828305B2 (en) 1996-03-21

Family

ID=12410083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3034292A Expired - Fee Related JPH0828305B2 (en) 1991-02-28 1991-02-28 Capacitor

Country Status (1)

Country Link
JP (1) JPH0828305B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135416A (en) * 2007-11-30 2009-06-18 Samsung Electro-Mechanics Co Ltd Lamination type chip capacitor and circuit board apparatus having the same
US9539618B2 (en) 2011-04-14 2017-01-10 Pioneer Hi-Bred International, Inc. System and method for presentation of ears of corn for image acquisition and evaluation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58135933U (en) * 1982-03-10 1983-09-13 株式会社東芝 multilayer capacitor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58135933U (en) * 1982-03-10 1983-09-13 株式会社東芝 multilayer capacitor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135416A (en) * 2007-11-30 2009-06-18 Samsung Electro-Mechanics Co Ltd Lamination type chip capacitor and circuit board apparatus having the same
US8050012B2 (en) 2007-11-30 2011-11-01 Samsung Electro-Mechanics Co., Ltd. Multilayer chip capacitor and circuit board device including the same
US9539618B2 (en) 2011-04-14 2017-01-10 Pioneer Hi-Bred International, Inc. System and method for presentation of ears of corn for image acquisition and evaluation

Also Published As

Publication number Publication date
JPH0828305B2 (en) 1996-03-21

Similar Documents

Publication Publication Date Title
KR102171678B1 (en) Multi-layered ceramic capacitor and board for mounting the same
US9648748B2 (en) Multilayer ceramic capacitor and board for mounting of the same
JP3900104B2 (en) Antistatic parts
JP4864271B2 (en) Multilayer capacitor
US9728334B2 (en) Multilayer ceramic capacitor and board for mounting thereof
KR20150051667A (en) Multi-Layered Ceramic Capacitor
KR20150006622A (en) Multi-layered ceramic capacitor and mounting circuit board thereof
US20100103586A1 (en) Multilayer ceramic capacitor
JPH06260364A (en) Chip component
JPH06251981A (en) Multilayer chip capacitor provided with discharge
KR20140143340A (en) Multi-layered ceramic capacitor and board for mounting the same
JPH0653049A (en) Chip type lc filter
JPH0897070A (en) Ceramic capacitor
JPH0653048A (en) Chip type lc filter
JP2578264B2 (en) Adjustment method of equivalent series resistance of ceramic capacitor
US8098477B2 (en) Feedthrough multilayer capacitor with capacitance components connected in parallel
JPH04273416A (en) Capacitor
JPH0430615A (en) Noise filter
JPH0416012A (en) Noise filter
JP3061092B2 (en) Noise filter block with varistor function
JP2982558B2 (en) Multilayer feedthrough capacitors
JP2643193B2 (en) 3-terminal multi-function device
JPH0653046A (en) Noise filter
JP2003257779A (en) Electronic component
JP2841349B2 (en) Multilayer capacitors

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19960910

LAPS Cancellation because of no payment of annual fees