JPH04271546A - Contention control system for input queuing type packet processing unit - Google Patents

Abstract

PURPOSE:To prevent the deterioration in the efficiency of switch processing of a packet processing unit with a queue to each incoming line of a non-block switch and impartial reservation for incoming lines. CONSTITUTION:Input buffer sections 1 each corresponding to each incoming line 100 of a switch section 2 are connected in a loop by a reservation packet data line 103 and a reservation packet corresponding to each outgoing line 102 is circulated in the loop. Each input buffer section 1 stores an input packet to a packet storage memory 12, a destination is identified by a buffer read control section 14 and an outgoing line corresponding to a reservation control section 16 is reserved to a reservation packet and the reservation state is reserved to a packet transmission reservation table 19. Upon the receipt of a reserved time, a memory read control section 15 reads a relevant packet from a packet storage memory 12 and sends it to the switch section 2 and the packet is outputted from a desired outgoing line 102.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] In order to avoid packet contention within the switch, the present invention provides an input buffer (queue) on each incoming line side of a non-blocking switch, so that packets are processed in a fixed amount of time. This invention relates to a contention control method for processing devices.

0002

2. Description of the Related Art Conventionally, as a contention control method for this type of packet processing device, contention control is performed between packets that first arrive at an input buffer to determine whether or not the packet can be sent from the input buffer to a switch. There is a method in which a fixed order is set for input ports, and if there is a packet to be sent to a desired outgoing line in accordance with the order, the packet transmission is reserved (see Reference 2).

Reference 1: J. Y. Hui and E. A
rthurs: “Abroadband packet
switch for integrated tr
ansport”, IEEEJSAC, 5, 8, pp.
．． 1264-1273, Oct. 1988 Document 2: H.
Obara and T. Yasushi: “High
speed transport process
r for broad-band burst tr
ICC '88, p.
p922-927, June, 1988

[Problems to be Solved by the Invention] However, with the contention control method of the conventional packet processing device described above, the throughput of the switch decreases due to contention control (see Reference 1), and the input port In order to overcome the asymmetry of control, processing such as changing the order of competitive control was necessary (see Reference 2).

0004

[Means for Solving the Problems] The contention control method of the input queuing type packet processing device of the present invention includes a plurality of input buffer units for temporarily storing packets input to corresponding incoming lines, and a plurality of input buffer units for temporarily storing packets input to corresponding input lines. In a contention control method of a packet processing device having a non-block type switch unit that outputs the packets from each to a desired outgoing line, each of the input buffer units is connected in a loop with a reserved packet transmission/reception link, and the Each input buffer section includes a packet storage memory for temporarily storing packets, and receives input packets from the input line and writes them into the packet storage memory, and simultaneously analyzes the destination of the input packets and writes them into the packet storage memory. reception control means for storing the reservation packet along with the address of the packet storage memory; and reception control means for receiving the reservation packet corresponding to the outgoing line from the adjacent previous stage input buffer section via the reservation packet transmission/reception link, and storing the reservation packet in the reception control means. If there is a packet that can be reserved by referring to the destination and the address, it is reserved as the reserved packet, and this reserved packet is sent to the adjacent input buffer section of the next stage via the reserved packet transmission/reception link, and the reserved packet is a reservation control means that holds the packet transmission reservation status such as the transmission time of the packet, the outgoing line to be outputted, and the address; a transmission control means for reading out packets from a packet storage memory and sending them to the switch unit, and transmitting the reservation packets, which exist for the total number of the outgoing lines, for reserving packet transmission for a certain outgoing line and a certain time, to each of the input buffer units. The configuration is such that reservations are shared and rotated one by one to make reservations in parallel.

[0005] In the above configuration, the reception control means further includes an input FIFO section for temporarily storing input packets from the input line in order to handle them at the timing of the own input buffer section; a destination storage table that stores the destination of the input packet and the address of the packet storage memory; a destination storage table that reads the input packet from the input FIFO section, analyzes its destination, and writes this packet to the packet storage memory; a buffer read control unit that writes the destination of the input packet analyzed and the corresponding address of the packet storage memory, and the reservation control unit notifies the packet transmission reservation table that holds the packet transmission reservation status; a time control unit for receiving the reservation packet from the preceding input buffer unit, referring to the destination storage table, and reserving the reservation packet if there is a packet that can be reserved; a reservation control section that writes in a packet transmission reservation table and passes the reserved packet to the next stage input buffer section after reservation; an output FIFO unit; and a memory read control unit that reads a packet to be sent from the packet storage memory through the destination storage table based on the packet transmission reservation table and the current time determined by the time control unit, and writes the read packet to the output FIFO unit. It may be configured as follows.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained with reference to the drawings.

A block diagram of one embodiment of the present invention is shown in FIG. Reference numeral 1 denotes an input buffer unit provided for incoming lines of the packet processing device, and 2 denotes a non-block type switch unit. 100 is an incoming line for packets to the packet processing device, 101 is a data line for packets from the input buffer unit 1 to the switch unit 2, and 102 is an outgoing line for packets from the packet processing device. 103 is each input buffer section 1
This is a data line for reservation packets that is connected to each other in a loop.

Next, FIG. 2 shows a block diagram of the input buffer section 1 of FIG. 1. The input FIFO unit 11 is a FIFO for processing arriving packets in accordance with the timing within the input buffer unit 1. The packet storage memory 12 is a memory for temporarily storing input packets. The output FIFO section 13 includes an input buffer section 1 and a switch section 2.
FIFO to synchronize the timing of data exchange with
It is. The buffer read control unit 14 has an input FIFO
controlling the reading of packets from the unit 11 and writing the packets into the packet storage memory 12;
The destination of the read packet is analyzed and the destination of the packet and the address where the corresponding packet is written in the packet storage memory are written in the destination storage table 18. The time control unit 17 indicates to the memory read control unit 15 and the reservation control unit 16 a time based on a unit time in which one packet is handled within the switch. Reservation control unit 1
6 receives the reservation packet from the adjacent input buffer section 1, refers to the destination storage table 18, and makes a packet transmission reservation for the reservation packet, and also sets the packet transmission time and destination in the packet transmission reservation table 19;
The address where the packet is stored in the packet storage memory 12 is written. The memory read control unit 15 reads the packet transmission reservation table 19 based on the time information from the time control unit 17, reads the transmission packet from the packet storage memory 12, and writes it to the output FIFO unit 13.

FIG. 3 is an example of a reservation packet. It is assumed that the reservation packet has the outgoing line number of the packet processing device and the reservation status of the packet written in a bitmap. The bit length of the outgoing line number is set corresponding to the total number of outgoing lines 102. In this example, the first outgoing line 1 among the four outgoing lines 102 is
The case where 02 is specified is shown. Further, regarding the reservation status, it is assumed that "0" indicates that the reservation is not made, and "1" indicates that the reservation is made. Here, the reason why there are multiple reservation statuses is that when the current time is t, from t+T (next packet output cycle) to t+
The reservation status is shown for each of a plurality of packet output opportunities up to nT (n packet output cycles later). It is assumed that the items to be output first are written on the left side when facing the page. When the input buffer unit 1 that received this packet has a packet to be output to the outgoing line 102 with the same number as the outgoing line number of this reserved packet,
Assume that it is possible to reserve the output of a plurality of packets as long as the reservation status of the reservation packets allows.

The contention control system will be described below with reference to FIGS. 2 and 3.

A packet input to the input buffer section 1 is first input to the input FIFO section 11. After that, the buffer read control unit 14 reads the packet, analyzes the destination of the packet, and transfers the packet to the packet storage memory 12.
At the same time, desired outgoing line number information of the packet and address information of the packet storage memory 12 where the packet is stored are written into the destination storage table 18. The reservation control unit 19 receives a reservation packet having a format as shown in FIG. While referring to it, the packet to be sent to the desired outgoing line 102 is stored in the packet storage memory 1.
Determine whether it exists in 2. If there is,
A "1" is written in the reservation area of the reservation packet where it is "0" to make a transmission reservation, and the packet is determined based on the current time indicated by the time control unit 17 and the position where "1" is written in the reservation packet. The time at which the packet is to be sent, the desired outgoing line number of the packet, and the address at which the corresponding packet exists in the packet storage memory 12 are written in the packet sending reservation table 19. Along with this processing, the reservation packet is transmitted to the reservation control section 16 of the input buffer section 1 at the next stage adjacent to the reservation packet data line 103. This reservation packet goes around the entire input buffer section 1 for each cycle time T corresponding to each outgoing line 102. In this way, packet reservation is performed by the reservation control unit 16 of each input buffer 1.
These reserved packets are shared in the input buffer section to avoid conflicts.

According to the time information from the time control unit 17, the memory read control unit 15 refers to the packet transmission reservation table 19, reads the packet from the packet storage memory 12, writes it to the output FIFO unit 13, and writes the packet corresponding to the read packet. The information to be sent is deleted from the destination storage table 18. The output FIFO unit 13 reads the packet and sends the packet to the switch unit 2.

As described above, by passing reserved packets among all the input buffer units 1, the packet reservation processing is performed in parallel, and the reservation of a packet to be output to a specific outgoing line 102 is performed in different input buffer units. 1 in cycles, no unfair reservations occur depending on the position of the incoming line 100. Due to such reservation processing, packets simultaneously input to this packet processing device are routed to the desired outgoing line 102 without being congested in the switch unit 2.
is output to.

[0014]

[Effects of the Invention] As described above, in the present invention, contention arbitration is distributed/parallelly performed for each buffer corresponding to incoming lines, so switch processing is performed efficiently, and unfair reservations do not occur due to incoming lines. There is an effect.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram of an input buffer section in FIG. 1;

FIG. 3 is a diagram showing an example of a reservation packet.

[Explanation of symbols]

1 Input buffer section 2 Switch section 11 Input FIFO section 12 Packet storage memory 13 Output FIFO section 14 Buffer readout control section 15 Memory readout control section 16 Reservation control section 17 Time control section 18 Destination storage table 19 Packet transmission reservation table 100
Incoming line 101 Data line 102 Outgoing line

Claims (2)

[Claims] 1. A plurality of input buffer units that temporarily store packets input to corresponding incoming lines, and a non-blocking switch unit that outputs the packets from each of the input buffer units to a desired outgoing line. In a contention control method for a packet processing device having a packet processing device, each of the input buffer units is connected in a loop with a reserved packet sending/receiving link, and a packet for temporarily storing packets in each of the input buffer units is provided. a storage memory, a reception control means for receiving input packets from the input line and writing them into the packet storage memory, and at the same time analyzing the destination and storing the destination together with the address of the packet storage memory; and a link for transmitting and receiving reserved packets. receives the reservation packet corresponding to the outgoing line from the input buffer section of the adjacent previous stage through the input buffer section, refers to the destination and the address stored in the reception control means, and if there is a packet that can be reserved, reserves it in the reservation packet. , sends this reservation packet to the adjacent input buffer section of the next stage via the reservation packet transmission/reception link, and also sends the packet transmission reservation status such as the reserved transmission time of the packet, the outgoing line to be output, and the address. and transmission control means that refers to the packet transmission reservation status held in the reservation control means, reads out packets to be transmitted from the packet storage memory, and transmits them to the switch unit. The input queue is characterized in that each of the input buffer units shares the reservation packets, which exist for the total number of the outgoing lines, for reserving packet transmission for a certain time, and the input buffer units take turns one by one to make reservations in parallel. Contention control method for ing-type packet processing equipment. 2. An input FIFO section for the reception control means to temporarily store input packets from the input line in order to handle them at the timing of the own input buffer section; a destination of the input packet; a destination storage table for storing addresses of the packet storage memory; and the input FI
Buffer read control for reading the input packet from the FO unit, analyzing its destination, writing this packet in the packet storage memory, and writing the analyzed destination of the input packet and the corresponding address of the packet storage memory in the destination storage table. the reservation control means comprises: a packet transmission reservation table that holds the packet transmission reservation status; a time control section for notifying the time; and receiving the reservation packet from the preceding input buffer section; Refers to the destination storage table, and if there is a packet that can be reserved, makes a reservation for the reserved packet, writes the packet transmission reservation status in the packet transmission reservation table, and after the reservation, transfers the reserved packet to the input buffer section of the next stage. an output FIFO section for synchronizing the timing of the own input buffer section and the switch section; and a transmission reservation control section for transmitting the packet; 2. Contention control for an input queuing type packet processing device according to claim 1, further comprising a memory read control section that reads packets to be sent from the packet storage memory through the destination storage table and writes them to the output FIFO section. method.