JPH04270514A - Voltage output type d/a converter - Google Patents

Abstract

PURPOSE:To reduce distortion in an output waveform and to decrease the settling time by controlling a leading time at an output voltage change of the voltage output type D/A converter. CONSTITUTION:The D/A converter is provided with a latch circuit 1 latching a digital signal at input terminals 1A-1C with a latch signal, a ramp waveform generating circuits 2A-2C operated by an output of the latch circuit 1, analog switch circuits 3A-3C receiving an output of the ramp waveform generating circuits 2A-2C, constant current circuits 4A-4C connecting to the analog switch circuits 3A-3C and weighted by a digital signal of the input terminals 1A-1C and an inverting amplifier receiving an output of the analog switch circuits 3A-3C.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for converting a digital signal into a high-speed, highly accurate analog voltage signal.

0002

[Prior Art] Next, a voltage output type D/A according to the prior art
The configuration of the conversion circuit will be explained with reference to FIG. 1 in Figure 2 is a latch circuit, 3A to 3C are analog switch circuits, and 4A to 4
C is a constant current circuit, 5 is a resistor, 6 is a power supply, 7 is an inverting amplifier, and 9 is an output terminal. Current values of constant current circuits 4A to 4C are weighted by digital signals of input terminals 1A to 1C. The circuit shown in FIG. 2 is used for controlling CRT deflection electrodes.

A latch circuit 1 latches digital signals at input terminals 1A to 1C using a latch signal at a terminal 1D. The latch circuit 1 applies an offset voltage to the latched signal using a power supply 1E, and inputs the signal to the analog switch circuits 3A to 3C. Analog switch circuits 3A to 3C send current Ib set by latch circuit 1 to inverting amplifier 7. Inverting amplifier 7 amplifies current Ib with amplifiers 7A to 7C. Output terminal 9
The voltage waveform of the phase compensation capacitor 7D of the amplifier 7C is
It is determined by the capacitance value of Also, the output voltage Vd is the feedback resistor 8
is determined by the current Ib.

A resistor 5 and a power supply 6 provide an offset current to an output terminal 9 of an inverting amplifier 7. For example, resistor 8 is 10k
The waveforms of current Ib and voltage Vd when Ω and current Ib change from 0 mA to 10 mA will be explained with reference to FIG. Vd in FIG. 4 is the output voltage waveform of the inverting amplifier 7 in FIG. 2, and Ib is the waveform of the current Ib flowing into the inverting amplifier 7 from the analog switch circuits 3A to 3C.

[0005]

In FIG. 2, as shown in FIG. 4, a step waveform current Ib is applied to the inverting amplifier 7 in response to the latch signal at the terminal 1D. In the inverting amplifier 7, the current Ib is amplified by amplifiers 7A to 7C. However, since the rate of change of the output voltage of the amplifier 7C is limited by the phase compensation capacitor 7D of the amplifier 7C, the voltage waveform Vd at the output terminal 9 is distorted as shown in FIG.

The object of the present invention is to eliminate distortion in the output voltage waveform Vd shown in FIG. 4 and to generate a high-speed, highly accurate analog voltage signal corresponding to the digital signal input to the latch circuit 1.

[0007]

[Means for Solving the Problems] In order to achieve this object, the present invention includes a latch circuit 1 that latches digital signals of input terminals 1A to 1C with latch signals, and a ramp waveform generator that operates with the output of the latch circuit 1. Circuits 2A to 2C,
Analog switch circuits 3A to 3C that receive the outputs of the ramp waveform generation circuits 2A to 2C as inputs, and constant current circuits 4A to 4C that are connected to the analog switch circuits 3A to 3C and weighted by the digital signals of the input terminals 1A to 1C. and an inverting amplifier 7 whose inputs are the outputs of the analog switch circuits 3A to 3C.

[0008]

[Operation] Next, the configuration of the voltage output type D/A converter according to the present invention will be explained with reference to FIG. 2A to 2C in FIG. 1 are ramp waveform generation circuits, and the other parts are the same as in FIG. 2. That is, FIG. 1 shows ramp waveform generation circuits 2A to 2 in FIG.
C is added.

Input digital signals at input terminals 1A to 1C are latched by a latch signal at terminal 1D. Ramp waveform generation circuits 2A to 2C operate with the output signal of latch circuit 1,
Output voltage Va shown in FIG. 3 is output. Analog switch circuits 3A to 3C switch the currents of constant current circuits 4A to 4C according to the output voltages of ramp waveform generation circuits 2A to 2C, and output a smoothly changing current Ia. Current Ia is amplified by amplifiers 7A to 7C inside inverting amplifier 7, and output voltage Vc is output to output terminal 9. Distortion in the output voltage Vc can be removed by appropriately setting the rise time of the current Ia according to the capacitance value of the phase compensation capacitor 7D.

The waveforms of current Ia and voltages Va to Vc in FIG. 1 will be explained with reference to FIG. Voltage Va is the output waveform of latch circuit 1, Vb is the output waveform of ramp waveform generation circuit 2A, Ia is the output current waveform of analog switch circuits 3A to 3C, and Vc
is the output voltage waveform of the inverting amplifier 7.

[0011]

[Embodiment] Next, the circuit of the embodiment of FIG. 1 will be explained with reference to FIG. 5. FIG. The configuration of one bit of a digital signal is shown.

For example, the latch circuit 1 in FIG.
Use C. The ramp waveform generating circuit 2A includes a power supply 2D, an analog switch 2E, resistors 2F and 2G, an inverting amplifier 2H, a capacitor 2J, and voltage regulator diodes 2K and 2L. The analog switch circuit 3A is
Consists of FETs 3D and 3E that make up an analog switch. Others are the same as in FIG.

[0013] The digital signal of input terminal 1A is
It is latched by the latch signal D and outputs the voltage Va. The analog switch 2E is controlled by the latch circuit 1 and supplies a current determined by the power supply 2D and resistors 2F and 2G to the inverting amplifier 2H. The inverter 2H and the capacitor 2J constitute an integrating circuit, which outputs a voltage Vb according to the current applied by the resistors 2F and 2G. The amplitude of voltage Vb is determined by constant voltage diodes 2K and 2L. Output voltage V of inverting amplifier 2H
b, the analog switch circuit 3A is a constant current circuit 4A.
The current is turned on and off, and the current Ia is output. The inverting amplifier 7 and the resistor 8 convert the current Ia into a voltage value, and output the output voltage Vc to the output terminal 9.

[0014]

According to the present invention, by adjusting the rise time of the current Ia by selecting the capacitor 2J or the resistors 2F and 2G of the integrating circuit in the ramp waveform generating circuit,
inverting amplifier 7 without changing the operating conditions of inverting amplifier 7.
The distortion can be removed.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a voltage output type D/A converter according to the present invention.

FIG. 2 is a configuration diagram of a voltage output type D/A converter according to the prior art.

FIG. 3 is a waveform diagram of voltages Va to Vc and current Ia in FIG. 1;

FIG. 4 is a waveform diagram of voltage Vd and current Ib in FIG. 2;

FIG. 5 is a circuit diagram of the embodiment of FIG. 1;

[Explanation of symbols]

1 Latch circuit 1A~1C Input terminal 1D latch signal input terminal 2A~2C Ramp waveform generation circuit 3A~3C Analog switch circuit 4A~4C Constant current circuit 5 Resistance 6 Power supply 7 Inverting amplifier 8 Resistance 9 Output terminal

Claims (1)

[Claims] 1. A latch circuit that latches a digital signal at an input terminal with a latch signal, a ramp waveform generation circuit that operates with the output of the latch circuit, and an analog switch circuit that receives the output of the ramp waveform generation circuit as an input. A voltage output type D/A comprising: a constant current circuit connected to the analog switch circuit and weighted by a digital signal of the input terminal; and an inverting amplifier whose input is the output of the analog switch circuit. converter.