JPH04269005A - Negative feedback amplifier - Google Patents

Negative feedback amplifier

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Publication number
JPH04269005A
JPH04269005A JP3049891A JP3049891A JPH04269005A JP H04269005 A JPH04269005 A JP H04269005A JP 3049891 A JP3049891 A JP 3049891A JP 3049891 A JP3049891 A JP 3049891A JP H04269005 A JPH04269005 A JP H04269005A
Authority
JP
Japan
Prior art keywords
negative feedback
amplifier
distortion
gain
attenuator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3049891A
Other languages
Japanese (ja)
Other versions
JP3117229B2 (en
Inventor
Tsuneo Tokumitsu
恒雄 徳満
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP03030498A priority Critical patent/JP3117229B2/en
Publication of JPH04269005A publication Critical patent/JPH04269005A/en
Application granted granted Critical
Publication of JP3117229B2 publication Critical patent/JP3117229B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To improve the ternary cross modulation distortion characteristic considerably while the size and the gain of a transistor(TR) are kept constant and to design the gain and the distortion characteristic independently. CONSTITUTION:Let an input voltage be Vi, an output voltage Vo, a voltage amplification factor of an amplifier 10 be A, a transfer function of a feedback circuit 22 be B22, and an attenuation ratio of an attenuator 30 be (n), then a voltage gain G of a negative feedback amplifier is expressed as G=Vo/Vi=nA /(1-nAB2). When a quadratic nonlinear characteristic expressed as Vo=AVi+DVi<2> is in existence between the input voltage Vi and the output voltage Vo in a main amplifier section (comprising an amplifier 10 and an attenuator 30), since a distortion output voltage VH is expressed as VH=DVi<2>n<2>/(1-nAB2), then the distortion is suppressed into n<2>/(1-nAB2) by negative feedback. That is, the distortion is suppressed by a product between the suppression component n<2> by the attenuator 30 and the (1-nAB2) by negative feedback.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、利得を一定に保持する
とともに、歪を低減して線形性を向上させた負帰還増幅
器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a negative feedback amplifier that maintains constant gain, reduces distortion, and improves linearity.

【0002】0002

【従来の技術】図6は、従来の帰還増幅器の基本構成を
示すブロック図である。図において、帰還増幅器は、増
幅器10とその入出力間を接続する帰還回路21とによ
り構成される。ここで、入力電圧をVi 、出力電圧を
Vo、増幅器10の電圧増幅度をA、帰還回路21の伝
達関数をB1 とすると、帰還増幅器の電圧利得Gは、
G=A/(1−AB1)   となる。負帰還の場合は、│1−AB1 │>1である
2. Description of the Related Art FIG. 6 is a block diagram showing the basic configuration of a conventional feedback amplifier. In the figure, the feedback amplifier includes an amplifier 10 and a feedback circuit 21 connecting its input and output. Here, if the input voltage is Vi, the output voltage is Vo, the voltage amplification degree of the amplifier 10 is A, and the transfer function of the feedback circuit 21 is B1, the voltage gain G of the feedback amplifier is:
G=A/(1-AB1). In the case of negative feedback, |1-AB1|>1.

【0003】したがって、図6に示す帰還増幅器を負帰
還増幅器とした場合には、増幅器10が入力電圧Vi 
と出力電圧Vo との間に Vo =AVi+DVi2  なる2次の非線形性を有していれば、歪出力電圧VH 
は、 VH=DVi2+AB1VH  (1−AB1)VH =DVi2 であり、ゆえに VH =DVi2 /(1−AB1) となるので、負帰還により歪は、 1/(1−AB1) に抑圧されたことになる。すなわち、負帰還による利得
低下分だけ歪率が改善される。
Therefore, when the feedback amplifier shown in FIG. 6 is used as a negative feedback amplifier, the amplifier 10
If there is a second-order nonlinearity between Vo = AVi + DVi2 between the output voltage Vo and the output voltage Vo, the distorted output voltage VH
is VH = DVi2 + AB1VH (1-AB1)VH = DVi2, therefore, VH = DVi2 / (1-AB1), so the distortion is suppressed to 1/(1-AB1) by negative feedback. . In other words, the distortion rate is improved by the amount of gain reduction due to negative feedback.

【0004】0004

【発明が解決しようとする課題】しかし、従来の負帰還
増幅器では、歪率改善のために帰還量B1 を大きくす
ると利得が低下し、この負帰還増幅器を用いた装置にお
ける諸元が達成できなくなる。すなわち、利得と歪特性
とを独立に設計することができず、歪特性の改善効果は
所定の利得を満たす範囲に限られていた。
[Problem to be Solved by the Invention] However, in conventional negative feedback amplifiers, when the amount of feedback B1 is increased to improve distortion, the gain decreases, making it impossible to achieve the specifications of a device using this negative feedback amplifier. . That is, gain and distortion characteristics cannot be designed independently, and the effect of improving distortion characteristics is limited to a range that satisfies a predetermined gain.

【0005】また、利得および歪特性の大幅な改善を同
時に達成しようとすれば、主増幅器を構成するトランジ
スタのサイズを数倍程度大きくする必要があり、回路形
状の大型化と消費電力の大幅な増加が避けられなかった
。本発明は、トランジスタのサイズおよび利得を一定に
保持したままで3次混変調歪特性を大幅に改善し、利得
と歪特性とを独立に設計することができる負帰還増幅器
を提供することを目的とする。
Furthermore, in order to simultaneously achieve significant improvements in gain and distortion characteristics, it is necessary to increase the size of the transistors constituting the main amplifier several times, resulting in an increase in the size of the circuit and a significant increase in power consumption. An increase was inevitable. An object of the present invention is to provide a negative feedback amplifier in which the third-order intermodulation distortion characteristics can be significantly improved while the transistor size and gain are held constant, and the gain and distortion characteristics can be designed independently. shall be.

【0006】[0006]

【課題を解決するための手段】本発明は、信号入力端子
から入力される信号を増幅する増幅手段と、前記増幅手
段の出力端子の信号を前記増幅手段の入力端子に帰還す
る帰還手段とを備えた負帰還増幅器において、前記信号
入力端子と前記増幅手段の入力端子との間、および前記
帰還手段と前記増幅手段の入力端子との間に、入力信号
および帰還信号に線形の減衰を与える線形減衰手段を接
続したことを特徴とする。
[Means for Solving the Problems] The present invention provides an amplifying means for amplifying a signal input from a signal input terminal, and a feedback means for feeding back a signal at an output terminal of the amplifying means to an input terminal of the amplifying means. In the negative feedback amplifier, a linear attenuation is provided between the signal input terminal and the input terminal of the amplifying means, and between the feedback means and the input terminal of the amplifying means, giving linear attenuation to the input signal and the feedback signal. It is characterized in that a damping means is connected.

【0007】[0007]

【作用】本発明は、減衰手段の減衰比をnとすれば、入
力信号電圧Vi がnVi に変換されて増幅手段の入
力端子に印加され、増幅された一部の出力信号が帰還手
段を介して減衰手段に帰還される構成である。ここで、
本発明の負帰還増幅器の利得は、従来の負帰還増幅器に
おいて増幅手段の利得AをnAに変換した場合に等しい
ので、本発明における帰還手段による帰還量をB2 と
すれば、 nA/(1−nAB2 ) となる。この利得が、従来の負帰還増幅器の利得である
A/(1−AB1 ) を確保し、かつ歪出力電圧を小さくするには、減衰比n
を1より小さい値にすればよい。
[Operation] In the present invention, when the attenuation ratio of the attenuation means is n, the input signal voltage Vi is converted to nVi and applied to the input terminal of the amplification means, and a part of the amplified output signal is passed through the feedback means. The structure is such that the signal is fed back to the damping means. here,
The gain of the negative feedback amplifier of the present invention is equal to the gain A of the amplification means in a conventional negative feedback amplifier converted to nA, so if the feedback amount by the feedback means of the present invention is B2, then nA/(1- nAB2). In order to ensure this gain is A/(1-AB1), which is the gain of the conventional negative feedback amplifier, and to reduce the distorted output voltage, the attenuation ratio n
may be set to a value smaller than 1.

【0008】すなわち、歪を発生する増幅手段には入力
信号電圧のn倍の小さい電圧が印加されるので、2次の
歪率をn倍に小さくできるとともに、負帰還の帰還量B
2 を少なくすることにより、負帰還増幅器としての利
得を確保することができる。また、3次混変調歪はその
歪率で2度の非線形効果を受けるので、さらにn2 倍
に小さくすることができる。
That is, since a voltage n times as small as the input signal voltage is applied to the amplifying means that generates distortion, the secondary distortion factor can be reduced by n times, and the feedback amount B of negative feedback can be reduced.
By reducing 2, the gain as a negative feedback amplifier can be ensured. Furthermore, since the third-order cross-modulation distortion is subject to a two-degree nonlinear effect at its distortion rate, it can be further reduced by a factor of n2.

【0009】[0009]

【実施例】図1は、本発明の負帰還増幅器の基本構成を
示すブロック図である。図において、本発明の負帰還増
幅器は、主増幅部を構成する増幅器10および減衰器3
0と、その入出力間を接続する帰還回路22とにより構
成される。ここで、入力電圧をVi 、出力電圧をVo
 、増幅器10の電圧増幅度をA、帰還回路22の伝達
関数をB2 、減衰器30の減衰比をnとすると、Vo
 =nAVi+nAB2Vo  (1−nAB2)Vo=nAVi  であるので、負帰還増幅器の電圧利得Gは、G=Vo/
Vi=nA/(1−nAB2)  となる。ここで、主
増幅部(増幅器10および減衰器30)が入力電圧Vi
と出力電圧Vo との間にVo =AVi+DVi2  なる2次の非線形性を有していれば、歪出力電圧VH 
は、 VH=D(nVi)2+nAB2VH (1−AB2)
VH =DVi2 であり、ゆえに VH =DVi2 n2/(1−nAB2)となるので
、負帰還により歪は、 n2/(1−nAB2) に抑圧されたことになる。すなわち、歪は、減衰器30
による抑圧分n2と、負帰還による抑圧分1/(1−n
AB2) の積だけ抑圧される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the basic configuration of a negative feedback amplifier according to the present invention. In the figure, the negative feedback amplifier of the present invention includes an amplifier 10 and an attenuator 3 constituting the main amplification section.
0 and a feedback circuit 22 that connects its input and output. Here, the input voltage is Vi and the output voltage is Vo
, the voltage amplification degree of the amplifier 10 is A, the transfer function of the feedback circuit 22 is B2, and the attenuation ratio of the attenuator 30 is n, then Vo
=nAVi+nAB2Vo (1-nAB2)Vo=nAVi Therefore, the voltage gain G of the negative feedback amplifier is G=Vo/
Vi=nA/(1-nAB2). Here, the main amplification section (amplifier 10 and attenuator 30) input voltage Vi
If there is a second-order nonlinearity between Vo = AVi + DVi2 between the output voltage Vo and the output voltage Vo, the distorted output voltage VH
is, VH=D(nVi)2+nAB2VH (1-AB2)
Since VH = DVi2 and therefore VH = DVi2 n2/(1-nAB2), the distortion is suppressed to n2/(1-nAB2) by negative feedback. That is, the distortion is caused by the attenuator 30
The suppression amount n2 due to negative feedback and the suppression amount 1/(1-n
AB2) is suppressed by the product of

【0010】表1は、従来の負帰還増幅器と本発明の負
帰還増幅器の利得および歪を比較して表したものである
Table 1 compares the gain and distortion of the conventional negative feedback amplifier and the negative feedback amplifier of the present invention.

【0011】[0011]

【表1】[Table 1]

【0012】ここで、従来の負帰還増幅器と本発明の負
帰還増幅器の利得が同一である条件は、
Here, the conditions for the gain of the conventional negative feedback amplifier and the negative feedback amplifier of the present invention to be the same are as follows.

【0013】[0013]

【数1】[Math 1]

【0014】である。また、2次歪の総合の抑圧比が本
発明の負帰還増幅器により改善される条件は、
[0014] Furthermore, the conditions under which the overall suppression ratio of second-order distortion is improved by the negative feedback amplifier of the present invention are as follows:

【001
5】
001
5]

【数2】[Math 2]

【0016】である。したがって、これらの条件を満た
す減衰比nの条件は、 n<1 となる。すなわち、増幅器10の前段に減衰比n(n<
1)の減衰器30を挿入することにより、利得を一定に
したまま歪出力電圧を低減することができる。このとき
、利得を一定に保持する条件は、(1) 式から
[0016] Therefore, the condition for the damping ratio n that satisfies these conditions is n<1. That is, the attenuation ratio n (n<
By inserting the attenuator 30 of 1), it is possible to reduce the distorted output voltage while keeping the gain constant. At this time, the condition for keeping the gain constant is given by equation (1).

【00
17】
00
17]

【数3】[Math 3]

【0018】と書き換えることができ、A<0であるか
ら、 B2−B1<0 となる。すなわち、帰還回路22の伝達関数(帰還量)
B2 が小さくなって利得を一定に保持できることがわ
かる。ここで、利得が同一になるときの2次歪の総合の
抑圧比は、図6に示す従来構成の帰還回路伝達関数B1
 を用いて n/(1−AB1) と表すことができる。すなわち、従来構成と利得同一と
した場合には、2次の歪率をn倍(n<1)に小さくす
ることができる。したがって、複数のキャリアを同時に
増幅する際に発生する3次混変調歪については、2次の
歪率の改善効果を2度受けることになるので、従来構成
に比べてn2 倍(n<1)に小さくすることができる
Since A<0, B2-B1<0. In other words, the transfer function (feedback amount) of the feedback circuit 22
It can be seen that B2 becomes smaller and the gain can be kept constant. Here, the total suppression ratio of second-order distortion when the gains are the same is the feedback circuit transfer function B1 of the conventional configuration shown in FIG.
It can be expressed as n/(1-AB1) using . That is, when the gain is the same as that of the conventional configuration, the second-order distortion factor can be reduced by n times (n<1). Therefore, for third-order cross-modulation distortion that occurs when multiple carriers are simultaneously amplified, the second-order distortion rate is improved twice, which is n2 times (n<1) compared to the conventional configuration. can be made smaller.

【0019】図2は、本発明の負帰還増幅器の第一実施
例の構成を示すブロック図である。図において、本実施
例では、キャパシタ31,32を用いた分圧回路により
減衰器30aを構成することを特徴とする。ここで、各
キャパシタ31,32の容量をC1 ,C2 とする。 したがって、増幅器10への入力電圧nVi は減衰器
30aにより、
FIG. 2 is a block diagram showing the configuration of a first embodiment of the negative feedback amplifier of the present invention. In the figure, this embodiment is characterized in that an attenuator 30a is configured by a voltage dividing circuit using capacitors 31 and 32. Here, the capacitance of each capacitor 31, 32 is assumed to be C1, C2. Therefore, the input voltage nVi to the amplifier 10 is reduced by the attenuator 30a.

【0020】[0020]

【数4】[Math 4]

【0021】となる。ここで、n<1であるので、(3
) 式を満たすように B2−B1=C2/AC1  に基づいて帰還回路22の伝達関数B2 を設定すれば
、従来の負帰還増幅器と同一利得でかつ3次混変調歪を
n2 倍(n<1)に抑圧することができる。図3は、
本発明の負帰還増幅器の第二実施例の構成を示すブロッ
ク図である。
[0021] Here, since n<1, (3
) If the transfer function B2 of the feedback circuit 22 is set based on the formula B2-B1=C2/AC1, the gain is the same as that of a conventional negative feedback amplifier, and the third-order intermodulation distortion is multiplied by n2 (n<1 ) can be suppressed. Figure 3 shows
FIG. 2 is a block diagram showing the configuration of a second embodiment of the negative feedback amplifier of the present invention.

【0022】図において、本実施例では、抵抗器33,
34を用いた分圧回路により減衰器30bを構成するこ
とを特徴とする。ここで、各抵抗器33,34の抵抗値
をR1 ,R2 とする。したがって、増幅器10への
入力電圧nVi は減衰器30bにより、
In the figure, in this embodiment, resistors 33,
It is characterized in that the attenuator 30b is constituted by a voltage dividing circuit using 34. Here, the resistance values of the respective resistors 33 and 34 are assumed to be R1 and R2. Therefore, the input voltage nVi to the amplifier 10 is reduced by the attenuator 30b.

【0023】[0023]

【数5】[Math 5]

【0024】となる。ここで、n<1であるので、(3
) 式を満たすように B2−B1=R1/AR2  に基づいて帰還回路22の伝達関数B2 を設定すれば
、従来の負帰還増幅器と同一利得でかつ3次混変調歪を
n2 倍(n<1)に抑圧することができる。なお、第
一実施例および第二実施例では、減衰器30a,30b
での位相回りがないので、従来の負帰還増幅器における
安定性を維持することができる。また、帰還回路22と
減衰器30による位相回りがあっても安定な場合には、
キャパシタと抵抗器とを組み合わせて減衰器を構成して
もよい。
[0024] Here, since n<1, (3
) If the transfer function B2 of the feedback circuit 22 is set based on the formula B2-B1=R1/AR2, the gain is the same as that of a conventional negative feedback amplifier, and the third-order intermodulation distortion is multiplied by n2 (n<1 ) can be suppressed. Note that in the first embodiment and the second embodiment, the attenuators 30a and 30b
Since there is no phase rotation at , the stability of conventional negative feedback amplifiers can be maintained. In addition, if it is stable even if there is a phase rotation due to the feedback circuit 22 and the attenuator 30,
The attenuator may be configured by combining a capacitor and a resistor.

【0025】図4は、本発明の負帰還増幅器の第三実施
例の構成を示すブロック図である。図において、本実施
例では、減衰量αdBのアッテネータ35により減衰器
30cを構成することを特徴とする。したがって、増幅
器10への入力電圧nVi は減衰器30cにより、
FIG. 4 is a block diagram showing the configuration of a third embodiment of the negative feedback amplifier of the present invention. In the figure, this embodiment is characterized in that an attenuator 30c is constituted by an attenuator 35 having an attenuation amount αdB. Therefore, the input voltage nVi to the amplifier 10 is reduced by the attenuator 30c.


0026】
[
0026

【数6】[Math 6]

【0027】となる。ここで、n<1であるので、(3
) 式を満たすように
[0027] Here, since n<1, (3
) so that the formula is satisfied.

【0028】[0028]

【数7】[Math 7]

【0029】に基づいて帰還回路22の伝達関数B2 
を設定すれば、従来の負帰還増幅器と同一利得でかつ3
次混変調歪をn2 倍(n<1)に抑圧することができ
る。 図5は、本発明の負帰還増幅器の第四実施例の構成を示
すブロック図である。図において、本実施例では、増幅
器10を構成するトランジスタその他の増幅素子11の
入力寄生キャパシタ12を利用して減衰器を構成するこ
とを特徴とする。すなわち、増幅器10の入力段に直列
にキャパシタ36を接続し、このキャパシタ36と入力
寄生キャパシタ12とにより、第一実施例と同様の減衰
器30aを実現する。ここで、入力寄生キャパシタ12
およびキャパシタ36の容量をCP ,C3 とする。 なお、整合回路(インピーダンス変換器)37,38が
本実施例の負帰還増幅器の入力段および出力段に挿入さ
れる。
The transfer function B2 of the feedback circuit 22 is based on
By setting , the gain is the same as that of a conventional negative feedback amplifier and
It is possible to suppress the order cross modulation distortion by n2 times (n<1). FIG. 5 is a block diagram showing the configuration of a fourth embodiment of the negative feedback amplifier of the present invention. In the figure, this embodiment is characterized in that an attenuator is constructed using an input parasitic capacitor 12 of a transistor or other amplification element 11 that constitutes an amplifier 10. That is, a capacitor 36 is connected in series to the input stage of the amplifier 10, and by this capacitor 36 and the input parasitic capacitor 12, an attenuator 30a similar to that of the first embodiment is realized. Here, the input parasitic capacitor 12
And the capacitance of the capacitor 36 is assumed to be CP, C3. Note that matching circuits (impedance converters) 37 and 38 are inserted in the input stage and output stage of the negative feedback amplifier of this embodiment.

【0030】したがって、第一実施例と同様に、帰還回
路22の伝達関数B2 を B2−B1=CP/AC3  に基づいて設定すれば、従来の負帰還増幅器と同一利得
で、かつ3次混変調歪をn2 倍(n<1)に抑圧する
ことができる。本実施例構成の利点は、キャパシタを用
いた分圧回路により減衰器30を形成する場合に、増幅
素子11の入力寄生キャパシタを利用しているので、付
加するキャパシタが1つあればよく、構成を簡単にでき
るとともに、寄生容量のバラツキの影響を直列容量(C
3 )によって抑圧できる点にある。
Therefore, similarly to the first embodiment, if the transfer function B2 of the feedback circuit 22 is set based on B2-B1=CP/AC3, the gain is the same as that of the conventional negative feedback amplifier, and the third-order cross modulation is achieved. Distortion can be suppressed by n2 times (n<1). The advantage of the configuration of this embodiment is that when the attenuator 30 is formed by a voltage divider circuit using a capacitor, the input parasitic capacitor of the amplification element 11 is used, so only one additional capacitor is required, and the configuration In addition, the effects of variations in parasitic capacitance can be easily reduced by reducing
3) can be suppressed.

【0031】ところで、以上示した実施例構成では、キ
ャパシタあるいは抵抗器によって減衰器を構成した例を
示したが、トランスあるいは伝送線路その他の線形素子
を構成要素する減衰器を用いても、同様の特性を得るこ
とができる。また、増幅器10としては、電子管あるい
はトンネルダイオードを用いることもできる。
By the way, in the embodiment configuration shown above, an example was shown in which the attenuator was configured with a capacitor or a resistor, but the same result can be obtained even if an attenuator is configured with a transformer, transmission line, or other linear element. characteristics can be obtained. Further, as the amplifier 10, an electron tube or a tunnel diode can also be used.

【0032】[0032]

【発明の効果】以上説明したように本発明は、増幅手段
に入力される信号電圧を減衰手段を介して低下させ、か
つこれによる利得低下を負帰還の帰還量を少なくして補
償しているので、従来の負帰還増幅器に比べて利得を損
なうことなく3次混変調歪特性を大幅に改善することが
できる。
[Effects of the Invention] As explained above, the present invention reduces the signal voltage input to the amplification means through the attenuation means, and compensates for the gain reduction caused by this by reducing the amount of negative feedback. Therefore, compared to conventional negative feedback amplifiers, third-order intermodulation distortion characteristics can be significantly improved without loss of gain.

【0033】また、本発明による構成では、FETのゲ
ート幅を実効的に数倍程度大きくした場合と同等の効果
をあげることができ、回路規模の小型化および低消費電
力化を容易に実現することができる。また、キャパシタ
によって減衰手段を実現した場合には、雑音指数を劣化
させないので低雑音増幅器にも適用することができる。
Furthermore, the configuration according to the present invention can achieve the same effect as when the gate width of the FET is effectively increased by several times, and can easily realize miniaturization of the circuit scale and reduction of power consumption. be able to. Further, when the attenuation means is realized by a capacitor, the noise figure does not deteriorate, so it can be applied to a low-noise amplifier.

【0034】さらに、本発明は、線形性の高い増幅器が
要求されるディジタルマイクロ波装置の受信用低雑音増
幅器、利得可変増幅器、送信用高出力増幅器、あるいは
低消費電力かつ低歪特性が要求される自動車電話や携帯
電話その他の移動通信機器の送受信用増幅器に適用した
場合に、低価格で性能向上を実現することができる。
Furthermore, the present invention can be applied to low-noise receiving amplifiers, variable gain amplifiers, and high-output transmitting amplifiers for digital microwave devices that require highly linear amplifiers, or that require low power consumption and low distortion characteristics. When applied to transmitting/receiving amplifiers for car phones, mobile phones, and other mobile communication devices, performance can be improved at a low cost.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の負帰還増幅器の基本構成を示すブロッ
ク図である。
FIG. 1 is a block diagram showing the basic configuration of a negative feedback amplifier of the present invention.

【図2】本発明の負帰還増幅器の第一実施例の構成を示
すブロック図である。
FIG. 2 is a block diagram showing the configuration of a first embodiment of the negative feedback amplifier of the present invention.

【図3】本発明の負帰還増幅器の第二実施例の構成を示
すブロック図である。
FIG. 3 is a block diagram showing the configuration of a second embodiment of the negative feedback amplifier of the present invention.

【図4】本発明の負帰還増幅器の第三実施例の構成を示
すブロック図である。
FIG. 4 is a block diagram showing the configuration of a third embodiment of the negative feedback amplifier of the present invention.

【図5】本発明の負帰還増幅器の第四実施例の構成を示
すブロック図である。
FIG. 5 is a block diagram showing the configuration of a fourth embodiment of the negative feedback amplifier of the present invention.

【図6】従来の帰還増幅器の基本構成を示すブロック図
である。
FIG. 6 is a block diagram showing the basic configuration of a conventional feedback amplifier.

【符号の説明】[Explanation of symbols]

10  増幅器 11  増幅素子 12  入力寄生キャパシタ 21,22  帰還回路 30  減衰器 31,32  キャパシタ 33,34  抵抗器 35  アッテネータ 36  キャパシタ 37,38  整合回路 10 Amplifier 11 Amplification element 12 Input parasitic capacitor 21, 22 Feedback circuit 30 Attenuator 31, 32 Capacitor 33, 34 Resistor 35 Attenuator 36 Capacitor 37, 38 Matching circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  信号入力端子から入力される信号を増
幅する増幅手段と、前記増幅手段の出力端子の信号を前
記増幅手段の入力端子に帰還する帰還手段とを備えた負
帰還増幅器において、前記信号入力端子と前記増幅手段
の入力端子との間、および前記帰還手段と前記増幅手段
の入力端子との間に、入力信号および帰還信号に線形の
減衰を与える線形減衰手段を接続したことを特徴とする
負帰還増幅器。
1. A negative feedback amplifier comprising: amplification means for amplifying a signal input from a signal input terminal; and feedback means for feeding back a signal at an output terminal of the amplification means to an input terminal of the amplification means, A linear attenuation means for linearly attenuating the input signal and the feedback signal is connected between the signal input terminal and the input terminal of the amplification means, and between the feedback means and the input terminal of the amplification means. Negative feedback amplifier.
JP03030498A 1991-02-25 1991-02-25 Negative feedback amplifier Expired - Lifetime JP3117229B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP03030498A JP3117229B2 (en) 1991-02-25 1991-02-25 Negative feedback amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03030498A JP3117229B2 (en) 1991-02-25 1991-02-25 Negative feedback amplifier

Publications (2)

Publication Number Publication Date
JPH04269005A true JPH04269005A (en) 1992-09-25
JP3117229B2 JP3117229B2 (en) 2000-12-11

Family

ID=12305488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03030498A Expired - Lifetime JP3117229B2 (en) 1991-02-25 1991-02-25 Negative feedback amplifier

Country Status (1)

Country Link
JP (1) JP3117229B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7123073B2 (en) 2002-03-28 2006-10-17 Matsushita Electric Industrial Co., Ltd. Amplifier and frequency converter
JP2015523006A (en) * 2012-06-01 2015-08-06 クアルコム,インコーポレイテッド Step attenuator with constant input capacitance
JP2015220582A (en) * 2014-05-16 2015-12-07 Necエンジニアリング株式会社 Transmitter and transmission method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7123073B2 (en) 2002-03-28 2006-10-17 Matsushita Electric Industrial Co., Ltd. Amplifier and frequency converter
JP2015523006A (en) * 2012-06-01 2015-08-06 クアルコム,インコーポレイテッド Step attenuator with constant input capacitance
US9985601B2 (en) 2012-06-01 2018-05-29 Qualcomm Incorporated Step attenuator with constant input capacitance
JP2015220582A (en) * 2014-05-16 2015-12-07 Necエンジニアリング株式会社 Transmitter and transmission method

Also Published As

Publication number Publication date
JP3117229B2 (en) 2000-12-11

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