JPH04264752A - Photomask and manufacture of semiconductor device - Google Patents

Photomask and manufacture of semiconductor device

Info

Publication number
JPH04264752A
JPH04264752A JP2600591A JP2600591A JPH04264752A JP H04264752 A JPH04264752 A JP H04264752A JP 2600591 A JP2600591 A JP 2600591A JP 2600591 A JP2600591 A JP 2600591A JP H04264752 A JPH04264752 A JP H04264752A
Authority
JP
Japan
Prior art keywords
photomask
trench
pattern
semiconductor device
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2600591A
Other languages
Japanese (ja)
Inventor
Yoshibumi Kikuchi
菊池 義文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2600591A priority Critical patent/JPH04264752A/en
Publication of JPH04264752A publication Critical patent/JPH04264752A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Element Separation (AREA)

Abstract

PURPOSE:To provide a photomask and a manufacturing method for a semiconductor in which formation of a gap at an intersection of a trench can be simply and easily prevented in an improvement in the photomask and a forming method of the trench for isolating elements of a semiconductor device. CONSTITUTION:A photomask of this invention has a pattern corresponding to a pattern of a trench for isolating semiconductor elements on a semiconductor substrate. The trench is formed of an area of an interval of a shielding part 1a of the photomask 1 of an intersection part, formed narrower than the area of the interval of the part 1a of a linear section. The trench is formed on the substrate by photolithography technique by using the photomask 1, and a filling material is filled in the trench.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、フォトマスクの改良及
び半導体装置の素子を分離するトレンチの形成方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved photomask and a method for forming trenches for separating elements of a semiconductor device.

【0002】半導体基板上の半導体素子を分離するトレ
ンチを形成する場合、このトレンチの交差部分のトレン
チの間隔は直線部のトレンチの間隔より広くなり、この
トレンチ内に充填材を充填するとこの間隔の差に相当す
る部分には充填材が充填されない空隙部が形成される障
害が発生している。
[0002] When trenches are formed to separate semiconductor elements on a semiconductor substrate, the interval between the trenches at the intersection of the trenches is wider than the interval between the trenches at the straight part, and when the trenches are filled with a filler material, this interval becomes wider. A problem occurs in which a void is not filled with the filler in a portion corresponding to the difference.

【0003】以上のような状況から、トレンチの交差部
においてトレンチ内に充填材が充填されない空隙部が生
じるのを防止することが可能な半導体装置の製造方法が
要望されている。
Under the above circumstances, there is a need for a method of manufacturing a semiconductor device that can prevent the formation of voids in the trenches that are not filled with a filler material at the intersections of the trenches.

【0004】0004

【従来の技術】従来のフォトマスク及び半導体装置につ
き図5〜図6により詳細に説明する。図5は従来のフォ
トマスクのパターンを示す図、図6は従来の半導体基板
に形成したトレンチ内に充填材を充填した状態を示す図
である。
2. Description of the Related Art Conventional photomasks and semiconductor devices will be explained in detail with reference to FIGS. 5 and 6. FIG. 5 is a diagram showing a pattern of a conventional photomask, and FIG. 6 is a diagram showing a state in which a trench formed in a conventional semiconductor substrate is filled with a filler material.

【0005】従来のフォトマスク21におけるトレンチ
の交差部分に相当するパターンは図4に示すようなパタ
ーンであり、トレンチに相当する透過部21b の寸法
は直線部の間隔をWとすると、交差部分の最も離れた部
分の距離はWの1.4142倍になっている。
A pattern corresponding to the intersection of trenches in a conventional photomask 21 is a pattern as shown in FIG. The distance of the farthest part is 1.4142 times W.

【0006】このようなフォトマスク21を用いてフォ
トリソグラフィー技術により半導体基板12にトレンチ
12a を形成し、このトレンチ12a 内にシリコン
酸化膜或いはポリシリコン膜からなる充填材15を充填
すると、図6に示すようにトレンチ12a の壁面の間
隔が広い交差部には充填材が充填されない空隙部15a
 が生じる。
When a trench 12a is formed in the semiconductor substrate 12 by photolithography using such a photomask 21, and a filling material 15 made of a silicon oxide film or a polysilicon film is filled in the trench 12a, the structure shown in FIG. As shown, a gap 15a is not filled with the filler at the intersection where the walls of the trench 12a have a wide interval.
occurs.

【0007】[0007]

【発明が解決しようとする課題】以上説明した従来の半
導体装置においては、充填材をトレンチ内に充填した場
合に、トレンチの交差部分においてはトレンチの壁面の
間隔が直線部より広くなっているので、充填材が充填さ
れない空隙部が生じるという問題点があった。
[Problems to be Solved by the Invention] In the conventional semiconductor device described above, when the trench is filled with a filler, the interval between the walls of the trench is wider at the intersection of the trenches than at the straight part. However, there was a problem in that voids were not filled with the filler.

【0008】本発明は以上のような状況から、トレンチ
の交差部分に空隙部が形成されるのを簡単且つ容易に防
止することが可能となるフォトマスク及び半導体の製造
方法の提供を目的としたものである。
SUMMARY OF THE INVENTION In view of the above-mentioned circumstances, an object of the present invention is to provide a photomask and a semiconductor manufacturing method that can simply and easily prevent the formation of voids at the intersections of trenches. It is something.

【0009】[0009]

【課題を解決するための手段】本発明のフォトマスクは
、半導体基板上の半導体素子を分離するトレンチのパタ
ーンに相当するパターンを備えたフォトマスクであって
、このトレンチが交差する部分のこのフォトマスクのパ
ターンで構成される間隔の面積が、直線部のパターンの
間隔の面積よりも狭く形成されているように構成する。
[Means for Solving the Problems] The photomask of the present invention is a photomask provided with a pattern corresponding to a pattern of trenches separating semiconductor elements on a semiconductor substrate, and the photomask is provided with a pattern corresponding to a pattern of trenches separating semiconductor elements on a semiconductor substrate. The area of the interval formed by the pattern of the mask is formed to be smaller than the area of the interval of the pattern of the straight part.

【0010】本発明の半導体装置の製造方法は、トレン
チを形成する半導体装置の製造方法において、半導体基
板の表面に絶縁膜とレジスト膜とを積層して形成する工
程と、上記のフォトマスクを用いてこのレジスト膜をパ
ターニングして開口窓を形成する工程と、この開口窓を
形成したレジスト膜をマスクとしてこの絶縁膜をエッチ
ングして開口窓を形成する工程と、このレジスト膜を除
去し、この絶縁膜をマスクとしてこの半導体基板をエッ
チングしてトレンチを形成する工程と、この絶縁膜を除
去し、このトレンチ内に充填材を充填する工程とを含む
ように構成する。
A method for manufacturing a semiconductor device according to the present invention includes a step of laminating an insulating film and a resist film on the surface of a semiconductor substrate, and using the photomask described above, in a method of manufacturing a semiconductor device in which a trench is formed. A step of patterning the resist film of the lever to form an opening window, a step of etching the insulating film using the resist film forming the opening window as a mask to form an opening window, and a step of removing this resist film and forming an opening window. The method includes a step of etching the semiconductor substrate using an insulating film as a mask to form a trench, and a step of removing the insulating film and filling the trench with a filler.

【0011】[0011]

【作用】即ち本発明においては、半導体基板に形成した
トレンチの交差部分の壁面の間隔を、直線部の間隔より
も少なくとも狭く形成することが可能となるので、この
トレンチ内に充填材を充填した場合に充填材が充填され
ない空隙部がなくなり、トレンチ内に確実に充填材を充
填することが可能となる。
[Operation] That is, in the present invention, since it is possible to form the interval between the wall surfaces of the intersection part of the trench formed in the semiconductor substrate at least narrower than the interval of the straight part, the trench is filled with a filler material. In this case, there are no voids that are not filled with the filler, and it becomes possible to reliably fill the trench with the filler.

【0012】0012

【実施例】以下、図1及び図2により本発明による第1
及び第2の実施例のフォトマスクを、図3により本発明
の第1の実施例のフォトマスクを用いる一実施例の半導
体装置の製造方法を工程順に詳細に説明する。
[Example] Hereinafter, the first embodiment according to the present invention will be described with reference to FIGS. 1 and 2.
A method for manufacturing a semiconductor device according to an embodiment using the photomask according to the first embodiment of the present invention will be explained in detail in the order of steps with reference to FIG. 3.

【0013】図1は本発明による第1の実施例のフォト
マスクのパターンを示す図、図2は本発明による第2の
実施例のフォトマスクのパターンを示す図である。図1
に示す本発明の第1の実施例のフォトマスクにおいては
、トレンチのパターンのフォトマスク1の直線部の透過
部1bの距離がWの場合、トレンチの交差部分の透過部
1bの中央部に対辺距離がWの0.42倍の正方形の遮
光部1aが形成されている。
FIG. 1 is a diagram showing a pattern of a photomask according to a first embodiment of the present invention, and FIG. 2 is a diagram showing a pattern of a photomask according to a second embodiment of the present invention. Figure 1
In the photomask according to the first embodiment of the present invention shown in FIG. A square light shielding portion 1a whose distance is 0.42 times W is formed.

【0014】図2に示す本発明の第2の実施例のフォト
マスクにおいては、トレンチのパターンのフォトマスク
11の直線部の透過部11b の距離がWの場合、トレ
ンチの交差部分の透過部11b の中央部の壁面の間隔
がWよりも狭くなるように遮光部11a が形成されて
いる。
In the photomask according to the second embodiment of the present invention shown in FIG. 2, when the distance between the transparent portions 11b of the linear portions of the photomask 11 in the trench pattern is W, the transparent portions 11b of the trench intersection portions The light shielding part 11a is formed so that the interval between the wall surfaces at the center of the light shielding part 11a is narrower than W.

【0015】図3は本発明による一実施例の半導体装置
の製造方法を工程順に示す側断面図である。まず図3(
a) に示すように半導体基板2の表面にシリコン窒化
膜或いはPSG膜からなる絶縁膜3を形成し、この絶縁
膜3の表面にレジスト膜4を形成する。
FIG. 3 is a side sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps. First, Figure 3 (
a) As shown in FIG. 2, an insulating film 3 made of a silicon nitride film or a PSG film is formed on the surface of a semiconductor substrate 2, and a resist film 4 is formed on the surface of this insulating film 3.

【0016】つぎに図3(b) に示すように、フォト
マスク1を用いてこのレジスト膜4をパターニングして
開口窓4aを形成する。ついで図3(c) に示すよう
に、この開口窓4aが形成されているレジスト膜4をマ
スクとして絶縁膜3をエッチングして開口窓3aを形成
する。
Next, as shown in FIG. 3(b), this resist film 4 is patterned using a photomask 1 to form an opening window 4a. Next, as shown in FIG. 3(c), the insulating film 3 is etched using the resist film 4 in which the opening window 4a is formed as a mask to form the opening window 3a.

【0017】その後図3(d) に示すように、レジス
ト膜4を除去し、この開口窓3aが形成されている絶縁
膜3をマスクとして半導体基板2をエッチングしてトレ
ンチ2aを形成する。
Thereafter, as shown in FIG. 3(d), the resist film 4 is removed, and the semiconductor substrate 2 is etched using the insulating film 3 in which the opening window 3a is formed as a mask to form a trench 2a.

【0018】最後に図4(a) に示すように、このト
レンチ2aを含む半導体基板2の表面に下地として絶縁
膜を形成した後ポリシリコン膜を成長させるか、或いは
直接シリコン酸化膜を成長させて充填材5を充填し、図
4(b) に示すように半導体基板2の表面より上の充
填材5のみを除去して半導体基板2の表面を平面に仕上
げる。
Finally, as shown in FIG. 4(a), after forming an insulating film as a base on the surface of the semiconductor substrate 2 including the trench 2a, a polysilicon film is grown or a silicon oxide film is directly grown. Then, as shown in FIG. 4B, only the filler 5 above the surface of the semiconductor substrate 2 is removed to finish the surface of the semiconductor substrate 2 into a flat surface.

【0019】このようにトレンチ2aに相当するパター
ンの間隔がすべて直線部のトレンチ2aの間隔Wよりも
狭く形成されているフォトマスク1或いは11を用いて
トレンチ2aを形成するので、トレンチ2aの壁面の間
隔はすべてWと等しいか或いはW以下に形成されるよう
になり、このトレンチ2a内に充填材5を充填した場合
に、充填されない部分がなくなり、確実にトレンチ2a
内に充填材5を充填することが可能となる。
As described above, since the trench 2a is formed using the photomask 1 or 11 in which the intervals between the patterns corresponding to the trenches 2a are all narrower than the interval W between the trenches 2a in the straight portion, the wall surface of the trench 2a is formed using the photomask 1 or 11. All the intervals are equal to W or less than W, and when the trench 2a is filled with the filler 5, there is no unfilled part, and the trench 2a is reliably filled.
It becomes possible to fill the inside with the filler 5.

【0020】[0020]

【発明の効果】以上の説明から明らかなように、本発明
によれば極めて簡単な構成のフォトマスクを用いること
により、トレンチ内に充填材が充填されない空隙部が生
じるのを防止することが可能となる利点があり、著しい
品質向上の効果が期待できるフォトマスク及び半導体装
置の製造方法の提供が可能である。
[Effects of the Invention] As is clear from the above description, according to the present invention, by using a photomask with an extremely simple configuration, it is possible to prevent the formation of voids in the trench that are not filled with filler. It is possible to provide a method for manufacturing a photomask and a semiconductor device that can be expected to significantly improve quality.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】  本発明による第1の実施例のフォトマスク
のパターンを示す図、
FIG. 1 is a diagram showing a pattern of a photomask according to a first embodiment of the present invention;

【図2】  本発明による第2の実施例のフォトマスク
のパターンを示す図、
FIG. 2 is a diagram showing a pattern of a photomask according to a second embodiment of the present invention;

【図3】  本発明による一実施例の半導体装置の製造
方法を工程順に示す側断面図(1) 、
FIG. 3 is a side sectional view (1) showing a method for manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps;

【図4】  本発明による一実施例の半導体装置の製造
方法を工程順に示す側断面図(2) 、
FIG. 4 is a side sectional view (2) showing a method for manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps;

【図5】  従来のフォトマスクのパターンを示す図、
[Figure 5] Diagram showing the pattern of a conventional photomask,

【図6】  従来の半導体基板に形成したトレンチ内に
充填材を充填した状態を示す図、
[Fig. 6] A diagram showing a state in which a filler is filled in a trench formed in a conventional semiconductor substrate.

【符号の説明】[Explanation of symbols]

1,11はフォトマスク、 1a,11aは遮光部、 1b,11bは透過部、 2は半導体基板、 2aはトレンチ、 3は絶縁膜、 3aは開口窓、 4はレジスト膜、 4aは開口窓、 5は充填材、 1 and 11 are photomasks, 1a and 11a are light shielding parts; 1b and 11b are transparent parts, 2 is a semiconductor substrate; 2a is a trench, 3 is an insulating film, 3a is an opening window; 4 is a resist film; 4a is an opening window; 5 is a filler;

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】  半導体基板上の半導体素子を分離する
トレンチのパターンに相当するパターンを備えたフォト
マスクであって、前記トレンチが交差する部分の前記フ
ォトマスクのパターンで構成される間隔の面積が、直線
部のパターンの間隔の面積よりも狭く形成されているこ
とを特徴とするフォトマスク。
1. A photomask comprising a pattern corresponding to a pattern of trenches separating semiconductor elements on a semiconductor substrate, wherein the area of the interval formed by the pattern of the photomask at a portion where the trenches intersect is , a photomask characterized in that the linear portions are formed narrower than the area of the pattern intervals.
【請求項2】  トレンチを形成する半導体装置の製造
方法において、半導体基板(2) の表面に絶縁膜(3
) とレジスト膜(4) とを積層して形成する工程と
、請求項1記載のフォトマスクを用いて前記レジスト膜
(4) をパターニングして開口窓(4a)を形成する
工程と、該開口窓(4a)を形成したレジスト膜(4)
 をマスクとして前記絶縁膜(3) をエッチングして
開口窓(3a)を形成する工程と、前記レジスト膜(4
) を除去し、前記絶縁膜(3) をマスクとして前記
半導体基板(2) をエッチングしてトレンチ(2a)
を形成する工程と、前記絶縁膜(3)を除去し、前記ト
レンチ(2a)内に充填材(5)を充填する工程と、を
含むことを特徴とする半導体装置の製造方法。
2. In a method of manufacturing a semiconductor device in which a trench is formed, an insulating film (3) is formed on a surface of a semiconductor substrate (2).
) and a resist film (4), a step of patterning the resist film (4) using the photomask according to claim 1 to form an opening window (4a), and a step of forming the opening window (4a). Resist film (4) with window (4a) formed
etching the insulating film (3) using the mask as a mask to form an opening window (3a); and etching the resist film (4) as a mask.
) is removed, and the semiconductor substrate (2) is etched using the insulating film (3) as a mask to form a trench (2a).
A method for manufacturing a semiconductor device, comprising the steps of: forming a semiconductor device; and removing the insulating film (3) and filling the trench (2a) with a filler (5).
JP2600591A 1991-02-20 1991-02-20 Photomask and manufacture of semiconductor device Withdrawn JPH04264752A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2600591A JPH04264752A (en) 1991-02-20 1991-02-20 Photomask and manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2600591A JPH04264752A (en) 1991-02-20 1991-02-20 Photomask and manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH04264752A true JPH04264752A (en) 1992-09-21

Family

ID=12181584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2600591A Withdrawn JPH04264752A (en) 1991-02-20 1991-02-20 Photomask and manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH04264752A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010141231A (en) * 2008-12-15 2010-06-24 Renesas Electronics Corp Method for manufacturing semiconductor device, and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010141231A (en) * 2008-12-15 2010-06-24 Renesas Electronics Corp Method for manufacturing semiconductor device, and semiconductor device

Similar Documents

Publication Publication Date Title
JP4260396B2 (en) Semiconductor device and manufacturing method thereof
JP3024317B2 (en) Method for manufacturing semiconductor device
JPH03270227A (en) Formation of fine pattern
US7141507B2 (en) Method for production of a semiconductor structure
JPH08236526A (en) Method of making all surfaces of wafer for integrated circuit device global plane or flattening it
US5470782A (en) Method for manufacturing an integrated circuit arrangement
JPH06216085A (en) Method of forming contact hole of semiconductor device
KR20090096861A (en) Method of forming a mask pattern
JP2719897B2 (en) Phase inversion mask manufacturing method
JPH04264752A (en) Photomask and manufacture of semiconductor device
JPH01235245A (en) Semiconductor device
JPH04127148A (en) Mask and production of semiconductor device formed by using this mask
JP3203845B2 (en) Method of forming gate electrode
JP2748465B2 (en) Method for manufacturing semiconductor device
US5971768A (en) Methods of fabricating integrated circuit trench isolation regions
JPS6246543A (en) Manufacture of semiconductor device
JPS63258020A (en) Formation of element isolation pattern
KR100802221B1 (en) Method for forming semiconductor device
JPS63119239A (en) Manufacture of semiconductor device
JP2003197622A (en) Method for forming fine pattern of semiconductor element
JPH02189922A (en) Manufacture of semiconductor device
US20090311865A1 (en) Method for double patterning lithography
JPH05109719A (en) Manufacture of semiconductor device
JPH05136130A (en) Manufacture of semiconductor device
KR100247642B1 (en) Method for forming a contact hole in semiconductor device

Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19980514