JPH04264369A - Manufacture of full solid voltage memorizing element - Google Patents
Manufacture of full solid voltage memorizing elementInfo
- Publication number
- JPH04264369A JPH04264369A JP3024603A JP2460391A JPH04264369A JP H04264369 A JPH04264369 A JP H04264369A JP 3024603 A JP3024603 A JP 3024603A JP 2460391 A JP2460391 A JP 2460391A JP H04264369 A JPH04264369 A JP H04264369A
- Authority
- JP
- Japan
- Prior art keywords
- solid electrolyte
- electrolyte layer
- solid
- electrode
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000007787 solid Substances 0.000 title abstract description 7
- 239000007784 solid electrolyte Substances 0.000 claims abstract description 35
- 238000000034 method Methods 0.000 claims abstract description 11
- 238000000465 moulding Methods 0.000 claims description 7
- 239000000843 powder Substances 0.000 abstract description 18
- 239000007772 electrode material Substances 0.000 abstract description 16
- 239000003822 epoxy resin Substances 0.000 abstract description 6
- 229920000647 polyepoxide Polymers 0.000 abstract description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052799 carbon Inorganic materials 0.000 abstract description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 3
- 239000003973 paint Substances 0.000 abstract description 2
- 239000002689 soil Substances 0.000 abstract 1
- 229920005989 resin Polymers 0.000 description 12
- 239000011347 resin Substances 0.000 description 12
- 238000003860 storage Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 4
- 239000004570 mortar (masonry) Substances 0.000 description 3
- 238000007790 scraping Methods 0.000 description 3
- 239000007795 chemical reaction product Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- 229910017654 Ag0.7V2O5 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 description 1
- 229920001807 Urea-formaldehyde Polymers 0.000 description 1
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 description 1
- XHCLAFWTIXFWPH-UHFFFAOYSA-N [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[V+5].[V+5] XHCLAFWTIXFWPH-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229910000108 silver(I,III) oxide Inorganic materials 0.000 description 1
- RAVDHKVWJUPFPT-UHFFFAOYSA-N silver;oxido(dioxo)vanadium Chemical compound [Ag+].[O-][V](=O)=O RAVDHKVWJUPFPT-UHFFFAOYSA-N 0.000 description 1
- 229910001935 vanadium oxide Inorganic materials 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Conductive Materials (AREA)
- Secondary Cells (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、固体電解質を用いた全
固体電圧記憶素子の製造法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an all-solid-state voltage storage element using a solid electrolyte.
【0002】0002
【従来の技術】全固体電圧記憶素子は主として電極層/
固体電解質層/電極層の3層からなり、従来、全固体電
圧記憶素子はこれら3層を同一成形金型により積層加圧
して一体化することにより作製されていた。具体的には
、成形金型で固体電解質を加圧成形し、この成形金型の
上下より電極材料を配し、一体加圧成形により成形した
ものを金型内から取り出すことによって電極層/固体電
解質層/電極層からなる電圧記憶素子の本体を形成し、
その後、その本体の固体電解質層側面に付着した電極材
料を取り除くため、この固体電解質層の側面を削り、リ
ード端子をカーボンペーストを用いて接着し、さらに、
素子の破損、リード端子の剥離等の防止のため樹脂によ
る封止を行って全固体電圧記憶素子を製造していた。[Prior Art] All-solid-state voltage memory elements mainly consist of electrode layers/
It consists of three layers: a solid electrolyte layer/an electrode layer, and conventionally, all-solid-state voltage storage elements have been manufactured by laminating and pressing these three layers together using the same molding die. Specifically, a solid electrolyte is pressure-molded in a mold, electrode materials are placed on the top and bottom of this mold, and the electrode layer/solid is removed from the mold by integral pressure molding. Forming the main body of the voltage storage element consisting of an electrolyte layer/electrode layer,
After that, in order to remove the electrode material attached to the side surface of the solid electrolyte layer of the main body, the side surface of this solid electrolyte layer is scraped, the lead terminal is bonded using carbon paste, and further,
In order to prevent damage to the element and peeling of lead terminals, all-solid-state voltage memory elements were manufactured by sealing with resin.
【0003】0003
【発明が解決しようとする課題】しかしながら上記従来
の製造法では、全固体電圧記憶素子の本体を成形した後
、成形金型からその電圧記憶素子の本体を取り出す際、
固体電解質層の側面が成型金型の内壁に付着した電極材
料によって汚れ、両電極が短絡することが多い。したが
って成形体側面を削る必要があり、製造に多大な時間を
要するとともに、その本体側面を削る工程において本体
が破損するという課題があった。However, in the conventional manufacturing method described above, after the main body of the all-solid-state voltage memory element is molded, when the main body of the voltage memory element is taken out from the molding mold,
The side surfaces of the solid electrolyte layer are often contaminated by electrode material adhering to the inner wall of the mold, resulting in a short circuit between the two electrodes. Therefore, it is necessary to shave the side surface of the molded body, which takes a lot of time to manufacture, and there is a problem that the body is damaged in the process of scraping the side surface of the body.
【0004】本発明は上記課題を解決するものであり、
簡略化された工程で、信頼性に優れた全固体電圧記憶素
子を製造できる製造法を提供することを目的とするもの
である。[0004] The present invention solves the above problems,
The object of the present invention is to provide a manufacturing method capable of manufacturing an all-solid-state voltage memory element with excellent reliability using a simplified process.
【0005】[0005]
【課題を解決するための手段】本発明は上記目的を達成
するために、固体電解質層とそれを挾持する一対の電極
層とを樹脂製の円筒の中で加圧成形するものである。[Means for Solving the Problems] In order to achieve the above object, the present invention involves pressure-molding a solid electrolyte layer and a pair of electrode layers sandwiching the solid electrolyte layer in a resin cylinder.
【0006】[0006]
【作用】したがって本発明によれば、樹脂製の円筒の中
で加圧成形を行い、全固体電圧記憶素子の本体を外部へ
取り出すことがないため、成形用金型の内壁に付着した
電極材料粉が固体電解質層の側面に付着することがなく
、固体電解質層を介して上下に配する両電極間の短絡を
防止することができ、固体電解質層の側面を削る工程を
省略することができ、製造法を簡略化できる。[Operation] Therefore, according to the present invention, since pressure molding is performed in a resin cylinder and the main body of the all-solid-state voltage memory element is not taken out, the electrode material adhered to the inner wall of the molding die. Powder does not adhere to the side surfaces of the solid electrolyte layer, preventing short circuits between the two electrodes arranged above and below through the solid electrolyte layer, and eliminating the step of scraping the side surfaces of the solid electrolyte layer. , the manufacturing method can be simplified.
【0007】[0007]
【実施例】以下、本発明の一実施例における全固体電圧
記憶素子の製造法について図面とともに説明する。Embodiment A method of manufacturing an all-solid-state voltage memory element according to an embodiment of the present invention will be described below with reference to the drawings.
【0008】まず、AgI、Ag2O、WO3をモル比
で4:1:1の比となるように秤量し、アルミナ乳鉢で
混合する。この混合物を加圧成型し成形体とした後、パ
イレックス管に減圧封入し、400℃の温度で17時間
溶融、反応させる。その反応物をボールミルで湿式粉砕
、分級して200メッシュ以下の4AgI・Ag2WO
4で表される銀イオン導電性の固体電解質粉末を得た。[0008] First, AgI, Ag2O, and WO3 are weighed out in a molar ratio of 4:1:1 and mixed in an alumina mortar. This mixture was pressure-molded to form a molded body, which was then sealed in a Pyrex tube under reduced pressure and allowed to melt and react at a temperature of 400° C. for 17 hours. The reaction product was wet-pulverized in a ball mill and classified into 4AgI/Ag2WO of 200 mesh or less.
A silver ion conductive solid electrolyte powder represented by 4 was obtained.
【0009】次に、V2O5で表されるバナジウム酸化
物と金属銀の粉末をモル比で1:0.7となるよう秤量
し、乳鉢で混合する。その混合物を加圧成型して成形体
とした後、石英管中に減圧封入し、600℃の温度で4
8時間反応させる。その反応物を乳鉢で粉砕、分級して
200メッシュ以下のAg0.7V2O5で表される銀
バナジウム酸化物よりなる電極活物質粉末を得た。[0009] Next, vanadium oxide represented by V2O5 and metal silver powder are weighed so that the molar ratio is 1:0.7, and mixed in a mortar. The mixture was pressure-molded to form a molded body, then sealed in a quartz tube under reduced pressure and heated to 600℃ for 4 hours.
Allow to react for 8 hours. The reaction product was crushed in a mortar and classified to obtain an electrode active material powder made of silver vanadium oxide represented by Ag0.7V2O5 with a size of 200 mesh or less.
【0010】図1は本発明の一実施例における製造法を
説明するための全固体電圧記憶素子の断面を示すもので
あり、上記した準備段階で得られた固体電解質粉末と電
極活物質粉末を用いて、全固体電圧記憶素子を作製した
。最初に、固体電解質粉末と電極活物質粉末を混合して
、電極層中の電極活物質の含有量が30%となるように
電極材料を作製した。まず、上記固体電解質粉末を30
0mg秤量し、エポキシ樹脂などよりなる樹脂製の円筒
1中で2ton/cm2の圧力で加圧することにより、
固体電解質層2を形成する。次に電極材料20mgを2
部秤量し、樹脂製の円筒1の上下より固体電解質層2を
挾持するように入れ4ton/cm2の圧力で加圧する
ことにより2つの電極層3を形成する。次にこの2つの
電極層3にスズめっきした銅線4を導電性のカーボンペ
ースト5で接合し、2つの電極層3と樹脂製の円筒1の
上下の開口端との空隙部をエポキシ樹脂系の粉体塗料6
を用いて150℃の温度で充填した。FIG. 1 shows a cross section of an all-solid-state voltage memory element for explaining the manufacturing method in one embodiment of the present invention, and shows the solid electrolyte powder and electrode active material powder obtained in the above-mentioned preparatory stage. Using this method, an all-solid-state voltage memory element was fabricated. First, an electrode material was prepared by mixing a solid electrolyte powder and an electrode active material powder so that the content of the electrode active material in the electrode layer was 30%. First, add 30% of the above solid electrolyte powder.
By weighing 0 mg and pressurizing it at a pressure of 2 ton/cm2 in a resin cylinder 1 made of epoxy resin or the like,
A solid electrolyte layer 2 is formed. Next, add 20 mg of electrode material to 2
The solid electrolyte layer 2 is placed between the top and bottom of a resin cylinder 1 and pressurized at a pressure of 4 ton/cm 2 to form two electrode layers 3 . Next, tin-plated copper wires 4 are bonded to these two electrode layers 3 with conductive carbon paste 5, and the gaps between the two electrode layers 3 and the upper and lower open ends of the resin cylinder 1 are filled with epoxy resin. powder coating 6
was filled at a temperature of 150°C.
【0011】つぎに比較例として、従来の製造法により
全固体電圧記憶素子を作製した。まず、上記の実施例に
示す方法で得た固体電解質粉末と電極活物質粉末を混合
して電極層中の電極活物質を30%含有するように電極
材料を作製した。つぎに固体電解質粉末300mgを秤
量し2ton/cm2で加圧成形する。つぎに、電極材
料の30mgを2部秤量し、固体電解質層が成形されて
いる金型の上下より挿入し、4ton/cm2で一体加
圧成形した。この成形体を金型から取り出し、成形体の
上下の電極層にスズめっきした銅線を、導電性のカーボ
ンペーストで接合し、さらにその全体をエポキシ樹脂系
の粉体塗料を用い150℃の温度で封止した。Next, as a comparative example, an all-solid-state voltage memory element was manufactured using a conventional manufacturing method. First, an electrode material was prepared by mixing the solid electrolyte powder obtained by the method shown in the above example and the electrode active material powder so that the electrode layer contained 30% of the electrode active material. Next, 300 mg of solid electrolyte powder was weighed and pressure-molded at 2 tons/cm2. Next, two parts of 30 mg of the electrode material were weighed out, inserted into the mold in which the solid electrolyte layer had been formed from above and below, and integrally press-molded at 4 ton/cm2. This molded body is removed from the mold, tin-plated copper wires are bonded to the upper and lower electrode layers of the molded body using conductive carbon paste, and the entire body is coated with epoxy resin powder paint at a temperature of 150°C. It was sealed with.
【0012】上記の本発明の実施例および従来の製造法
により全固体電圧記憶素子のサンプルをそれぞれ100
個試作し、素子端部での短絡チェックを行うため、20
時間、100mVで定電圧充電し、それより2時間後の
保持電圧(記憶電圧)を調べた。その測定結果を図2に
示す。図2より明らかなように従来の製造法による比較
例では固体電解質層の側面での短絡により記憶電圧が急
速に低下している。それに対して実施例の製造法による
サンプルでは固体電解質層2の側面に短絡が発生しない
ため記憶電圧の低下は極めて少いことがわかる。[0012] 100 samples of all-solid-state voltage storage elements were prepared using the above-described embodiment of the present invention and the conventional manufacturing method.
In order to make a prototype and check for short circuits at the end of the element, we
The battery was charged at a constant voltage of 100 mV for 2 hours, and the holding voltage (memory voltage) was examined 2 hours later. The measurement results are shown in FIG. As is clear from FIG. 2, in the comparative example manufactured by the conventional manufacturing method, the storage voltage rapidly decreases due to a short circuit on the side surface of the solid electrolyte layer. On the other hand, it can be seen that in the sample manufactured by the manufacturing method of the example, no short circuit occurs on the side surface of the solid electrolyte layer 2, so that the decrease in storage voltage is extremely small.
【0013】なお本実施例において樹脂製の円筒1の樹
脂材料としてエポキシ樹脂を用いたが、エポキシ樹脂に
限らずフェノール樹脂、ユリア樹脂、塩化ビニル樹脂、
シリコーン樹脂を用いても同様の効果があることは言う
までもない。また樹脂製の円筒1の断面形状は円形以外
に三角形、四角形などの多角形であっても同様の効果が
あることは言うまでもない。Although epoxy resin was used as the resin material for the resin cylinder 1 in this embodiment, it is not limited to epoxy resin, but may also be used such as phenol resin, urea resin, vinyl chloride resin,
It goes without saying that the same effect can be obtained using silicone resin. It goes without saying that the same effect can be obtained even if the cross-sectional shape of the resin cylinder 1 is polygonal, such as a triangle or a quadrangle, in addition to a circle.
【0014】このように上記実施例によれば、樹脂製の
円筒1の中で電極層3と固体電解質層2を一体に加圧成
形しているために2つの電極層3間に短絡を生じること
なく、保持電圧が急速に低下することはなくなるという
効果が得られる。According to the above embodiment, since the electrode layer 3 and the solid electrolyte layer 2 are integrally pressure-molded in the resin cylinder 1, a short circuit occurs between the two electrode layers 3. Therefore, the effect that the holding voltage does not drop rapidly can be obtained.
【0015】[0015]
【発明の効果】上記実施例より明らかなように、本発明
は固体電解質層とその上下に電極層を有する全固体電圧
記憶素子の製造法において、従来の金型による成形法に
代えて樹脂製の円筒の中で固体電解質層とそれを挾持す
る2つの電極層を加圧成形しているため、全固体電圧記
憶素子の本体側面での短絡をなくすことができ、したが
ってその本体を成形した後、側面を削り取る工程を省略
することができるだけでなく、本体全体を粉体塗料で封
止する工程も必要とせず、信頼性に優れた全固体電圧記
憶素子を製造することができる。[Effects of the Invention] As is clear from the above examples, the present invention provides a method for manufacturing an all-solid-state voltage memory element having a solid electrolyte layer and electrode layers above and below the solid electrolyte layer. Because the solid electrolyte layer and the two electrode layers sandwiching it are pressure-molded inside the cylinder, it is possible to eliminate short circuits on the sides of the main body of the all-solid-state voltage memory element. Not only can the process of scraping the side surface be omitted, but also the process of sealing the entire body with powder coating is not required, and an all-solid-state voltage memory element with excellent reliability can be manufactured.
【図1】本発明の一実施例によって製造された全固体電
圧記憶素子の構造を示す断面図FIG. 1 is a cross-sectional view showing the structure of an all-solid-state voltage storage element manufactured according to an embodiment of the present invention.
【図2】本発明の一実施例および従来の製造法によって
製造された全固体電圧記憶素子の記憶電圧保持特性を比
較した特性図FIG. 2 is a characteristic diagram comparing the storage voltage retention characteristics of an all-solid-state voltage storage element manufactured by an embodiment of the present invention and a conventional manufacturing method.
1 樹脂製の円筒 2 固体電解質層 3 電極層 1. Resin cylinder 2 Solid electrolyte layer 3 Electrode layer
Claims (1)
電解質層を挾持して配される一対の電極層を具備する全
固体電圧記憶素子の製造法において、樹脂製の円筒の中
で前記固体電解質層と電極層とを加圧成形することを特
徴とする全固体電圧記憶素子の製造法。1. A method for manufacturing an all-solid-state voltage memory element comprising an ion-conductive solid electrolyte layer and a pair of electrode layers sandwiching the solid electrolyte layer, wherein the A method for manufacturing an all-solid-state voltage memory element, which comprises press-molding a solid electrolyte layer and an electrode layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3024603A JPH04264369A (en) | 1991-02-19 | 1991-02-19 | Manufacture of full solid voltage memorizing element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3024603A JPH04264369A (en) | 1991-02-19 | 1991-02-19 | Manufacture of full solid voltage memorizing element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04264369A true JPH04264369A (en) | 1992-09-21 |
Family
ID=12142728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3024603A Pending JPH04264369A (en) | 1991-02-19 | 1991-02-19 | Manufacture of full solid voltage memorizing element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04264369A (en) |
-
1991
- 1991-02-19 JP JP3024603A patent/JPH04264369A/en active Pending
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