JPH04260159A - Transmission method in power converter - Google Patents

Abstract

PURPOSE:To surely hold the control information related to a data transmission in the case abnormality is generated, with regard to a transmission system of a power converter in the case of informing turn-off of a power source, abnormality of a processor, etc. CONSTITUTION:When it is informed that abnormality is generated from a CPU 14 on the way of a data transmission, a transmission processing part 15a suspends a transmission processing, and also, sets a signal (a) to enable and informs generation of abnormality to an application processing part 15b. When this notice is received, the application processing part 15b stores a control parameter and RAS information for showing a transmission state immediately before the processing is suspended in an NV-RAM 16. Thereafter, when it is reset to a normal state, the transmission processing part 15a transmits again the same command as the command transmitted to the CPU 14, immediately before the transmission processing is suspended based on the control parameter and the RAG information stored in the NV-RAM 16.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission method for notifying a power supply abnormality, a processor abnormality, or the like in a power converter or other controlled object when the abnormality is detected.

0002

2. Description of the Related Art A system for controlling a power converter sometimes employs a multi-CPU system in which a plurality of CPUs are used to improve processing performance. In this case, multiple CPUs
Data transmission between them is often performed using a serial transmission method for reasons such as simplifying the configuration.

FIG. 8 is a configuration diagram of a control circuit for a conventional power converter that uses a multi-CPU system and performs data transmission between CPUs in a serial manner. As shown in FIG. 8, the control circuit includes a CPU that controls a power converter such as an inverter (not shown).
11, a CPU 12 that executes man-machine interface processing, etc., and a CPU 12 that executes control parameters and R during data transmission.
AS (reliability, availability)
NV-RAM (non-volatile memory) 13 for storing information and the like.

FIG. 9 is a more detailed circuit diagram of the control circuit. As shown in FIG. 9, the CPUs 11 and 12 are
A transmission processing unit 11a that performs serial data transmission, respectively.
, 12a, and monitoring of the transmission status between CPUs is carried out by C
PU12 is in charge.

[0005] Transmission control is performed by commercially available package software, which corresponds to the transmission processing units 11a and 12a. When the man-machine interface section 12c of the CPU 12 receives a data transmission instruction from the user, the application processing section 12b activates the transmission processing section 12a to start data transmission. When the transmission is completed, the result is sent back to the application processing section 12b.

FIGS. 10(A) to 10(C) and FIG. 11 are
FIG. 2 is an explanatory diagram of a conventional transmission method when transmitting data from the CPU 12 to the CPU 11. The top of each figure is C
The signals sent from the PU12 are shown, and the lower side is the CPU11.
It shows the signal sent from the

In the case of FIG. 10(A), for example, the CPU
12 sends command 1 to the CPU 11 (see FIG. 10).
(■) in A) When the CPU 11 normally receives the command 1, an ACK signal is sent back to the CPU 12 as a reception completion code (■ in (A)).

[0008] Upon receiving the ACK signal, the CPU 12 sends a code EOT indicating the end of command transmission.
It is transmitted to the PU 11 (■ in (A)). Next, another command, for example, command 2 that asks for an answer to command 1, is transmitted to the CPU 11 (■ in (A)).

In response, the CPU 11 transmits the obtained information to the CPU 12 (■ in (A)). CPU1
Upon receiving the information from 1, the CPU 12 transmits a reception completion code ACK (■ in (A)).

[0010] When the reception confirmation code is received, the CPU
11 transmits the transmission end code EOT to the CPU 12 (■ in (A)). Next, the CPU 12 transmits a code ENQ to the CPU 11 to inquire about the presence or absence of a data transmission request (■ in (A)). In response, the CPU 11 transmits some information to the CPU 12 (■ in (A))
.

[0011] In this case, even if the CPU 11 turns off the power or detects an abnormality in the CPU at the point (A) (■), that is, when the command 1 is transmitted from the CPU 12 to the CPU 11, the information will not be transmitted from the CPU 11 to the CPU 12. The abnormality information is not transmitted to the CPU 12 until point (A) (■).

In the case of FIG. 10(B), when command 1 is transmitted from the CPU 12 (■ in (B)), the CPU
11 returns the answer to the command ((B)
■). In response to this, the CPU 12 sends a code E indicating the end of transmission.
Transmit OT (■ in (B)).

[0013] Next, the CPU 12 transmits a code ENQ inquiring about the presence or absence of a data transmission request ((B)
). In response to this, the CPU 11 sends some information I2 to the CP
It is transmitted to U12 (■ in (B)).

[0014] In this case, suppose that at point (B) ■, CP
Even if U11 detects power off or CPU abnormality,
The abnormality information is not transmitted to the CPU 12 until the point in time (2) in (B) when information is transmitted from the CPU 11 to the CPU 12.

In the case of FIG. 10(C), when command 1 is transmitted from the CPU 12 (■ in (C)), the CPU
11 is the interrupt request code RV to interrupt the transmission.
Return I (■ in (C)).

[0016] The CPU 12 accepts this interruption request and transmits the transmission end code EOT to the CPU 11 ((C)
■). Furthermore, a code ENQ inquiring about the presence or absence of data transmission is transmitted (■ in (C)).

[0017] In response to this, the CPU 11 transmits some information I2 to the CPU 12 (■ in (C)). In this case, even if the CPU 11 detects the power off or a temporary abnormality of the CPU at the point (C) (2), the abnormality information is not transmitted to the CPU 12 until the point (C) (2).

Furthermore, FIG. 11 is a diagram showing the operation when a command is transmitted from the CPU 12 but a failure occurs in the CPU 11 and the command is not returned. In this case, if the CPU 12 transmits the command and the command is not returned from the CPU 11 even after a certain response waiting time (for example, 3 seconds) has elapsed, the system terminates abnormally and transmits the same command to the CPU 11 again. ing.

[0019]

[Problems to be Solved by the Invention] As described above, in the conventional transmission system, even if the CPU 11 that controls the power converter detects power off, CPU failure, etc. The abnormality information was not transmitted to the CPU 12 until the time came to transmit the information.

Therefore, even if an abnormality occurs such as power off or CPU failure, it takes a certain amount of time before the CPU 12 actually starts storing control information related to data transmission at the time of abnormality in NV-RAM etc. It takes a long time (for example, about 2 seconds),
For example, if there is an abnormality when the power is turned off, the voltage of the control circuit will drop during that time, and necessary control information (control parameters and RA
There was a problem in that it was no longer possible to save information such as S information.

Furthermore, even if an abnormality occurs, the normal state may be restored in a short time due to a temporary CPU failure, or even if the power is turned off, the normal voltage may be restored before the voltage supplied to the control circuit falls below the operable voltage. may return to.

For example, as shown in FIG. 11, when command 1 is transmitted from CPU 12 to CPU 11, CPU 11
When a temporary failure occurs, the CPU 11 cannot normally receive the command transmitted at that time, so the CPU 11 does not return a response to the command 1 to the CPU 12 even if the normal state is restored in a short time.

In such a case, in the conventional transmission system, C
The PU 12 issues the same command to the C for the first time after detecting that a certain response waiting time (generally about 3 seconds) has been exceeded.
It was supposed to be resent to PU11.

[0024] Therefore, in the conventional serial transmission system, it takes a long time to restart the transmission process even if there is a temporary abnormality. This poses a problem in terms of processing efficiency in systems that require real-time processing, such as power converters such as inverters.

An object of the present invention is to ensure that control information related to transmission can be saved even if an abnormality occurs during data transmission. Another purpose is to shorten the restart time of the system when the system returns to normal state.

[0026]

[Means for Solving the Problems] FIG. 1 is a diagram illustrating the principle of the present invention. a processor 1 that controls a power converter;
In a system comprising at least a processor 2 that monitors a transmission state and a memory 3 that stores control information, the processor 2 includes a transmission processing section 2a that transmits data between processors, and a transmission processing section 2a that performs data transmission between the processors. When the transmission processing unit 2a and the application processing unit 2b are configured to control the application processing unit 2b, at least when the power is turned off or an abnormality occurs in the processor, the signal line a that notifies the application processing unit 2b of the occurrence of an abnormality is connected to the transmission processing unit 2a and the application processing unit 2b.
It is set between.

[0027] When the power is turned off in the processor 1 or an abnormality is detected in the processor, the transmission processing unit 2a receives this abnormality information and notifies the application processing unit 2b of the occurrence of the abnormality through the signal line a. .

When an abnormality is notified through the signal line a, the application processing unit 2b generates control information (for example, control parameters,
RAS information, etc.) is stored in the memory 3.

[0029]

[Operation] In the present invention, when the power is turned off or an abnormality in the processor is detected, the application processing section 2b
Control information related to data transmission at that time is immediately stored in memory 3.
Saved in

When the normal state returns, for example, the command transmitted immediately before the occurrence of the abnormality is transmitted to the transmission processing unit 2 again based on the control information stored in the memory 3.
a to processor 1.

Therefore, even if an abnormality such as power off occurs, control information related to data transmission at the time of abnormality can be reliably saved before the power supply voltage falls below the minimum voltage at which the processor can operate. Furthermore, since the control information is saved before the power supply voltage drops, the reliability of the control information is also improved.

[0032]Furthermore, when the normal state is restored, the commands etc. that were transmitted immediately before the transmission process was interrupted can be retransmitted based on the above control information, thereby reducing the time required to restart the system. be able to.

[0033]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 2 is a configuration diagram of a control circuit of a power converter according to a first embodiment of the present invention. This control circuit is composed of two CPUs 14 and 15 like the conventional control circuit shown in FIG. 9. The CPU 14 is a processor that controls a power converter (not shown), and the CPU 15 monitors the transmission state It is a processor that performs

In FIG. 2, the transmission processing unit 15a
This is a circuit that performs data transmission with the transmission processing section 14a of U14. The application processing section 15b is a circuit that instructs the transmission processing section 15a to perform data transmission and the like.

In this embodiment, two signal lines a and b are connected between the application processing section 15b and the transmission processing section 15a.
is provided. Signal line a is a signal line for notifying the application processing unit 15b from the transmission processing unit 15a that an abnormality has occurred when the CPU 11 detects a failure, a drop in power supply voltage, etc.; This is a signal line for notifying the transmission processing section 15a from the processing section 15b to restart transmission processing.

Next, the operation of the above control circuit will be explained with reference to the operation diagrams of FIGS. 3 to 5. FIG. 3 is an explanatory diagram when an abnormality such as overcurrent or overvoltage is detected in the power converter during command transmission.

First, command 1 is transmitted from the CPU 15 to the CPU 14 (FIG. 3). If the CPU 14 detects an abnormality in the power converter while receiving this command, the CPU 14 sends failure data indicating the abnormality in the power converter.
5 (Fig. 3 ■).

When the transmission processing unit 15a of the CPU 15 receives this failure data, it interrupts the transmission process, and also enables the signal line a to notify the application processing unit 15b that an abnormality has occurred.

The application processing unit 15b receives the signal a
When it detects that the NV-RA is enabled, the control parameters and RAS information related to the transmission status at that time are
Store in M16.

As shown in FIG. 3, in this case, approximately 200ms after the abnormality in the power supply voltage is detected, the NV-RAM 16
Since control parameters and RAS information are stored in the memory, necessary control information is reliably saved.

Thereafter, when the CPU 14 detects that the power supply voltage has returned to normal and this information is notified to the transmission processing section 15a of the CPU 15, the transmission processing section 15a disables the signal a.

When the signal a from the transmission processing section 15a is disabled, the application processing section 15b enables the signal b and interrupts the transmission processing section 15a to restart the transmission process. At the same time, the application processing unit 15b transfers the control parameters and RAS information stored in the NV-RAM 16 to the transmission processing unit 15a.
send to

Note that when the normal state is restored, the signal line b
From the application processing unit 15b to the transmission processing unit 1
Instead of interrupting the transmission processing section 15a, the signal line d, which transmits commands to the transmission processing section 15a, may be used to give an instruction to restart the transmission processing. In this case, signal line b
becomes unnecessary.

The transmission processing unit 15a restarts the transmission process based on the control parameters and RAS information sent, and transmits the same command transmitted immediately before the process was interrupted to the CPU 14 again (FIG. 3). ).

[0045] As a result, processing can be restarted from the command transmitted immediately before the occurrence of an abnormality, so that the time required to restart the system can be shortened. Next, with reference to FIG. 4, the operation when an abnormality such as a drop in power supply voltage is detected during transmission of command 1 will be described.

First, command 1 is transmitted from the CPU 15 to the CPU 14 (FIG. 4). If, while receiving this command, the CPU 14 detects that the power supply voltage has fallen below the reference value, it transmits power-off data to the CPU 15 that indicates an abnormality in the power supply voltage instead of responding to the command (Fig. 4 ■).

When the transmission processing unit 15a of the CPU 15 receives this power-off data, it interrupts the transmission process, and further enables the signal line a to notify the application processing unit 15a that a power abnormality has occurred.

When the signal a becomes enabled, the application processing section 15b stores control parameters and RAS information relating to the transmission state at that time in the NV-RAM 16.

As shown in FIG. 4, in this case, approximately 200 ms after the abnormality in the power supply voltage is detected, the NV-RAM 16
Since control parameters and RAS information are stored in the CPU, necessary control information can be reliably stored before the power supply voltage decreases and falls below the minimum operating voltage of the CPU.

Thereafter, when the CPU 14 detects that the power supply voltage has returned to normal, the transmission processing section 15a of the CPU 15 is notified of this information. Upon receiving this information, the transmission processing section 15a disables the signal a.

When the signal a is disabled, the application processing section 15b enables the signal b and interrupts the transmission processing section 15a to restart the transmission process. At the same time, the application processing section 15b sends the control parameters and RAS information stored in the NV-RAM 16 to the transmission processing section 15a.

The transmission processing unit 15a restarts the transmission process based on the control parameters and RAS information that are sent, and transmits the same command that was issued immediately before the power was turned off to the CPU 14 again (FIG. 3). ).

In this case, at the time when the power off data is sent from the CPU 14, the transmission processing section 15a notifies the application processing section 15b of the occurrence of an abnormality, and the control information related to the transmission state at that time is stored in the NV-RAM 16. Therefore, control information when an abnormality occurs is reliably saved.

Next, the operation when a CPU abnormality is detected during the transmission of command 1 will be explained with reference to FIG. First, command 1 is transmitted from the CPU 15 to the CPU 14 (
Figure 5 ■).

[0055] While receiving this command, the CP
When the U 14 detects its own failure, the CPU 14 transmits an abnormality code (FIG. 5). Upon receiving this abnormality code, the transmission processing unit 15a of the CPU 15:
The transmission process is interrupted, and the signal a is enabled to notify the application processing unit 15b that an abnormality has occurred.

[0056] In response to this, the application processing unit 15
b saves the control parameters and RAS information at that time to NV-
Store it in RAM16. Thereafter, when the CPU returns to the normal state, the application processing section 15b
5a to restart the transmission process. At the same time, the control parameters and RAS information at the time of failure stored in the MV-RAM 16 are sent to the transmission processing section 15a.

The transmission processing unit 15a retransmits the same command to the CPU 14 as the command transmitted immediately before the failure occurred, based on the control parameters and RAS information sent from the application processing unit 15b (FIG. 5 (2)).

[0058] As a result, even if a CPU failure is detected, processing is restarted from the command transmitted immediately before the failure occurred, thereby reducing the time it takes to restart the system when recovering from a failure. can.

Next, FIG. 6 is a block diagram of a control circuit for a power converter according to a second embodiment of the present invention. In this embodiment, there is a signal line c for notifying the application processing section 15b and transmission processing section 15a of the CPU 15 that an abnormality has occurred, and a signal line c for notifying the application processing section 15b and transmission processing section 15a of the CPU 15 that an abnormality has occurred, and a signal line c for notifying the application processing section 15b and transmission processing section 15a of the CPU 15, and a signal line c for notifying the application processing section 15b and transmission processing section 15a of the CPU 15 that an abnormality has occurred. Two signal lines are provided, including a signal line b for interrupting the signal line 15a. The rest of the circuit configuration in FIG. 6 is the same as that in FIG. 2.

Next, referring to FIG. 7, an explanation will be given of the operation when the CPU 14 detects power off or a failure of its own CPU while transmitting a command. First, the CPU
15 transmits command 1 to the CPU 14 (FIG. 7).

[0061] If any abnormality such as power off is detected during reception of this command, the CPU 14 enables the signal c. When this signal c becomes enabled, the application processing unit 15b controls the control parameters at that time,
Store RAS information in NV-RAM 16. At the same time, the transmission processing unit 15a interrupts the transmission process.

After that, when the normal state is restored, CPU1
4 disables signal c. When the signal c is disabled, the application processing section 15b enables the signal b and interrupts the transmission processing section 15a to restart the transmission process. At the same time, the application processing unit 15b transfers the control parameters and RAS information stored in the NV-RAM 16 to the transmission processing unit 15a.
send to

[0063] The transmission processing unit 15a then retransmits the same command that was transmitted immediately before the occurrence of the abnormality to the CPU 14 based on the control parameters and RAS information (
Figure 7 ■).

In this second embodiment, the CPU 14 and the CPU
Since the signal line c for notifying the occurrence of an abnormality is provided between the CPU 15 and the NV-RAM 15, when an abnormality occurs, the CPU 15 can immediately store control information related to the transmission state in the NV-RAM 16 and interrupt the transmission process.

Therefore, even if an abnormality such as power off occurs, control information indicating the transmission state at the time of the abnormality is reliably saved. Furthermore, even when the normal state returns from an abnormal state, the transmission process is immediately restarted, and the same command that was transmitted immediately before the abnormality occurred is retransmitted, reducing the time required to restart the system. Become.

The configuration of the control circuit of the power converter is not limited to the example described in the embodiment, and the transmission method of the present invention can be applied to control circuits with various configurations. Furthermore, the present invention is applicable not only to serial transmission systems but also to parallel transmission systems. moreover,
The present invention can be applied not only to control of power converters but also to control of other controlled objects.

[0067]

[Effects of the Invention] According to the present invention, even if an abnormality such as power off occurs, control information related to data transmission can be reliably saved before the power supply voltage drops below the minimum voltage at which the processor can operate. can. Furthermore, the reliability of the control information stored at that time can be improved.

Furthermore, when the normal state returns, the commands etc. that were transmitted immediately before interrupting the transmission process can be immediately retransmitted based on the control information stored in the memory, so that the system Restarting can be done quickly.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention.

FIG. 2 is a configuration diagram of a control circuit of a power converter according to a first embodiment.

FIG. 3 is an explanatory diagram of the operation when an abnormality in the power converter is detected.

FIG. 4 is an explanatory diagram of the operation when the power is turned off.

FIG. 5 is an explanatory diagram of operations when a CPU abnormality occurs.

FIG. 6 is a configuration diagram of a control circuit of a power converter according to a second embodiment.

FIG. 7 is an explanatory diagram of the operation of the second embodiment.

FIG. 8 is a configuration diagram of a control circuit of a conventional power converter.

FIG. 9 is a more detailed configuration diagram of the control circuit of FIG. 1;

FIG. 10 is an explanatory diagram of a conventional transmission method.

FIG. 11 is an explanatory diagram of a conventional transmission method.

[Explanation of symbols]

1, 2 Processor 2a Transmission processing section 2b Application processing section 3
memory

Claims (6)

[Claims] Claim 1: A processor (1) that controls a power converter.
and at least a processor (2) that monitors the transmission status.
) and a memory (3) that stores control information, the processor (2) that monitors the transmission state has a transmission processing section (2a) that transmits data between the processors, and a memory (3) that stores control information. When the processing unit (2a) is configured with an application processing unit (2b) that controls the processing unit (2a), at least when the power is turned off or an abnormality occurs in the processor, the occurrence of the abnormality is detected by the application processing unit (2b).
) is provided between the transmission processing section (2a) and the application processing section (2b), and when an abnormality occurs, the transmission processing section (2a) uses the signal line a to notify the application processing section ( 2b), and when notified of the occurrence of an abnormality through signal line a, the application processing unit (2b) stores at least control information related to data transmission at the time of abnormality in the memory (3). A transmission method in a power converter characterized by storing. Claim 2: A processor (1) that controls a power converter.
and at least a processor (2) that monitors the transmission status.
) and a memory (3) for storing control information, a signal line c is provided between the processor (1) and the processor (2) to notify the occurrence of an abnormality.
the processor (2) which monitors the transmission state;
is a transmission processing unit (2a) that transmits data between processors.
) and an application processing section (2b) that controls this transmission processing section (2a), when the occurrence of an abnormality is notified through the signal line c, the application processing section (2b) A transmission method in a power converter, characterized in that at least control information related to data transmission when an abnormality occurs is stored in the memory (3). 3. When resuming transmission processing after returning from an abnormal state to a normal state, processing can be performed retroactively to the point in time when the transmission processing was normally completed, based on the control information stored in the memory (3). Claim 1 characterized in that:
Or the transmission method in the power converter according to 2. Claim 4: A processor (1) that controls a controlled object.
and at least a processor (2) that monitors the transmission status.
) and a memory (3) that stores control information, the processor (2) that monitors the transmission state has a transmission processing section (2a) that transmits data between the processors, and a memory (3) that stores control information. When the processing unit (2a) is configured with an application processing unit (2b) that controls the processing unit (2a), at least when the power is turned off or an abnormality occurs in the processor, the occurrence of the abnormality is detected by the application processing unit (2b).
) is provided between the transmission processing section (2a) and the application processing section (2b), and when an abnormality occurs, the transmission processing section (2a) uses the signal line a to notify the application processing section ( 2b), and when notified of the occurrence of an abnormality through signal line a, the application processing unit (2b) stores at least control information related to data transmission at the time of abnormality in the memory (3). A transmission method characterized by storing. Claim 5: A processor (1) that controls a controlled object.
and at least a processor (2) that monitors the transmission status.
) and a memory (3) for storing control information, a signal line c is provided between the processor (1) and the processor (2) to notify the occurrence of an abnormality.
the processor (2) which monitors the transmission state;
is a transmission processing unit (2a) that transmits data between processors.
) and an application processing section (2b) that controls this transmission processing section (2a), when the occurrence of an abnormality is notified through the signal line c, the application processing section (2b) A transmission method characterized in that at least control information related to data transmission when an abnormality occurs is stored in the memory (3). 6. When returning from an abnormal state to a normal state and restarting the transmission process, the transmission process can be traced back to the point in time when the transmission process was normally completed based on the control information stored in the memory (3) in item 10. 6. The transmission method according to claim 4, further comprising restarting the processing.