JPH04259866A - Diagnosing apparatus - Google Patents

Abstract

PURPOSE:To enable high-speed collection of data in the case when data contents of register groups are read out by a scan path and collected when internal faults occur in a plurality of LSIs. CONSTITUTION:Error indicators 38 and 39 indicating occurrence of errors are provided so that they correspond to LSIs 30 and 31 respectively. When the error indicators are lighted, only the contents of register groups in the LSIs to which the lighted indicators correspond are read out by selectors 40 and 41 as a scan path construction, while register groups in other LSIs are bypassed by the selectors 40 and 41, so as to be disjoined from the scan path construction. Since a scan path 3 is constructed only of the register groups 35 and 36 in the LSIs wherein faults take place, the number of clocks for a scanning operation is lessened thereby and high-speed collection of data is enabled.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diagnostic device, and more particularly to a diagnostic device used for failure analysis of integrated circuit devices.

0002

[Prior Art] In conventional diagnostic equipment, in order to analyze a failure when a failure occurs, all registers to be scanned are connected in series to form a scan path configuration, and data collection is performed by controlling the scan operation of this scan path. It is supposed to be done.

FIG. 2 is a schematic block diagram of such a conventional diagnostic device. Each of the plurality of LSIs 30 to 32 is provided with a register group 35 to 37 that can be configured with a scan path, and by connecting all these register groups 35 to 37 in series, the diagnostic scan paths 3 and 5 are formed. It is now possible to do so.

The scan control section 35 generates a scan mode signal 2 based on the diagnosis instruction signal 80 from the diagnosis section 34, and instructs the formation of a scan path by each register group 35-37. As a result, data input from the data path 90 to the scan control unit 33 is transmitted via the scan path 3 to the L
Scan path by register group 35 of SI30, LSI
Scan path by 31 register groups 36, LSI 32
It is led out to the scan path control unit 33 via the scan path by the register group 37 and further through the scan path 5.

[0005] The scan path control section 33 notifies the diagnosis section 34 of sending scan data using a scan control section signal 81, and transfers the data collected from the data path 91 to the diagnosis section 34.

[0006] In such a conventional diagnostic device, diagnostic data is collected from all LSI registers using a single serial scan path, so the drawback is that the number of registers to be scanned is large, and therefore it takes time to collect data. There is.

[0007]

OBJECTS OF THE INVENTION The present invention has been made to solve these drawbacks of the conventional devices, and its purpose is to provide a diagnostic device that can reduce the time required to collect diagnostic data. It is about providing.

[0008]

According to the present invention, each register group of a plurality of integrated circuit devices has a scan path configuration, and further these register groups having the scan path configuration are connected in series to form a diagnostic scan path. A diagnostic device is configured to diagnose a circuit by scanning output through a scanning operation using a diagnostic scan path, the diagnostic device comprising: an error indicator provided in each of the integrated circuits to indicate the occurrence of an error within the corresponding integrated circuit; A diagnostic device comprising: control means for scanning out and reading out the contents of a register group of only the integrated circuit corresponding to the error indicator using a diagnostic scan path when at least one of the indicators is lit. is obtained.

[0009]

Embodiments Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and parts equivalent to those in FIG. 2 are designated by the same reference numerals. In this example, only two LSIs are shown, but the same applies to three or more LSIs.

Each LSI 30, 31 is provided with an error indicator 38, 39 that indicates the occurrence of an internal error in the corresponding LSI. The contents 10 and 20 of the error indicators 38 and 39 are both notified to the scan control section 33 and also serve as selection instruction signals for the selectors 40 and 41 of the corresponding LSI.

Each selector 40, 41 corresponds to a register group 3.
5, 36 output paths 12, 22 and corresponding register group 35,
This is for selecting one of the 36 input paths 11 and 21 and connecting it to the diagnostic scan paths 3, 4, and 5.

When the error indicators 38 and 39 of all the LSIs 30 and 31 are off (when no error has occurred in all of the LSIs), the diagnostic section 34 instructs the scan control section 33 to perform a scan operation using the diagnosis instruction signal 80. When the scan control unit 33 outputs the all LSI scan signal 1 and the scan mode signal 2 to all LSIs, the registers inside all LSIs are scanned for a clock cycle corresponding to the number of bits for all the registers. Scanning operations for groups 35 and 36 are performed.

That is, in this case, each selector 40, 4
1 is operating to select each output 12, 22 of register groups 35, 36, respectively, all register groups 35
, 36 will be connected in series to the diagnostic scan path. This makes it possible to scan out all registers.

Next, a case where an LSI internal failure occurs will be explained. For example, if a failure occurs inside the LSI 30, when the corresponding error indicator 38 lights up, the inside of the LSI 30 is stopped, and at the same time, the output 10 of this indicator 38 notifies the scan control unit 33 of the occurrence of the failure. be done.

The scan control section 33 notifies the diagnosis section 34 of the occurrence of a failure using a scan control section signal 81. In response, the diagnostic unit 34 sends a diagnostic instruction signal 80 to the scan control unit 33 to instruct it to start a scan operation.

When the scan is started, the scan control section generates the scan mode signal 2 only for a clock cycle corresponding to the number of bits in the register group 35 inside the LSI 30 whose error indicator is lit.

[0018] In the LSI 30, the error indicator 38
The selector 40 selects the output path 12 of the register group 35 based on the output of
6 input path 21 is selected. That is, the register group of only the LSI whose error indicator is lit becomes the scan path configuration, and the register groups of other LSIs are bypassed from the scan path and do not form the scan path configuration.

The scan control unit 33 instructs the diagnosis unit 34 to transfer the data collected by the scan operation.
notification by transmitting a scan control unit signal 81;
The collected data is transferred to the diagnostic unit via the scan-out data path 91.

[0020]

As described above, according to the present invention, if a faulty LSI exists, a scan path is constructed from only the register group of that LSI, and the register groups of other LSIs are bypassed from the scan path. Therefore, the data contents of the register group of only the LSI in which the failure has occurred can be collected, and there is an effect that high-speed data collection is possible.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram of an embodiment of the present invention.

FIG. 2 is a circuit block diagram of a conventional diagnostic device.

[Explanation of symbols]

1 All LSI scan signals 2 Scan mode signal 3-5 Diagnostic scan path 30~32 LSI 33 Scan control section 34 Diagnosis Department 38, 39 Error indicator 35-37 Register group 40, 41 Selector

Claims (1)

[Claims] Claim 1: Each register group of a plurality of integrated circuit devices has a scan path configuration, and the register groups having the scan path configuration are connected in series to form a diagnostic scan path, and a scan operation using the diagnostic scan path is performed. A diagnostic device configured to diagnose a circuit by scanning output from the integrated circuit, wherein an error indicator is provided in each of the integrated circuits and indicates the occurrence of an error inside the corresponding integrated circuit, and at least one of the error indicators is displayed. A diagnostic device comprising control means for scanning out and reading out the contents of a register group of only the integrated circuit corresponding to the error indicator using a diagnostic scan path when the error indicator is lit.