JPH04257106A - Current-voltage converting circuit - Google Patents

Current-voltage converting circuit

Info

Publication number
JPH04257106A
JPH04257106A JP3017990A JP1799091A JPH04257106A JP H04257106 A JPH04257106 A JP H04257106A JP 3017990 A JP3017990 A JP 3017990A JP 1799091 A JP1799091 A JP 1799091A JP H04257106 A JPH04257106 A JP H04257106A
Authority
JP
Japan
Prior art keywords
current
voltage
circuit
terminal
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3017990A
Other languages
Japanese (ja)
Inventor
Osamu Yamane
修 山根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3017990A priority Critical patent/JPH04257106A/en
Publication of JPH04257106A publication Critical patent/JPH04257106A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To use a circuit even in a high frequency area without restrictions on band due to an operational amplifier by not using the operational amplifier to constitute the circuit. CONSTITUTION:The voltage to the ground of an input terminal 1 of a bias circuit 6 is 0V, and the bias circuit 6 gives the bias voltage which flows an idle current to transistors TRs 4 and 5. When a current flows from the input terminal 1, the collector current of the TR 5 is increased or reduced in proportion to increase or reduction of the input current, and the collector current of the TR 4 is reduced or increased contrarily. The voltage drop of load resistors 2 and 3 is changed by the change of respective collector currents. This voltage change is outputted to an output terminal 11 through two emitter follower circuits consisting of TRs 7 and 9 and level shift circuits 9 and 10.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は電流電圧変換回路に関し
、特に高速性を要求される電流電圧変換回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current-voltage conversion circuit, and more particularly to a current-voltage conversion circuit that requires high speed performance.

【0002】0002

【従来の技術】従来の電流電圧変換回路は、図2に示す
ように、負側入力を入力端子23に接続し出力を出力端
子24に接続した演算増幅器21と、この演算増幅器2
1の出力及び負側入力の間に接続された帰還抵抗器22
とを有している。
2. Description of the Related Art As shown in FIG. 2, a conventional current-voltage conversion circuit includes an operational amplifier 21 whose negative side input is connected to an input terminal 23 and whose output is connected to an output terminal 24;
A feedback resistor 22 connected between the output of 1 and the negative input.
It has

【0003】この回路で、演算増幅器21の増幅度が極
めて大きい場合、出力電圧V0は、 V0=−i・Rf 但し、i=入力端子23に与えられる入力電流値。Rf
=帰還抵抗器22の抵抗値。
In this circuit, when the amplification degree of the operational amplifier 21 is extremely large, the output voltage V0 is as follows: V0=-i·Rf where i=the input current value given to the input terminal 23. Rf
=Resistance value of feedback resistor 22.

【0004】というように表わせるから、電流電圧変換
回路として動作する。
Since it can be expressed as follows, it operates as a current-voltage conversion circuit.

【0005】[0005]

【発明が解決しようとする課題】この従来の電流電圧変
換回路では、使用される演算増幅器の増幅度が極めて大
きいことを仮定しているから、高周波領域など演算増幅
器の性能を維持できない領域では、電流電圧変換回路を
実現することは困難であった。
[Problems to be Solved by the Invention] This conventional current-to-voltage conversion circuit assumes that the amplification degree of the operational amplifier used is extremely large. It has been difficult to realize a current-voltage conversion circuit.

【0006】[0006]

【課題を解決するための手段】本発明の電流電圧変換回
路は、入力される電流値を電圧に変換して出力する電流
電圧変換回路であって、エミッタ端子を入力端子に接続
しベース端子をバイアス回路に接続しコレクタ端子を第
1の負荷抵抗器を介して正電源に接続したNPN型の第
1のトランジスタと、エミッタ端子を前記入力端子に接
続しベース端子をバイアス回路に接続しコレクタ端子を
第2の負荷抵抗器を介して負電源に接続したPNP型の
第2のトランジスタとを備え、前記入力端子に与えられ
る電流値に比例した電圧降下を前記第1及び第2の負荷
抵抗器に発生させる構成である。
[Means for Solving the Problems] The current-voltage conversion circuit of the present invention is a current-voltage conversion circuit that converts an input current value into a voltage and outputs the voltage, and has an emitter terminal connected to an input terminal and a base terminal connected to the voltage. a first NPN transistor connected to a bias circuit and having its collector terminal connected to a positive power supply via a first load resistor; an NPN type first transistor having an emitter terminal connected to the input terminal and a base terminal connected to the bias circuit; a PNP type second transistor connected to a negative power supply via a second load resistor, and a voltage drop proportional to the current value applied to the input terminal is applied to the first and second load resistors. This is a configuration that generates

【0007】[0007]

【実施例】次に、本発明について図面を参照して説明す
る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

【0008】図1は本発明の一実施例のブロック図であ
る。バイアス回路6は、入力端子1の対地間電圧が0V
となり、かつ、負荷抵抗器2を介して正電源(VCC)
に接続されたNPN型のトランジスタ4と、負荷抵抗器
4を介して負電源(VEE)に接続されたPNP型のト
ランジスタ5とにアイドル電流を流すようなバイアス電
圧をトランジスタ4及びトランジスタ5のベース端子に
与える。
FIG. 1 is a block diagram of one embodiment of the present invention. In the bias circuit 6, the voltage between the input terminal 1 and the ground is 0V.
and the positive power supply (VCC) through load resistor 2.
A bias voltage is applied to the bases of the transistors 4 and 5 so that an idle current flows through the NPN transistor 4 connected to the load resistor 4 and the PNP transistor 5 connected to the negative power supply (VEE) through the load resistor 4. Give it to the terminal.

【0009】入力端子1から本回路に電流を流すと、そ
の流入電流と、トランジスタ4のエミッタ電流と、トラ
ンジスタ5のコレクタ電流との総和が0となるように、
トランジスタ4のコレクタ電流が入力電流に比例して減
少し、トランジスタ5のコレクタ電流は増加する。
When a current flows into this circuit from the input terminal 1, the sum of the inflow current, the emitter current of the transistor 4, and the collector current of the transistor 5 becomes 0.
The collector current of transistor 4 decreases in proportion to the input current, and the collector current of transistor 5 increases.

【0010】一方、本回路の入力端子1から電流が流出
する場合は、その電流値に比例して、トランジスタ4の
コレクタ電流は増加し、トランジスタ5のコレクタ電流
は減少する。
On the other hand, when a current flows out from the input terminal 1 of this circuit, the collector current of the transistor 4 increases and the collector current of the transistor 5 decreases in proportion to the current value.

【0011】トランジスタ4及びトランジスタ5のコレ
クタ電流の変化に伴って、それぞれの負荷抵抗器2及び
負荷抵抗器3の電圧降下も変化する。これらの電圧変化
を、トランジスタ7及びレベルシフト回路9で構成され
るエミッタ・フォロア回路と、トランジスタ8及びレベ
ルシフト回路9で構成されるエミッタ・フォロア回路と
を通して出力端子11に出力することにより、電流電圧
変換が行なわれる。
As the collector currents of the transistors 4 and 5 change, the voltage drops across the respective load resistors 2 and 3 also change. By outputting these voltage changes to the output terminal 11 through an emitter follower circuit composed of a transistor 7 and a level shift circuit 9, and an emitter follower circuit composed of a transistor 8 and a level shift circuit 9, a current is generated. A voltage conversion is performed.

【0012】0012

【発明の効果】以上説明したように本発明は、電流電圧
変換回路を演算増幅器による帯域の制限を受けずに実現
でき、高周波領域においても使用できるという効果があ
る。
As described above, the present invention has the advantage that a current-voltage conversion circuit can be realized without being limited by the band of an operational amplifier, and can be used even in a high frequency region.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】本発明の一実施例のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.

【図2】従来の電流電圧変換回路の一例のブロック図で
ある。
FIG. 2 is a block diagram of an example of a conventional current-voltage conversion circuit.

【符号の説明】[Explanation of symbols]

1    入力端子 2,3    負荷抵抗器 4,5,7,8    トランジスタ 6    バイアス回路 9,10    レベルシフト回路 11    出力端子 1 Input terminal 2, 3 Load resistor 4, 5, 7, 8 Transistor 6 Bias circuit 9,10 Level shift circuit 11 Output terminal

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  入力される電流値を電圧に変換して出
力する電流電圧変換回路であって、エミッタ端子を入力
端子に接続しベース端子をバイアス回路に接続しコレク
タ端子を第1の負荷抵抗器を介して正電源に接続したN
PN型の第1のトランジスタと、エミッタ端子を前記入
力端子に接続しベース端子をバイアス回路に接続しコレ
クタ端子を第2の負荷抵抗器を介して負電源に接続した
PNP型の第2のトランジスタとを備え、前記入力端子
に与えられる電流値に比例した電圧降下を前記第1及び
第2の負荷抵抗器に発生させることを特徴とする電流電
圧変換回路。
1. A current-voltage conversion circuit that converts an input current value into a voltage and outputs the voltage, the emitter terminal being connected to the input terminal, the base terminal being connected to a bias circuit, and the collector terminal being connected to a first load resistor. N connected to the positive power supply through the
a first transistor of PN type; and a second transistor of PNP type, having an emitter terminal connected to the input terminal, a base terminal connected to a bias circuit, and a collector terminal connected to a negative power supply via a second load resistor. A current-voltage conversion circuit comprising: generating a voltage drop in the first and second load resistors in proportion to a current value applied to the input terminal.
JP3017990A 1991-02-08 1991-02-08 Current-voltage converting circuit Pending JPH04257106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3017990A JPH04257106A (en) 1991-02-08 1991-02-08 Current-voltage converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3017990A JPH04257106A (en) 1991-02-08 1991-02-08 Current-voltage converting circuit

Publications (1)

Publication Number Publication Date
JPH04257106A true JPH04257106A (en) 1992-09-11

Family

ID=11959162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3017990A Pending JPH04257106A (en) 1991-02-08 1991-02-08 Current-voltage converting circuit

Country Status (1)

Country Link
JP (1) JPH04257106A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06232651A (en) * 1993-01-29 1994-08-19 Akai Electric Co Ltd Current-voltage conversion circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06232651A (en) * 1993-01-29 1994-08-19 Akai Electric Co Ltd Current-voltage conversion circuit

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