JPH04256882A - Sending pulse generation circuit in pulse radar - Google Patents

Sending pulse generation circuit in pulse radar

Info

Publication number
JPH04256882A
JPH04256882A JP3017752A JP1775291A JPH04256882A JP H04256882 A JPH04256882 A JP H04256882A JP 3017752 A JP3017752 A JP 3017752A JP 1775291 A JP1775291 A JP 1775291A JP H04256882 A JPH04256882 A JP H04256882A
Authority
JP
Japan
Prior art keywords
control
pulse
signal
circuit
pulse generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3017752A
Other languages
Japanese (ja)
Other versions
JP2618097B2 (en
Inventor
Tomohiko Suzuki
智彦 鈴木
Tetsuya Shirotsu
白津 哲哉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furuno Electric Co Ltd
Original Assignee
Furuno Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furuno Electric Co Ltd filed Critical Furuno Electric Co Ltd
Priority to JP3017752A priority Critical patent/JP2618097B2/en
Publication of JPH04256882A publication Critical patent/JPH04256882A/en
Application granted granted Critical
Publication of JP2618097B2 publication Critical patent/JP2618097B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To generate pulselike wave having an arbitrary envelope of mild ascent or decent at a pulse radar. CONSTITUTION:A timing control circuit 2 to generate a multitude of control triggar signals b1 to b5 with different timings by receiving a basic triggar signal (a), control pulse generation circuits 31 to 35 to generate control pulses c1 to c5 constituted of rectangular wave signal by receiving each control triggar signal, and driving circuits 41 to 45 to drive a load 5 by each control pulse constitute a transmission pulse generation circuit 100. By this, depending on the relation between the generation timing of the control triggar signal b1 to b5 and the duration time of the control pulse cl to c5, a current signal with mild ascent or decent is supplied to a magnetron 6.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】この発明は、パルスレーダにおい
てパルス状電波を発生させるための送信パルス発生回路
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmission pulse generation circuit for generating pulsed radio waves in a pulse radar.

【0002】0002

【従来の技術】パルス状の電波を発射し、その電波が帰
来するまでの時間によって物標までの距離を測定するパ
ルスレーダにおいて、その送信部は一般に高圧電源回路
、送信パルス発生回路およびマグネトロンから構成され
ている。送信パルス発生回路は、トリガ信号を受けて一
定パルス幅でパルストランスを駆動するもので、従来よ
りLC回路によるパルス成形回路、ハードチューブまた
はFETなどが用いられている。
[Prior Art] In a pulse radar that emits pulsed radio waves and measures the distance to a target by the time it takes for the radio waves to return, the transmitting section is generally connected to a high-voltage power supply circuit, a transmitting pulse generating circuit, and a magnetron. It is configured. The transmission pulse generation circuit receives a trigger signal and drives a pulse transformer with a constant pulse width, and has conventionally used a pulse shaping circuit using an LC circuit, a hard tube, an FET, or the like.

【0003】0003

【発明が解決しようとする課題】このような従来の送信
パルス発生回路は、本来立上り,立下りの急峻な一定パ
ルス幅の送信パルスを発生させる場合に適している。一
定パルス幅のパルス状電波を送受波して物標探知を行え
ば、受信信号強度に係わらず受信パルス幅は一定となる
SUMMARY OF THE INVENTION Such a conventional transmission pulse generation circuit is originally suitable for generating a transmission pulse having a constant pulse width with steep rises and falls. If target detection is performed by transmitting and receiving pulsed radio waves with a constant pulse width, the received pulse width will be constant regardless of the received signal strength.

【0004】ところが、例えば受信信号の強度に応じて
必要な信号のみ選択する場合には、受信信号を複数ビッ
トのディジタルデータに変換し、その値によって受信信
号レベルを判定しなければならず、例えばアナログ信号
処理によって不要信号の識別を容易にすることはできな
かった。また、従来の送信パルス発生回路では、立上り
,立下りの緩い、任意波形の送信パルスを作成すること
は出来なかった。
However, when selecting only the necessary signals according to the strength of the received signal, for example, it is necessary to convert the received signal into multi-bit digital data and determine the received signal level based on the value. Analog signal processing has not been able to facilitate the identification of unnecessary signals. Furthermore, with conventional transmission pulse generation circuits, it has not been possible to create transmission pulses with arbitrary waveforms that have slow rises and falls.

【0005】この発明の目的は、立上りまたは立下りの
比較的緩い任意波形の送信パルスを発生できるようにし
た、パルスレーダにおける送信パルス発生回路を提供す
ることにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a transmission pulse generation circuit for a pulse radar, which is capable of generating a transmission pulse having an arbitrary waveform with a relatively slow rise or fall.

【0006】[0006]

【課題を解決するための手段】この発明のパルスレーダ
における送信パルス発生回路は、基本トリガ信号を受け
てそれぞれタイミングの異なる複数の制御トリガ信号を
発生するタイミング制御回路と、各制御トリガ信号を受
けて短くとも最後に現れる制御トリガ信号の発生タイミ
ングより後まで持続する矩形波信号をそれぞれ発生する
複数の制御パルス発生回路と、各制御パルス発生回路の
出力信号により単一の負荷を駆動する複数の駆動回路と
を備えたことを特徴とする。
[Means for Solving the Problems] A transmission pulse generation circuit in a pulse radar of the present invention includes a timing control circuit that receives a basic trigger signal and generates a plurality of control trigger signals with different timings, and a timing control circuit that receives each control trigger signal. A plurality of control pulse generation circuits each generate a rectangular wave signal that lasts until at least after the generation timing of the last control trigger signal that appears, and a plurality of control pulse generation circuits that drive a single load with the output signal of each control pulse generation circuit. It is characterized by comprising a drive circuit.

【0007】[0007]

【作用】この発明のパルスレーダにおける送信パルス発
生回路では、タイミング制御回路が基本トリガ信号を受
けてそれぞれタイミングの異なる複数の制御トリガ信号
を発生し、制御パルス発生回路が各制御トリガ信号を受
けてそれぞれ矩形波信号を発生する。またそれぞれの駆
動回路は各制御パルス発生回路の出力信号によって例え
ばパルストランスなどの単一の負荷を駆動する。上記制
御パルス発生回路の出力する矩形波信号は最も後に現れ
る制御トリガ信号の発生タイミングよりさらに後まで持
続するものであるため、その制御パルス発生回路から同
時に矩形波信号が発生されているとき、対応する駆動回
路は同時に負荷を駆動することになる。この負荷を同時
に駆動する駆動回路の数によって負荷供給電力が変化す
る。
[Operation] In the transmission pulse generation circuit in the pulse radar of the present invention, the timing control circuit receives a basic trigger signal and generates a plurality of control trigger signals with different timings, and the control pulse generation circuit receives each control trigger signal and generates a plurality of control trigger signals with different timings. Each generates a square wave signal. Further, each drive circuit drives a single load, such as a pulse transformer, by the output signal of each control pulse generation circuit. Since the rectangular wave signal output from the control pulse generation circuit described above lasts until after the generation timing of the control trigger signal that appears last, if the rectangular wave signal is generated simultaneously from the control pulse generation circuit, the corresponding The drive circuit that does this will simultaneously drive the load. The load supply power changes depending on the number of drive circuits that simultaneously drive this load.

【0008】従ってタイミング制御回路が発生する複数
の制御トリガ信号のタイミングのずれと、複数の制御パ
ルス発生回路が発生する各矩形波信号の持続時間との関
係によって負荷供給電力の波形すなわち送信パルスの波
形が定まる。
Therefore, the waveform of the load supply power, that is, the transmission pulse, is determined by the relationship between the timing deviation of the plurality of control trigger signals generated by the timing control circuit and the duration of each rectangular wave signal generated by the plurality of control pulse generation circuits. The waveform is determined.

【0009】[0009]

【実施例】この発明の実施例に係るパルスレーダの送信
部の構成をブロック図として図1に示す。図1において
100は送信パルス発生回路である。送信部は基準トリ
ガ信号発生回路1、送信パルス発生回路100、パルス
トランスなどの負荷5、およびマグネトロンなどの送信
回路6から構成される。基準トリガ信号発生回路1は送
信パルス発生回路100に対し基準トリガ信号を与える
。送信パルス発生回路100は基準トリガ信号に同期し
て予め定められたパルス波形信号で負荷5を駆動する。 これにより送信回路6は負荷5を介して電流供給を受け
所定波形のパルス状電波を送信する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a block diagram of the configuration of a transmitting section of a pulse radar according to an embodiment of the present invention. In FIG. 1, 100 is a transmission pulse generation circuit. The transmitting section includes a reference trigger signal generating circuit 1, a transmitting pulse generating circuit 100, a load 5 such as a pulse transformer, and a transmitting circuit 6 such as a magnetron. The reference trigger signal generation circuit 1 provides a reference trigger signal to the transmission pulse generation circuit 100. The transmission pulse generation circuit 100 drives the load 5 with a predetermined pulse waveform signal in synchronization with the reference trigger signal. As a result, the transmitting circuit 6 receives current supply through the load 5 and transmits a pulsed radio wave having a predetermined waveform.

【0010】図1において送信パルス発生回路100の
構成および動作は次の通りである。
The configuration and operation of transmission pulse generation circuit 100 in FIG. 1 are as follows.

【0011】タイミング制御回路2は基準トリガ信号発
生回路1から基準トリガ信号aを受けてそれぞれタイミ
ングの異なる複数の制御トリガ信号b1,b2・・・b
5を発生する。このタイミング制御回路2は、アナログ
回路であれば、基準トリガ信号aにトリガされてそれぞ
れ予め定められた時間持続するワンショット回路と、各
ワンショット回路の立下り時に制御トリガ信号を発生す
る回路とによって構成することができる。またディジタ
ル回路であれば、クロック信号発生回路と、クロック信
号をカウントして一定時間経過後に制御トリガ信号を発
生するカウンタとにより構成することもできる。制御パ
ルス発生回路31,32・・・35は制御トリガ信号を
受けて、それぞれ予め定められた一定時間の矩形波信号
を制御パルスc1,c2・・・c5として発生する。こ
れらの制御パルス発生回路はアナログ回路であればワン
ショット回路により構成することができ、またディジタ
ル回路であればクロック信号を一定時間カウントするカ
ウンタにより構成することができる。駆動回路41,4
2・・・・45は発生された各制御パルスc1,c2・
・・c5によって負荷5を駆動する。負荷5が例えばパ
ルストランスである場合、駆動回路41,42・・・・
45はパルストランスの一次側をそれぞれ定電流駆動す
る。従ってパルストランスは駆動回路41〜45のうち
同時に動作する駆動回路により重畳駆動される。
The timing control circuit 2 receives the reference trigger signal a from the reference trigger signal generation circuit 1 and generates a plurality of control trigger signals b1, b2, . . . , each having a different timing.
Generates 5. If this timing control circuit 2 is an analog circuit, it includes a one-shot circuit that is triggered by the reference trigger signal a and continues for a predetermined time, and a circuit that generates a control trigger signal at the falling edge of each one-shot circuit. It can be configured by Further, if it is a digital circuit, it can be configured by a clock signal generation circuit and a counter that counts clock signals and generates a control trigger signal after a certain period of time has elapsed. The control pulse generation circuits 31, 32, . . . , 35 receive control trigger signals and generate rectangular wave signals having a predetermined period of time as control pulses c1, c2, . . ., c5, respectively. These control pulse generation circuits can be configured by a one-shot circuit if they are analog circuits, or can be configured by a counter that counts clock signals for a certain period of time if they are digital circuits. Drive circuit 41, 4
2...45 are the generated control pulses c1, c2.
...The load 5 is driven by c5. When the load 5 is a pulse transformer, for example, the drive circuits 41, 42...
Reference numeral 45 drives each primary side of the pulse transformer with a constant current. Therefore, the pulse transformer is driven in a superimposed manner by the drive circuits 41 to 45 that operate simultaneously.

【0012】次に、図1に示した各部の波形を図2に示
す。図のように基準トリガ信号aが発生されてからそれ
ぞれタイミングの異なる複数の制御トリガ信号b1〜b
5が発生される。この例では制御トリガ信号b1は基準
トリガ信号aと同一タイミングに発生する。図1に示し
た制御パルス発生回路31は制御トリガ信号b1の立上
りから一定時間T1だけ持続する矩形波信号c1を制御
パルスとして発生する。制御パルス発生回路32は制御
トリガ信号b2から一定時間T2持続する制御パルスc
2を発生し、同様にして制御パルス発生回路35は制御
トリガ信号b5から一定時間T5持続する制御パルスc
5を発生する。同図に示すように制御パルスc1〜c5
の立下りタイミングは何れも、最後に現れる制御トリガ
信号b5より後まで持続し、またこの例では各制御パル
スが制御パルスc5を中心として時間軸上で対称となる
ように制御トリガ信号b1〜b5の発生タイミングと制
御パルスc1〜c5の持続時間を定めている。この信号
により時刻t1からt5まで負荷駆動電流が順次上昇し
、t5からt9まで負荷駆動電流が順次減少していく。 その結果、送信回路(マグネトロン)の供給電流は、e
に示すように略三角波で変化し、図3に示すようにエン
ベロープ変化するパルス状電波が送信される。
Next, FIG. 2 shows waveforms of each part shown in FIG. 1. As shown in the figure, a plurality of control trigger signals b1 to b are generated at different timings after the reference trigger signal a is generated.
5 is generated. In this example, the control trigger signal b1 is generated at the same timing as the reference trigger signal a. The control pulse generation circuit 31 shown in FIG. 1 generates, as a control pulse, a rectangular wave signal c1 that lasts for a certain period of time T1 from the rise of the control trigger signal b1. The control pulse generation circuit 32 generates a control pulse c that lasts for a certain period of time T2 from the control trigger signal b2.
Similarly, the control pulse generation circuit 35 generates a control pulse c that lasts for a certain period of time T5 from the control trigger signal b5.
Generates 5. As shown in the figure, control pulses c1 to c5
The falling timings of all of the control trigger signals b1 to b5 continue until after the control trigger signal b5 that appears last, and in this example, the control trigger signals b1 to b5 are arranged so that each control pulse is symmetrical on the time axis with the control pulse c5 as the center. The generation timing of the control pulses c1 to c5 and the duration of the control pulses c1 to c5 are determined. Due to this signal, the load drive current increases sequentially from time t1 to t5, and decreases sequentially from t5 to t9. As a result, the supply current of the transmitting circuit (magnetron) is e
A pulsed radio wave is transmitted which changes in a substantially triangular wave as shown in FIG. 3, and whose envelope changes as shown in FIG.

【0013】次に、パルスレーダの受信部の構成例およ
び波形図を図4および図5に示す。
Next, FIGS. 4 and 5 show an example of the configuration and waveform diagrams of the receiving section of the pulse radar.

【0014】図4においてミキサ回路10は局部発振回
路11の信号とアンテナ受信信号を混合して中間周波信
号を作成し、中間周波増幅回路12はゲイン調整回路1
3に応じた利得で増幅し、検波回路14はこれを検波し
て映像信号を出力する。同図において15はコンパレー
タであり、基準電圧Vrを基準にして検波回路14の出
力信号vを二値化する。
In FIG. 4, a mixer circuit 10 mixes a signal from a local oscillation circuit 11 and an antenna reception signal to create an intermediate frequency signal, and an intermediate frequency amplifier circuit 12 mixes a signal from a local oscillation circuit 11 and an antenna reception signal to create an intermediate frequency signal, and an intermediate frequency amplifier circuit 12 mixes a signal from a local oscillation circuit 11 and an antenna reception signal to create an intermediate frequency signal.
The detection circuit 14 detects this and outputs a video signal. In the figure, 15 is a comparator, which binarizes the output signal v of the detection circuit 14 with reference to the reference voltage Vr.

【0015】図5は図4に示したコンパレータ15の入
出力信号の波形である。受信信号強度の高いエコーS1
は幅の広い信号として得られるのに対し、受信信号強度
の低いエコーS2は幅の短い信号となる。
FIG. 5 shows waveforms of input and output signals of the comparator 15 shown in FIG. Echo S1 with high received signal strength
is obtained as a wide signal, whereas the echo S2 with low received signal strength becomes a short signal.

【0016】次に第2の実施例に係る送信パルス発生回
路の動作について述べる。図6は回路各部の波形である
。なお回路構成は図1に示したものと同様である。第1
の実施例と異なる点は、制御パルス発生回路31,32
・・・35の動作である。制御パルス発生回路31は図
6に示すように制御トリガ信号b1の立上りから一定時
間T持続する制御パルスc1を発生し、制御パルス発生
回路32は制御トリガ信号b2の立上りから一定時間T
持続する制御パルスc2を発生する。同様に制御パルス
発生回路35は制御トリガ信号b5の立上りから一定時
間T持続する制御パルスc5を発生する。このように各
制御パルスc1〜c5の持続時間Tはすべて一定であり
、最初に発生した制御パルスc1は最後に発生した制御
トリガ信号b5の立上りより後まで持続する。このよう
に構成したことにより、時刻t1からt5までは負荷(
パルストランス)の駆動電流が順次増大し、時刻t5か
らt9の間にその駆動電流が順次減少する。従って第1
の実施例と同様に図3に示すようなパルス状電波が送信
される。
Next, the operation of the transmission pulse generation circuit according to the second embodiment will be described. FIG. 6 shows waveforms of various parts of the circuit. Note that the circuit configuration is similar to that shown in FIG. 1st
The difference from the embodiment is that the control pulse generation circuits 31 and 32
...35 movements. As shown in FIG. 6, the control pulse generation circuit 31 generates a control pulse c1 that lasts for a certain period of time T from the rise of the control trigger signal b1, and the control pulse generation circuit 32 generates a control pulse c1 that lasts for a certain period of time T from the rise of the control trigger signal b2.
A sustained control pulse c2 is generated. Similarly, the control pulse generation circuit 35 generates a control pulse c5 that lasts for a certain period of time T from the rise of the control trigger signal b5. In this way, the duration T of each of the control pulses c1 to c5 is all constant, and the first generated control pulse c1 continues until after the rise of the last generated control trigger signal b5. With this configuration, the load (
The drive current of the pulse transformer (pulse transformer) increases sequentially, and decreases sequentially between time t5 and t9. Therefore, the first
Similarly to the embodiment, pulsed radio waves as shown in FIG. 3 are transmitted.

【0017】この第2の実施例によれば、各制御パルス
c1〜c5により負荷を駆動する駆動回路の電力損失が
等しいため、駆動回路を構成する各素子の定格容量を有
効に利用することができる。
According to the second embodiment, since the power loss of the drive circuit that drives the load by each control pulse c1 to c5 is equal, it is possible to effectively utilize the rated capacity of each element constituting the drive circuit. can.

【0018】なお、第1・第2の実施例では駆動回路4
1〜45が負荷5に対しそれぞれ等しく定電流を供給す
るようにしたが、各駆動回路にそれぞれ重みを付けて重
みに応じて負荷を駆動するように構成してもよい。
Note that in the first and second embodiments, the drive circuit 4
Although the circuits 1 to 45 supply equal constant currents to the load 5, each drive circuit may be weighted and the load may be driven in accordance with the weight.

【0019】[0019]

【発明の効果】この発明によれば、制御トリガ信号の発
生タイミングと制御パルスの持続時間を定めることによ
って立上りまたは立下りの比較的緩やかな任意の波形を
有する送信パルスを発生させることができる。そのため
、例えば受信信号を一定のレベルでスライスすることに
よって、受信信号強度に応じて幅の異なる受信信号を得
て目的のエコーのみ抽出することも容易となる。
According to the present invention, by determining the generation timing of the control trigger signal and the duration of the control pulse, it is possible to generate a transmission pulse having an arbitrary waveform with a relatively gradual rise or fall. Therefore, for example, by slicing the received signal at a constant level, it becomes easy to obtain received signals with different widths depending on the received signal strength and extract only the desired echo.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】実施例に係るパルスレーダの送信部のブロック
図である。
FIG. 1 is a block diagram of a transmitter of a pulse radar according to an embodiment.

【図2】第1の実施例に係る送信パルス発生回路各部の
波形図である。
FIG. 2 is a waveform diagram of each part of the transmission pulse generation circuit according to the first embodiment.

【図3】実施例により得られる送信電波の例を示す図で
ある。
FIG. 3 is a diagram showing an example of transmitted radio waves obtained by the example.

【図4】受信部の主要部の構成を示すブロック図である
FIG. 4 is a block diagram showing the configuration of main parts of a receiving section.

【図5】図4における各部の波形図である。FIG. 5 is a waveform diagram of each part in FIG. 4;

【図6】第2の実施例に係る送信パルス発生回路各部の
波形図である。
FIG. 6 is a waveform diagram of each part of the transmission pulse generation circuit according to the second embodiment.

【符号の説明】[Explanation of symbols]

15  コンパレータ 100  送信パルス発生回路 15 Comparator 100 Transmission pulse generation circuit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】  基本トリガ信号を受けてそれぞれタイ
ミングの異なる複数の制御トリガ信号を発生するタイミ
ング制御回路と、各制御トリガ信号を受けて短くとも最
後に現れる制御トリガ信号の発生タイミングより後まで
持続する矩形波信号をそれぞれ発生する複数の制御パル
ス発生回路と、各制御パルス発生回路の出力信号により
単一の負荷を駆動する複数の駆動回路とを備えてなるパ
ルスレーダにおける送信パルス発生回路。
1. A timing control circuit that receives a basic trigger signal and generates a plurality of control trigger signals with different timings, and a timing control circuit that receives each control trigger signal and continues at least until after the generation timing of the last control trigger signal. A transmission pulse generation circuit in a pulse radar, comprising a plurality of control pulse generation circuits that each generate a rectangular wave signal, and a plurality of drive circuits that drive a single load using the output signal of each control pulse generation circuit.
JP3017752A 1991-02-08 1991-02-08 Pulse radar Expired - Lifetime JP2618097B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3017752A JP2618097B2 (en) 1991-02-08 1991-02-08 Pulse radar

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3017752A JP2618097B2 (en) 1991-02-08 1991-02-08 Pulse radar

Publications (2)

Publication Number Publication Date
JPH04256882A true JPH04256882A (en) 1992-09-11
JP2618097B2 JP2618097B2 (en) 1997-06-11

Family

ID=11952474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3017752A Expired - Lifetime JP2618097B2 (en) 1991-02-08 1991-02-08 Pulse radar

Country Status (1)

Country Link
JP (1) JP2618097B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014103265A1 (en) * 2012-12-25 2014-07-03 パナソニック株式会社 Power amplifier

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52128517A (en) * 1976-04-20 1977-10-28 Matsushita Electric Ind Co Ltd Frequency converter
JPS5339806A (en) * 1976-09-24 1978-04-12 Toshiba Corp Power supply for magnetron
JPS5767868A (en) * 1980-10-09 1982-04-24 Westinghouse Electric Corp Transmitter for solid pulse radar
JPS63184413A (en) * 1987-01-26 1988-07-29 Nec Corp Pulse waveform shaping system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52128517A (en) * 1976-04-20 1977-10-28 Matsushita Electric Ind Co Ltd Frequency converter
JPS5339806A (en) * 1976-09-24 1978-04-12 Toshiba Corp Power supply for magnetron
JPS5767868A (en) * 1980-10-09 1982-04-24 Westinghouse Electric Corp Transmitter for solid pulse radar
JPS63184413A (en) * 1987-01-26 1988-07-29 Nec Corp Pulse waveform shaping system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014103265A1 (en) * 2012-12-25 2014-07-03 パナソニック株式会社 Power amplifier
US9490758B2 (en) 2012-12-25 2016-11-08 Panasonic Corporation Power amplifier

Also Published As

Publication number Publication date
JP2618097B2 (en) 1997-06-11

Similar Documents

Publication Publication Date Title
JPH08179036A (en) Radar device
EP0366406A3 (en) Multiple radio frequency single receiver radar operation
AU618297B2 (en) Radar apparatus employing different kinds of pulses
JPS6132636B2 (en)
EP0310172A1 (en) FM-CW radar apparatus
JPH04256882A (en) Sending pulse generation circuit in pulse radar
US4058810A (en) Stabilized digital PPL radar system
GB627982A (en) Methods and apparatus for radio echo ranging
JPH05223928A (en) Pulse radar
HU200881B (en) System for identifying moving objects
US4187857A (en) Ultrasonic wave diagnostic apparatus to concurrently display an echo signal and a reference signal
JPS5997069A (en) Ultrasonic car height measuring apparatus
JP2760625B2 (en) Non-carrier pulse radar
JPH06100651B2 (en) Ultrasonic switch
RU2208813C2 (en) Range finding facility
JPH0348498Y2 (en)
JP2557326Y2 (en) Radar equipment
JP2575312B2 (en) Reflection image display
US2933700A (en) Apparatus for eliminating second time around echos
JP2897493B2 (en) Active sonar device
JPH10300844A (en) Pulse radar distance measuring device and pulse radar distance measuring method
JP2943754B2 (en) Radar equipment
JPS6398579A (en) Driving of vibrator of ultrasonic sensor
JPS6362138B2 (en)
SU713268A1 (en) Radiolocator image scanning device

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090311

Year of fee payment: 12

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100311

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100311

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110311

Year of fee payment: 14

EXPY Cancellation because of completion of term