JPH0425342Y2 - - Google Patents

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Publication number
JPH0425342Y2
JPH0425342Y2 JP1981122305U JP12230581U JPH0425342Y2 JP H0425342 Y2 JPH0425342 Y2 JP H0425342Y2 JP 1981122305 U JP1981122305 U JP 1981122305U JP 12230581 U JP12230581 U JP 12230581U JP H0425342 Y2 JPH0425342 Y2 JP H0425342Y2
Authority
JP
Japan
Prior art keywords
voltage
hammer
circuit
print timing
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1981122305U
Other languages
Japanese (ja)
Other versions
JPS5829445U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12230581U priority Critical patent/JPS5829445U/en
Publication of JPS5829445U publication Critical patent/JPS5829445U/en
Application granted granted Critical
Publication of JPH0425342Y2 publication Critical patent/JPH0425342Y2/ja
Granted legal-status Critical Current

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  • Accessory Devices And Overall Control Thereof (AREA)
  • Impact Printers (AREA)

Description

【考案の詳細な説明】 本考案はプリンタのハンマ電圧の降下に応じて
印字タイミングを補正するとともに、許容最低電
圧を検出できる印字タイミング調整回路に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a print timing adjustment circuit that can correct print timing according to a drop in hammer voltage of a printer and can detect the minimum allowable voltage.

従来、多用されているインパクトプリンタにお
いて、ハンマ駆動コイルに印加するハンマ電圧が
電源変動や負荷変動により降下するため、これに
よる印字タイミングを補正する印字タイミング調
整回路が設けられている。第1図にその1例回路
を示す。すなわち、ハンマ電圧Vを抵抗R1を介
してエミツタ接地のトランジスタ2のコレクタに
加え、一方印字タイミング信号QをNOT回路1
を介しそのベースに加え、コレクタより印字タイ
ミングに対応するハンマ電圧を出力する。このハ
ンマ電圧を抵抗R3にダイオードDを分路させた
回路を直列接続し、両側に抵抗R2とコンデンサ
Cを並列接続した時定数回路3を通すことによ
り、ハンマ電圧の立上り、立下りに応じ充電、放
電をくり返す。
Conventionally, in impact printers that have been widely used, since the hammer voltage applied to the hammer drive coil drops due to power fluctuations and load fluctuations, a print timing adjustment circuit is provided to correct the print timing caused by this. FIG. 1 shows an example circuit. That is, the hammer voltage V is applied to the collector of the transistor 2 whose emitter is grounded through the resistor R1 , and the print timing signal Q is applied to the NOT circuit 1.
In addition to the base, the collector outputs a hammer voltage corresponding to the printing timing. This hammer voltage is connected in series with a circuit in which a resistor R3 and a diode D are shunted, and by passing it through a time constant circuit 3 which has a resistor R2 and a capacitor C connected in parallel on both sides, the rise and fall of the hammer voltage is controlled. Repeat charging and discharging accordingly.

その波形は第3図aのQに対し同図bに描く山形
の増減曲線で示される。これを比較器4の負端
子に入れ、一方の正端子には第3図bに示す所定
の閾値レベルVZが設定される。そして、比較
器4の出力を定電圧ダイオード5を通しトランジ
スタ6でパルス整形することにより、第3図cに
示すように、入力ハンマ電圧の印字タイミングに
対し遅延された印字タイミングパルスが得られ
る。これがハンマ駆動回路7に入力される。
The waveform is shown by a chevron-shaped increase/decrease curve drawn in FIG. 3b for Q in FIG. 3a. This is input to the negative terminal of the comparator 4, and one positive terminal is set to a predetermined threshold level V Z shown in FIG. 3b. Then, by passing the output of the comparator 4 through a constant voltage diode 5 and shaping the pulse with a transistor 6, a printing timing pulse delayed with respect to the printing timing of the input hammer voltage is obtained, as shown in FIG. 3c. This is input to the hammer drive circuit 7.

このように、ハンマ電圧が降下した場合に降下量
に応じて遅れたタイミングで印字が行なわれるか
ら、ハンマ電圧に拘らず常に最適の印字タイミン
グが保たれる。
In this way, when the hammer voltage drops, printing is performed at a timing delayed according to the amount of drop, so that the optimum printing timing is always maintained regardless of the hammer voltage.

この場合、たとえばハンマ電圧が48V〜40Vは調
整可能であるがそれ以下は調整不能となる。この
ため、ハンマ電圧の降下検出回路として許容最低
電圧VLを比較器の一方に設定した回路が別に設
けられ、この検出回路が動作するとプリンタを停
止する。この検出回路における許容最低電圧VL
と前述の閾値レベルVZとは直接関連はないが、
この動作点を同時にすることは可能である。
In this case, for example, the hammer voltage can be adjusted from 48V to 40V, but cannot be adjusted below that. For this reason, a separate circuit is provided as a hammer voltage drop detection circuit in which the lowest allowable voltage V L is set on one side of the comparator, and when this detection circuit operates, the printer is stopped. The minimum allowable voltage V L in this detection circuit
Although it is not directly related to the threshold level V Z mentioned above,
It is possible to have these operating points at the same time.

本考案者はこの両者の動作点を同時にすることに
より、後者の回路を前者の回路に含ませることを
考えたものである。
The inventor of the present invention considered including the latter circuit in the former circuit by making the operating points of both the same.

本考案の目的はプリンタのハンマ電圧の降下に
応じ印字タイミングを補正するとともに、許容最
低電圧を検出できる印字タイミング調整回路を提
供することである。
An object of the present invention is to provide a print timing adjustment circuit that can correct the print timing according to a drop in hammer voltage of a printer and can detect the minimum allowable voltage.

前記目的を達成するため、本考案の印字タイミ
ング調整回路はプリンタのハンマ電圧を入力して
印字タイミングパルスを発生し、該印字タイミン
グパルスを時定数回路を通して充放電波形を得
て、所定の閾値レベルでスライスして遅延タイミ
ングパルスを形成することにより、ハンマ電圧の
降下に応じて印字タイミングを補正する印字タイ
ミング調整回路において、入力ハンマ電圧を与え
た抵抗と定電圧素子の分圧点より所定の閾値レベ
ルを取出す回路を具え、該ハンマ電圧が許容最低
電圧以下に降下した時定電圧素子が不動作となる
ようにしたことを特徴とするものである。
In order to achieve the above object, the print timing adjustment circuit of the present invention generates a print timing pulse by inputting the printer's hammer voltage, passes the print timing pulse through a time constant circuit to obtain a charge/discharge waveform, and adjusts the print timing pulse to a predetermined threshold level. In the print timing adjustment circuit that corrects the print timing according to the drop in hammer voltage by slicing the input hammer voltage to form a delayed timing pulse, a predetermined threshold value is determined from the voltage division point between the resistor to which the input hammer voltage is applied and the constant voltage element. The present invention is characterized in that it includes a circuit for extracting a level, and the time constant voltage element becomes inoperable when the hammer voltage drops below the allowable minimum voltage.

以下本考案を実施例につき詳述する。 The present invention will be described in detail below with reference to examples.

第2図は本考案の実施例の構成を示す説明図で
ある。同図において、第1図と異なる点は比較器
4の正端子に与える閾値レベルのVZをハンマ電
圧Vと関連させ、許容最低電圧VL以下では不動
作となるように設定し、ハンマ電圧の降下検出機
能をもたせたことである。すなわち、トランジス
タ2のエミツタに与えるハンマ電圧Vを分岐し抵
抗11と定電圧ダイオード(たとえばツエナダイ
オード)12を介して接地させ、この定電圧ダイ
オードの上端から閾値レベルを取出すものであ
る。この場合、抵抗11を適当に設定することに
よりハンマ電圧が許容電圧以下となつた時定電圧
ダイオード12が不動作となり、比較器4から出
力しないようにする。
FIG. 2 is an explanatory diagram showing the configuration of an embodiment of the present invention. In the figure, the difference from Figure 1 is that the threshold level V Z applied to the positive terminal of the comparator 4 is related to the hammer voltage V, and it is set so that it will not operate below the allowable minimum voltage V L , and the hammer voltage This is because it has a descent detection function. That is, the hammer voltage V applied to the emitter of the transistor 2 is branched and grounded via a resistor 11 and a constant voltage diode (for example, a Zener diode) 12, and the threshold level is taken out from the upper end of this constant voltage diode. In this case, by appropriately setting the resistor 11, the time-regulating voltage diode 12 becomes inoperable when the hammer voltage falls below the allowable voltage, and is prevented from outputting from the comparator 4.

この構成により、ハンマ電圧が印字タイミング
の調整可能な範囲たとえば前述のように48V〜
40Vではその動作は第1図の従来例と同様に第3
図a〜cのとおりである。ハンマ電圧が40V以
下、すなわちトランジスタ2のコレクタ、エミツ
タに抵抗R1を通して印加されている電圧Vが40V
以下になると、抵抗11とツエナダイオード12
の直列回路からとり出している閾値電圧VZ
Vに等しくなる。これは、ツエナダイオード12
のツエナ電圧を40Vに設定することにより、ツエ
ナ電流が流れなくなるためである。これにより抵
抗11による電圧降下を生じない。従つての電
圧VZは、印加電圧と同じVに等しくなる。
With this configuration, the hammer voltage can be adjusted within the print timing range, for example from 48V as mentioned above.
At 40V, the operation is the same as the conventional example shown in Figure 1.
As shown in Figures a to c. The hammer voltage is 40V or less, that is, the voltage V applied to the collector and emitter of transistor 2 through resistor R1 is 40V.
If it becomes below, resistor 11 and Zener diode 12
The threshold voltage V Z extracted from the series circuit becomes equal to V. This is a zener diode 12
This is because by setting the zener voltage to 40V, the zener current will no longer flow. This eliminates the voltage drop caused by the resistor 11. The voltage V Z is then equal to the applied voltage V.

以下、ハンマ電圧降下時の動作を第4図a〜d
に示すと、同図aと同図b(第3図bと同じ)の
の如く48V〜40V迄はツエナ電圧と同一のVZ
出力していた点線で示すの電圧VZは、Vが
40V以下、たとえば39V以下となると、第4図c
に示すように、同図bの充放電波形と交差し
なくなる。このため、第2図に示す比較器4から
の出力、すなわち印字タイミングパルスがローレ
ベルに固定され変化が得られなくなる。これによ
り、第4図dので示すように、トランジスタ6
は、オフされ0Vとなりハンマ駆動回路7の動作
は停止される。このようにしてハンマ電圧降下検
出が行われる。
Below, the operation when the hammer voltage drops is shown in Figures 4 a to d.
As shown in Figure 3a and Figure 3b (same as Figure 3b), the voltage VZ shown by the dotted line outputs the same VZ as the Zener voltage from 48V to 40V.
If the voltage is below 40V, for example below 39V, Figure 4c
As shown in , the charge/discharge waveform no longer intersects with the charge/discharge waveform in b of the same figure. Therefore, the output from the comparator 4 shown in FIG. 2, that is, the print timing pulse, is fixed at a low level and cannot be changed. As a result, as shown in FIG. 4d, the transistor 6
is turned off and becomes 0V, and the operation of the hammer drive circuit 7 is stopped. Hammer voltage drop detection is performed in this manner.

ハンマ駆動回路7では、ハンマ電圧の充放電波形
と閾値電圧VZが交差する場合を選択して駆
動動作が行なわれる。
In the hammer drive circuit 7, a drive operation is performed by selecting a case where the charging/discharging waveform of the hammer voltage intersects with the threshold voltage VZ .

なお、上記説明中のツエナダイオード12の動
作につき第5図a,bを用いてさらに詳細に説明
する。
The operation of the Zener diode 12 described above will be explained in more detail using FIGS. 5a and 5b.

同図aのようにツエナダイオード12の電圧が
VZであるということは、同図bのダイオード特
性すなわち、正方向特性VF−IF、逆方向特性VR
−IRにおいて、VRの方向に電圧を上げると電流は
ほとんど流れないVR=VZでツエナ現象(なだれ
現象)が発生し、電流が急にふえるポイントがあ
る。これを使用して同図aのようにνをとりだ
す。
As shown in figure a, the voltage of Zener diode 12 is
V Z means that the diode characteristics shown in b in the same figure, that is, the forward direction characteristic V F −I F and the reverse direction characteristic V R
-I R , when the voltage is increased in the direction of V R , there is a point where almost no current flows, and a zener phenomenon (avalanche phenomenon) occurs at V R = V Z , where the current suddenly increases. Using this, ν is extracted as shown in a in the figure.

同図aでV=45〔V〕、VZ=40〔V〕とすると、
抵抗11には5〔V〕の電圧降下が生じν=40
〔V〕となる。
If V = 45 [V] and V Z = 40 [V] in figure a, then
A voltage drop of 5 [V] occurs in the resistor 11, ν = 40
It becomes [V].

また、V=48〔V〕のときは抵抗11の両端で
8〔V〕の電圧降下が生ずる。いま、V=39〔V〕
になると、VR=39〔V〕となり同図bのようにツ
エナ現象もおきずIRはほとんど流れなくなるた
め、抵抗11の電圧降下も発生しない。従つてν
=V=39〔V〕となる。
Further, when V=48 [V], a voltage drop of 8 [V] occurs across the resistor 11. Now, V=39 [V]
Then, V R =39 [V], and the Zener phenomenon does not occur as shown in b in the same figure, and I R hardly flows, so that no voltage drop across the resistor 11 occurs. Therefore ν
=V=39 [V].

この場合、第4図a〜dの説明により、ハンマ
駆動回路7では、V=40〜48〔V〕では駆動が行
なわれ、V=39〔V〕以下では駆動が停止する。
In this case, as explained in FIGS. 4a to 4d, the hammer drive circuit 7 performs driving when V=40 to 48 [V], and stops driving when V=39 [V] or less.

以上説明したように、本考案によれば、プリン
タのハンマ電圧の降下に応じて印字タイミングを
補正する回路に、ハンマ電圧が許容最低電圧以下
に降下したことを検出する機能を併有させたもの
であり、従来例で用いた比較器を共用することに
より構成を著しく簡単化することができる。
As explained above, according to the present invention, the circuit that corrects the printing timing according to the drop in the hammer voltage of the printer also has a function to detect when the hammer voltage has dropped below the allowable minimum voltage. By sharing the comparator used in the conventional example, the configuration can be significantly simplified.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の説明図、第2図は本考案の実
施例の構成説明図、第3図a〜cは、正常時の従
来例および本考案の印字タイミング調整動作の説
明図、第4図a〜dはハンマ電圧が降下した場合
の動作説明図、第5図a,bはツエナダイオード
の動作説明図。図中、1はNOT回路、2,6は
トランジスタ、3は時定数回路、4は比較器、
5,12は定電圧ダイオード、7はハンマ駆動回
路、11は抵抗を示す。
FIG. 1 is an explanatory diagram of the conventional example, FIG. 2 is an explanatory diagram of the configuration of the embodiment of the present invention, FIGS. FIGS. 4a to 4d are explanatory diagrams of the operation when the hammer voltage drops, and FIGS. 5a and 5b are explanatory diagrams of the operation of the Zener diode. In the figure, 1 is a NOT circuit, 2 and 6 are transistors, 3 is a time constant circuit, 4 is a comparator,
5 and 12 are constant voltage diodes, 7 is a hammer drive circuit, and 11 is a resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プリンタのハンマ電圧を入力して印字タイミン
グパルスを発生し、該印字タイミングパルスを時
定数回路を通して充放電波形を得て、所定の閾値
レベルでスライスして遅延タイミングパルスを形
成することにより、ハンマ電圧の降下に応じて印
字タイミングを補正する印字タイミング調整回路
において、入力ハンマ電圧を与えた抵抗と定電圧
素子の分圧点より所定の閾値レベルを取出す回路
を具え、該ハンマ電圧が許容最低電圧以下に降下
した時定電圧素子が不動作となるようにしたこと
を特徴とする印字タイミング調整回路。
The hammer voltage can be adjusted by inputting the printer's hammer voltage to generate a print timing pulse, passing the print timing pulse through a time constant circuit to obtain a charge/discharge waveform, and slicing it at a predetermined threshold level to form a delayed timing pulse. The print timing adjustment circuit corrects the print timing according to the drop in the input hammer voltage, and includes a circuit that extracts a predetermined threshold level from the voltage division point of the resistor and constant voltage element to which the input hammer voltage is applied, and that the hammer voltage is below the minimum allowable voltage. A printing timing adjustment circuit characterized in that a constant voltage element becomes inoperable when the voltage drops to .
JP12230581U 1981-08-18 1981-08-18 Print timing adjustment circuit Granted JPS5829445U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12230581U JPS5829445U (en) 1981-08-18 1981-08-18 Print timing adjustment circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12230581U JPS5829445U (en) 1981-08-18 1981-08-18 Print timing adjustment circuit

Publications (2)

Publication Number Publication Date
JPS5829445U JPS5829445U (en) 1983-02-25
JPH0425342Y2 true JPH0425342Y2 (en) 1992-06-17

Family

ID=29916228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12230581U Granted JPS5829445U (en) 1981-08-18 1981-08-18 Print timing adjustment circuit

Country Status (1)

Country Link
JP (1) JPS5829445U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237179A (en) * 1985-08-13 1987-02-18 Oki Electric Ind Co Ltd Alarm-detecting circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5640572A (en) * 1979-09-12 1981-04-16 Seiko Instr & Electronics Ltd Printing density control circuit for thermal printer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5640572A (en) * 1979-09-12 1981-04-16 Seiko Instr & Electronics Ltd Printing density control circuit for thermal printer

Also Published As

Publication number Publication date
JPS5829445U (en) 1983-02-25

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