JPH04252314A - Operating speed deciding system for information processor - Google Patents

Abstract

PURPOSE:To always set an operating speed in accordance with the environment of a working power supply by providing a frequency selection circuit which selects an operating speed according to the type of the power supply. CONSTITUTION:A frequency selection circuit which selects and decides an operating frequency consists of a dividing circuit 5 which generates a low speed clock signal 8 and a high speed clock signal 9 by dividing a basic clock signal 7 and a selector circuit 4 which selects the signal 8 or 9 with reception of a power voltage deciding signal 11. When an AC is inputted to a power supply 1, the signal 11 has a high level end an operating clock signal 10 has the same frequency as the signal 9. Meanwhile the signal 11 has a low level and the signal 10 has the same frequency as the signal 8 with a battery power supply 15.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system for determining the operating speed of an information processing apparatus.

0002

2. Description of the Related Art Conventionally, the operating speed of this type of information processing apparatus has been determined by manually switching the operating speed of the information processing apparatus using a H/W switch.

0003

[Problem to be Solved by the Invention] However, in the conventional method for determining the operating speed of an information processing device as described above, the operating speed must be determined by the side that operates the information processing device regardless of the type of power source used. However, if the operation is performed incorrectly, the operation speed may be set to a speed that is not suitable for the power supply environment. Therefore, the technical problem of the present invention is always to
An object of the present invention is to obtain an operating speed determination method for an information processing device that can set an operating speed suitable for the environment of the power source used by the information processing device.

0004

[Means for Solving the Problems] According to the present invention, in an information processing device that has a function of operating with at least two types of power supply systems and whose operating speed is changed depending on the frequency of a clock signal, the information processing device at least two types of power supply means compatible with the information processing apparatus, clock signal generation circuits each generating clock signals having the same number of types of frequencies, and types of power supply means supplied to the information processing apparatus. a power supply type display means for outputting a display signal; and an operating frequency selection circuit for selecting and outputting one clock signal from a plurality of clock signals from the clock signal generation circuit according to the value of the display signal; A system for determining the operating speed of an information processing apparatus is obtained, which is characterized in that the operating speed of the information processing apparatus is changed depending on the type of power supply means of the information processing apparatus.

[0005]

[Operation] In the method for determining the operating speed of the information processing apparatus of the present invention, the operating speed of the information processing apparatus is selected by the display signal indicating the type of power supply used before the reset state is released, and the operating speed of the information processing apparatus is selected by the operating speed selection signal. Determine the operating frequency of the device.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a method for determining the operating speed of an information processing apparatus according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a system for determining the operating speed of an information processing apparatus according to an embodiment of the present invention. The power supply 1 is an AC/DC converter that converts commercial AC input to DC, and the power supply line 12
The power supply voltage VCC (DC+5V) is supplied to the power supply voltage VCC (DC+5V), and a power supply voltage confirmation signal PWON11 indicating that the power supply voltage VCC has been determined is outputted. On the other hand, battery (power)
15 is the power supply voltage VCC (DC+5) to the power supply line 12.
V). The oscillator 2 oscillates at a frequency of 32 MHz and outputs a basic clock signal 7.

The operating frequency selection circuit that selects and determines the operating frequency of the information processing device is a frequency dividing circuit that generates two frequency-divided signals, a low-speed clock signal 8 and a high-speed clock signal 9, by frequency-dividing the basic clock signal 7. (counter circuit) TTL IC (F161) 3 and operating speed selection signal P
Data selector circuit T receives WON 11 and selects either low-speed clock signal 8 or high-speed clock signal 9
It is composed of TL IC (F158)3. The basic clock signal 7 is input to pin 2 of the IC3. IC
3's 3A, 2A, 1A, 0A's 3, 4, 5, 6 pin
is connected to GND, and 1,7 of MR, EP, LD, ET
, 9, and 10 pins are connected to the power supply line 12 of the power supply voltage VCC via the pull-up resistor R15.

[0008] Also, the high speed clock signal 9 is outputted as a counter output from the 14th pin of the output T3 of the IC3, and the high speed clock signal 9 is inputted to the 6th pin of the IC4. Similarly, low-speed clock signal 8 is output from pin 13 of output T2 of IC3, and low-speed clock signal 8 is output from pin 13 of output T2 of IC3.
Input to pin 4 of 5. The frequency of high speed clock signal 9 is 16 MHz, and the frequency of low speed clock signal 8 is 8 MHz. Input 15pin of IC4 is connected to GND, input 1p
in inputs the power confirmation signal 11. IC4 7pi
An operating clock signal 10 of the information processing device is output from n. Power confirmation signal PWON11 is delay line 1
3 and Pull Down resistor R2 6. The delay line 13 outputs a Reset signal 14.

FIG. 2 is a timing diagram of FIG. AC/
V is applied to the power supply line 12 by the DC converter (power supply) 1.
A case where CC (DC+5V) is supplied will be explained. When AC is input to power supply 1 at time t0, V from power supply 1
CC involves a transient phenomenon in the power supply line 12, and t1 [
sec], then +5V is supplied. Power supply line 12
After t2 [sec] when the voltage reaches +5V, the power supply voltage confirmation signal PWON11 changes from Low level to High level. Pin 1 of the IC4 receives this power supply voltage confirmation signal PWON as a "selection signal for operating the information processing device at high speed." The 7th pin of the IC4 outputs a value logically opposite to that of the 6th pin to which the high speed clock signal 9 is input. The operating clock signal 10 of the information processing device has the same frequency as the high-speed clock signal 9, 16 MHz.
becomes. t3 when the power supply voltage confirmation signal PWON11 changes
After [sec], the Reset signal 14 changes from Low level to High level, and the reset state is released.
The information processing device will operate at a high speed of 16 MHz.

Next, the power supply line 12 is connected to the power supply line 12 by the power supply 1.
The power supply voltage VCC (DC+5V) is not supplied to the power supply line 12, and the power supply line 12 is supplied with DC+
A case where 5V is supplied will be explained. In this case, the power supply voltage determination signal 11 is always at a low level. As a result, the 7th pin of the IC4 outputs a value logically opposite to the 5th pin to which the low-speed clock signal 8 is input, and the operating clock signal 10 of the information processing device is the low-speed clock signal 8.
This is a signal with the same frequency of 8MHz. Therefore, the information processing device operates at a frequency of 8 MHz.

[0011]

As explained above, the present invention determines the operating speed depending on the type of power source, so that when operating on battery power, the operating speed is automatically slowed down to lengthen the operating time. No limit on operating time, e.g.
This has the effect of automatically increasing the operating speed when using commercial power.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an operation speed determination method for an information processing device according to an embodiment of the present invention.

FIG. 2 is a timing diagram of FIG. 1;

[Explanation of symbols]

1 AC/DC converter (power supply) 2 Oscillator 3 Frequency divider circuit (counter circuit) (TTL I
C F161) 4 Data selector circuit (TTL IC F
158) 5 Pull Up Resistor R1 6
Pull down resistor R2 7 Basic clock signal 8 Low speed clock signal 9 High speed clock signal 10 Operation clock signal 11 of information processing device
Power supply voltage confirmation signal PWON12 Power supply voltage V
CC power supply line 13 Delay line 14 Reset signal 15 Battery (power supply)

Claims (2)

[Claims] Claim 1: An information processing device that has a function of operating with at least two types of power supply systems and whose operating speed is changed depending on the frequency of a clock signal, wherein at least two power supply means compatible with the information processing device are provided. and a clock signal generation circuit that generates a clock signal having a frequency of the same number of types, and a power supply type display means that outputs a display signal that displays the type of power supply means supplied to the information processing device. and, depending on the value of the display signal,
an operating frequency selection circuit that selects and outputs one clock signal from a plurality of clock signals from the clock signal generation circuit, and controls the operating speed of the information processing device depending on the type of power supply means of the information processing device. A method for determining an operating speed of an information processing device, characterized by changing the operating speed. 2. The method for determining the operating speed of an information processing apparatus according to claim 1, wherein the at least two types of power supply means include an AC/DC converter and a battery. Speed determination method.