JPH0424817A - On/off control system for multiplexed power supply - Google Patents

On/off control system for multiplexed power supply

Info

Publication number
JPH0424817A
JPH0424817A JP2128142A JP12814290A JPH0424817A JP H0424817 A JPH0424817 A JP H0424817A JP 2128142 A JP2128142 A JP 2128142A JP 12814290 A JP12814290 A JP 12814290A JP H0424817 A JPH0424817 A JP H0424817A
Authority
JP
Japan
Prior art keywords
power supply
power
multiplexed
power supplies
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2128142A
Other languages
Japanese (ja)
Other versions
JP2538697B2 (en
Inventor
Yoshiyasu Sugimura
吉康 杉村
Shigeru Hashimoto
繁 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2128142A priority Critical patent/JP2538697B2/en
Publication of JPH0424817A publication Critical patent/JPH0424817A/en
Application granted granted Critical
Publication of JP2538697B2 publication Critical patent/JP2538697B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To turn off the power supplies of all systems with depression of the next power switch even when no coincidence is secured between the ON and OFF states of those power supplies by monitoring the power supply states of its own system and other systems and neglecting the power control pulse signal to be supplied to its own system as long as at least one of other systems is turned on when its own system is kept in an OFF state. CONSTITUTION:Each of multiplexed power supplies (#0 - #n) 10 - 1n is provided with a power ON/OFF sequence circuit 105 and an inference circuit. In a normal state the power supplies 10 - 1n are all turned on/off simultaneously. Then the power supplies 10 and 1n are turned off and on respectively and at the same time a power switch is depressed. In such conditions, the pulse signal that controls the power supply of a certain system is invalidated and this system is kept in an OFF state. Then other systems kept in the OFF states have their invalidated control pulse signals. Meanwhile the systems kept in the ON states have their valid control pulse signals and then changed to the OFF states. Thus, the power supplies of all systems are turned off with the depression of the next power switch even when no coincidence is secured between the ON and OFF states of those power supplies.

Description

【発明の詳細な説明】 〔概　要〕 例えば金融機関のオンラインシステム等に用いられる電
源部が多重化された情報処理装置の多重化された電源の
オン・オフ制御方式に関し、簡単なハードウェアの追加
によって、各県の電源のオン・オフ状態が一致しない場
合でも、次の電源スィッチの押下で全系の電源をオフで
きるようにすることを目的とし、 多重化された電源に１つの電源制御パルスを並列に供給
して交番にオン・オフさせるようにした多重化された電
源のオン・オフ制御方式において、多重化された電源の
うちの任意の１つの系の電源を制御するパルスが、該系
の電源がオフ状態にありかつ多重化された電源における
その他の系の電源のうち少なくとも１つがオンである時
には、無効とされるように構成する。[Detailed Description of the Invention] [Summary] This invention relates to a simple hardware on/off control method for multiplexed power supplies of information processing devices used in online systems of financial institutions, etc., and has multiple power supply units. The purpose of this addition is to make it possible to turn off the power to the entire system by pressing the next power switch even if the power on/off status of each prefecture does not match, and provides one power control for multiplexed power supplies. In a multiplexed power supply on/off control method in which pulses are supplied in parallel and turned on and off alternately, the pulse that controls the power supply of any one system of the multiplexed power supplies is When the power supply of the system is off and at least one of the power supplies of other systems in the multiplexed power supply is on, it is configured to be invalid.

〔産業上の利用分野〕[Industrial application field]

本発明は、例えば金融機関のオンラインシステム等に用
いられる電源部が多重化された情報処理装置の多重化さ
れた電源のオン・オフ制御方式に関する。The present invention relates to an on/off control system for multiplexed power supplies of information processing apparatuses with multiplexed power supply units used, for example, in online systems of financial institutions.

〔従来の技術〕[Conventional technology]

近年、オンラインシステムの高信頼化の要求に伴い、多
重化された情報処理装置が用いられるようになっている
。従来の多重化装置では、第４図に示すように、１つの
電源オン・オフ制御スイッチ（ノンロック型）を有し、
それを押下した時に出力されるパルス信号を各電源が受
信し、多重化装置全体の電源投入および切断を交番に行
っている。2. Description of the Related Art In recent years, multiplexed information processing devices have come to be used with the demand for higher reliability of online systems. The conventional multiplexing device has one power on/off control switch (non-locking type), as shown in Fig. 4.
Each power supply receives the pulse signal output when the button is pressed, and alternately powers on and off the entire multiplexing device.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前述のような従来方式において、全系がオフ状態の時電
源制御パルスが発生しオン状態となる場合、１つの系の
み（第４図電源＃１参照）−時的な外来ノイズ等により
電源制御パルス信号が検出できずオフ状態のままとなる
ことがある。この状態で各電源が次の電源制御パルス信
号を受信するとオフ状態の電源はオン状態、オン状態の
電源はオフ状態となり、以降電源状態が反転するのみで
、全系の電源切断不能状態になってしまうという課題が
ある（第４図下部のＯＮ・ＯＦＦ参照）。本発明は上記
課題を簡単なハードウェアの追加により解決しようとす
るものである。In the conventional method as described above, if a power supply control pulse is generated when all systems are in the off state and turned on, only one system (see power supply #1 in Figure 4) - power supply control due to temporal external noise etc. Sometimes the pulse signal cannot be detected and the device remains off. In this state, when each power supply receives the next power supply control pulse signal, the power supply that was off will be turned on, and the power supply that was on will be turned off, and from then on, the power supply state will only be reversed and the power of the entire system will not be turned off. There is a problem that the power supply is turned on and off (see ON/OFF at the bottom of Figure 4). The present invention attempts to solve the above problem by adding simple hardware.

従って、本発明の目的は、簡単なハードウェアの追加に
よって、各県の電源のオン・オフ状態が一致しない場合
でも、次の電源スィッチの押下で全系の電源をオフでき
るようにすることにある。Therefore, an object of the present invention is to make it possible to turn off the power of the entire system by pressing the next power switch, even if the power on/off status of each prefecture does not match, by adding simple hardware. be.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の１つの形態においては、多重化された電源に１
つの電源制御パルス信号を並列に供給して交番にオン・
オフさせるようにした多重化された電源のオン・オフ制
御方式において、多重化された電源のうちの任意の１つ
の糸の電源を制御するパルス信号が、鉄系の電源がオフ
状態にありかつ多重化された電源におけるその他の系の
電源のうち少なくとも１つがオンである時には、無効と
されるようにしたことを特徴とする多重化された電源の
オン・オフ制御方式が提供される。In one form of the invention, one
Supply two power supply control pulse signals in parallel to turn on and off alternately.
In the on/off control method for multiplexed power supplies that are turned off, a pulse signal that controls the power supply of any one of the multiplexed power supplies is applied when the iron power supply is in the OFF state and A multiplexed power supply on/off control method is provided, which is characterized in that it is disabled when at least one of the other system power supplies in the multiplexed power supply is on.

また、本発明の他の形態においては、１つの電源制御パ
ルス信号が多重化された電源に供給されて並列にオン・
オフ制御される多重化された電源のオン・オフ制御方式
であって、多重化された各電源の制御パルス信号入力部
に、前記電源制御パルス信号を受け、１つの系の電源に
おいて自己がオフ状態でありかつその他の系の電源のう
ち少なくとも１つがオンである時には前記電源制御パル
ス信号を無効とし、それ以外の時には該１つの系の電源
に前記電源制御パルス信号を供給するようにした論理回
路を設けたことを特徴とする多重化された電源のオン・
オフ制御方式が提供される。In another aspect of the invention, one power supply control pulse signal is supplied to multiplexed power supplies to turn them on and off in parallel.
This is an on/off control method for multiplexed power supplies that are turned off, and each multiplexed power supply receives the power supply control pulse signal at its control pulse signal input section, and the power supplies in one system are turned off. logic that disables the power supply control pulse signal when the state is in the state and at least one of the power supplies of other systems is on, and supplies the power supply control pulse signal to the power supply of the one system at other times. A multiplexed power supply on/off system featuring a circuit
An off control scheme is provided.

〔作　用〕[For production]

前述の方式を用いれば、自系の電源状態と他系の電源状
態を監視し、自系がオフ状態で他系の少なくとも１つが
オン状態である時は、自系への電源制御パルス信号を無
視するようにして自系はオフ状態のままとし、全系の電
源がオフされるようになる。If the above method is used, the power status of the own system and the power status of other systems will be monitored, and when the own system is off and at least one of the other systems is on, the power control pulse signal will be sent to the own system. The system itself is ignored and remains off, and the power to the entire system is turned off.

〔実施例〕〔Example〕

本発明の一実施例としての多重化された電源のオン・オ
フ制御方式を行う装置の回路図が第１図に示される。FIG. 1 shows a circuit diagram of an apparatus for performing on/off control of multiplexed power supplies as an embodiment of the present invention.

図において多重化された電源（＃０〜＃ｎ）はそれぞれ
１０〜１ｎと付番され、電源１０は電源オン・オフシー
ケンス回路１０５、および論理回路を具備し、論理回路
は、インバータ１０１　、アンドゲート１０２、オアゲ
ート１０３およびオープンコレクタのインバータ１０４
を含んでいる。他の電源も同様であり、電源の一部は第
１図においては記載を省略している。In the figure, the multiplexed power supplies (#0 to #n) are numbered 10 to 1n, respectively, and the power supply 10 includes a power on/off sequence circuit 105 and a logic circuit, and the logic circuit includes an inverter 101, an Gate 102, OR gate 103 and open collector inverter 104
Contains. The same applies to other power supplies, and some of the power supplies are omitted from illustration in FIG.

正常に電源が制御されている時は、ノンロック型の電源
スィッチ１から低レベルのパルス信号Ｓ１が送られ、該
パルスがインバータ１０１、アンドゲート１０２を介し
て電源オン・オフシーケンス回路を制御し、電源ｌＯを
起動し、再度スイッチｌが操作されると電源１０がオフ
される。正常な場合電源１０から電源Ｉｎまでのすべて
の電源は同時にオンされ同時にオフされる。When the power supply is normally controlled, a low-level pulse signal S1 is sent from the non-lock type power switch 1, and this pulse controls the power on/off sequence circuit via the inverter 101 and the AND gate 102. , the power supply 10 is started, and when the switch 1 is operated again, the power supply 10 is turned off. In a normal case, all the power supplies from the power supply 10 to the power supply In are turned on and turned off at the same time.

次に何等かの原因により電源（＃０）１０がオフ′状態
となり電源（＃ｎＨｎがオン状態で電源スィッチ１が押
下されたとすると次のように動作する（第２図、第３図
参照）。Next, if the power supply (#0) 10 is turned off for some reason and the power switch 1 is pressed while the power supply (#nHn is on), the operation will be as follows (see Figures 2 and 3). .

まず電源１０側では、Ｓ５１で示されるインバータ１０
４０入力信号はオフ状態（低レベル）であり、信号Ｓ２
はオン状態（低レベル）であるため、オアゲート１０３
の出力信号Ｓ４１は低レベルとなり、電源制御パルス３
３１を禁止するように動作し、信号Ｓ６１で示されるシ
ーケンス起動信号は出力されないため、電源１０はオフ
状態のままである。First, on the power supply 10 side, the inverter 10 indicated by S51
40 input signal is in the off state (low level), signal S2
is in the on state (low level), so OR gate 103
The output signal S41 becomes low level, and the power supply control pulse 3
31, and the sequence start signal indicated by signal S61 is not output, so the power supply 10 remains in the off state.

一方、電源ｌｎ側では、信号Ｓ５ｎはオン状態（高レベ
ル）であり、信号Ｓ２はオン状態（低レベル）であるた
め、オアゲートの出力Ｓ４ｎは高レベルとなり電源制御
パルスＳ３ｎを許可するように動作し、信号Ｓ６ｎのシ
ーケンス起動信号はシーケンス回路へ出力され、電源オ
ン状態からオフ状態へ遷移する。On the other hand, on the power supply ln side, the signal S5n is in the on state (high level) and the signal S2 is in the on state (low level), so the output S4n of the OR gate becomes high level and operates to permit the power supply control pulse S3n. However, the sequence start signal of signal S6n is output to the sequence circuit, and the power is changed from the on state to the off state.

このように、１つの系の電源を制御するパルス信号が、
抜糸の電源がオフ状態にありかつその他の系の電源のう
ち少なくとも１つがオンである時には、無効とされるか
ら、１つの系はオフ状態のままであり、その他の系はオ
フ状態のものは制御パルス信号が無効とされオフ状態を
続け、オン状態のものは制御パルス信号が有効であって
オン状態をオフ状態へ遷移させるから、すべての系の電
源がオフ状態となる。In this way, the pulse signal that controls the power supply of one system is
When the suture removal power supply is off and at least one of the other systems' power supplies is on, one system remains off, and the other systems remain off. The control pulse signal is invalidated and the off state continues, and the control pulse signal is valid for the on state and changes the on state to the off state, so the power supplies of all systems are turned off.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、簡単なハードウェアの追加によって、
各県の電源のオン・オフ状態が一致しない場合でも、次
の電源スィッチの押下で全系の電源をオフすることがで
きる。According to the present invention, by adding simple hardware,
Even if the power on/off status of each prefecture does not match, the entire system can be powered off by pressing the next power switch.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本発明の一実施例としての多重化された電源
のオン・オフ制御方式を行う装置の回路図、 第２図は第１図の装置の回路における一例としての信号
波形図、 第３図は第２図と同様な他の例の信号波形図、および 第４図は従来方式を説明するブロック図である。 １・・・電源スィッチ、　　１０・・・電源＃０．１ｎ
・・・電源＃ｎ、　　　　　１０１・・・インバータ、
１０２・・・アンドゲート、　１０３−・・オアゲート
、１０４・・・オーブンコレクタ型インバータ、１０５
・・・電源オン・オフシーケンス回路、である。 電源＃○ｌ：あ１７る信号波形図の 第２図 劣 償） 図1 is a circuit diagram of a device that performs an on/off control system for multiplexed power supplies as an embodiment of the present invention; FIG. 2 is a signal waveform diagram as an example of the circuit of the device shown in FIG. 1; FIG. 3 is a signal waveform diagram of another example similar to FIG. 2, and FIG. 4 is a block diagram illustrating a conventional system. 1...Power switch, 10...Power supply #0.1n
...Power source #n, 101...Inverter,
102...AND gate, 103-...OR gate, 104...Oven collector type inverter, 105
...Power on/off sequence circuit. Power supply #○l: A17 signal waveform diagram (Fig. 2 Deterioration)

Claims (1)

【特許請求の範囲】 １、多重化された電源に１つの電源制御パルス信号を並
列に供給して交番にオン・オフさせるようにした多重化
された電源のオン・オフ制御方式において、 多重化された電源のうちの任意の１つの系の電源を制御
するパルス信号が、該系の電源がオフ状態にありかつ多
重化された電源におけるその他の系の電源のうち少なく
とも１つがオンである時には、無効とされるようにした
ことを特徴とする多重化された電源のオン・オフ制御方
式。 ２、１つの電源制御パルス信号が多重化された電源に供
給されて並列にオン・オフ制御される多重化された電源
のオン・オフ制御方式であって、多重化された各電源の
制御パルス信号入力部に、前記電源制御パルス信号を受
け、１つの系の電源において自己がオフ状態でありかつ
その他の系の電源のうち少なくとも１つがオンである時
には前記電源制御パルス信号を無効とし、それ以外の時
には該１つの系の電源に前記電源制御パルス信号を供給
するようにした論理回路を設けたことを特徴とする多重
化された電源のオン・オフ制御方式。[Claims] 1. In a multiplexed power supply on/off control method in which one power supply control pulse signal is supplied in parallel to the multiplexed power supplies to turn them on and off alternately, A pulse signal that controls the power supply of any one system among the multiplexed power supplies is applied when the power supply of that system is off and at least one of the power supplies of the other systems in the multiplexed power supply is on. , a multiplexed power supply on/off control method characterized by being disabled. 2. A multiplexed power supply on/off control method in which one power supply control pulse signal is supplied to multiplexed power supplies to control on/off in parallel, and the control pulse for each multiplexed power supply A signal input section receives the power supply control pulse signal and invalidates the power supply control pulse signal when the power supply of one system is in the off state and at least one of the power supplies of the other system is on; 1. A multiplexed power supply on/off control system, characterized in that a logic circuit is provided for supplying the power supply control pulse signal to the power supply of the one system at other times.
JP2128142A 1990-05-19 1990-05-19 Information processing device Expired - Fee Related JP2538697B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2128142A JP2538697B2 (en) 1990-05-19 1990-05-19 Information processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2128142A JP2538697B2 (en) 1990-05-19 1990-05-19 Information processing device

Publications (2)

Publication Number Publication Date
JPH0424817A true JPH0424817A (en) 1992-01-28
JP2538697B2 JP2538697B2 (en) 1996-09-25

Family

ID=14977438

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2128142A Expired - Fee Related JP2538697B2 (en) 1990-05-19 1990-05-19 Information processing device

Country Status (1)

Country Link
JP (1) JP2538697B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5534021B2 (en) * 2010-09-16 2014-06-25 富士通株式会社 Storage device, control unit, and storage device control method
US9950843B2 (en) 2014-11-18 2018-04-24 Shinko Chemical Co., Ltd. Packaging container

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5534021B2 (en) * 2010-09-16 2014-06-25 富士通株式会社 Storage device, control unit, and storage device control method
US9950843B2 (en) 2014-11-18 2018-04-24 Shinko Chemical Co., Ltd. Packaging container

Also Published As

Publication number Publication date
JP2538697B2 (en) 1996-09-25

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