JPH0424650Y2 - - Google Patents
Info
- Publication number
- JPH0424650Y2 JPH0424650Y2 JP1985032331U JP3233185U JPH0424650Y2 JP H0424650 Y2 JPH0424650 Y2 JP H0424650Y2 JP 1985032331 U JP1985032331 U JP 1985032331U JP 3233185 U JP3233185 U JP 3233185U JP H0424650 Y2 JPH0424650 Y2 JP H0424650Y2
- Authority
- JP
- Japan
- Prior art keywords
- line
- transmission line
- winding
- ferrite
- terminator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004804 winding Methods 0.000 claims description 15
- 230000005540 biological transmission Effects 0.000 claims description 14
- 229910000859 α-Fe Inorganic materials 0.000 claims description 11
- 239000011324 bead Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Landscapes
- Filters And Equalizers (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は、伝送線路の途中に設け、信号源や受
電端とのインピーダンス不整合にもとづく反射や
リンギングを吸収するための線路終端器に関する
ものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a line terminator installed in the middle of a transmission line to absorb reflections and ringing due to impedance mismatch between the signal source and the receiving end. It is.
一般に信号の伝送経路は、信号源インピーダン
ス、線路インピーダンス、受電端インピーダンス
が常に整合状態になければ電力の効率よい伝送は
行なわれないばかりか、信号源と受電端間で多重
反射を起し有害な放射雑音となつて、他の電子機
器に障害を与える可能性が高いことはよく知られ
ている。送信機と送信アンテナ、受信機の受信ア
ンテナの例のように、信号源と受電端のインピー
ダンスが1対1対応で、しかも常に一定の値を維
持できる系においては、適切な伝送経路を設けれ
ば上記障害は容易に解消することができる。
In general, in a signal transmission path, if the signal source impedance, line impedance, and receiving end impedance are not always matched, not only will efficient power transmission be impossible, but multiple reflections will occur between the signal source and receiving end, causing harmful effects. It is well known that there is a high possibility that this will become radiated noise and cause damage to other electronic devices. In systems where the impedance between the signal source and receiving end has a one-to-one correspondence and can always maintain a constant value, as in the example of the transmitter, transmitting antenna, and receiver's receiving antenna, an appropriate transmission path must be provided. The above-mentioned problems can be easily overcome.
しかしながら、最近のデジタル機器の信号の送
信にあつては、信号源及び受電端のインピーダン
スは動的に変化し、伝送線路だけがある一定の値
を維持している系では、インピーダンス不整合に
起因したパルスの多重反射やパルス立上りにおけ
るリンギング現象などを誘発し電磁妨害の一因と
なつている。
However, when transmitting signals from modern digital devices, the impedance of the signal source and receiving end changes dynamically, and in systems where only the transmission line maintains a certain value, impedance mismatch may occur. This causes multiple reflections of pulses and ringing phenomena at the rise of pulses, contributing to electromagnetic interference.
本考案はこれらの点に鑑み、不要な反射やリン
ギングを効率よく吸収するための線路終端回路を
提供するものである。
In view of these points, the present invention provides a line termination circuit for efficiently absorbing unnecessary reflections and ringing.
本考案は、伝送線路と信号源や受電端とのイン
ピーダンス不整合にもとづく反射やリンギングを
吸収するために該伝送線路に設ける線路終端器に
おいて、該伝送線を貫通するか巻き付けられるこ
とによつて該伝送線路上に配置されるフエライト
ビードと、該フエライトビードに巻回された巻線
と、該巻線の両端間に接続された抵抗とで構成し
た線路終端器である。 The present invention provides a line terminator that is installed on a transmission line in order to absorb reflections and ringing due to impedance mismatch between the transmission line and the signal source or receiving end. The line terminator includes a ferrite bead placed on the transmission line, a winding wound around the ferrite bead, and a resistor connected between both ends of the winding.
以下図面に従つて本考案の内容を詳細に説明す
る。本考案は、抵抗終端にフエライト磁心を利用
していることに特徴を有する。 The contents of the present invention will be explained in detail below with reference to the drawings. The present invention is characterized in that it utilizes a ferrite magnetic core for resistor termination.
第1図に本考案の最も簡単な実施例を示す。本
実施例ではフエライト磁心3に1次巻線導体とし
て線路1を貫通させ、他の巻線導体2によつて2
次回路を形成している。2次回路は終端抵抗Rに
よつて終端されている。これを回路図で示すと第
2図のようになる。5はフエライト磁心の高周波
損失分rで2次回路と結合するインダクタンスL
が6である。
FIG. 1 shows the simplest embodiment of the invention. In this embodiment, the ferrite magnetic core 3 is passed through the line 1 as a primary winding conductor, and the other winding conductor 2
The following circuit is formed. The secondary circuit is terminated by a terminating resistor R. This is shown in a circuit diagram as shown in FIG. 5 is the high frequency loss r of the ferrite magnetic core, and the inductance L coupled to the secondary circuit
is 6.
ここで、一次巻線1に流れる電流が直流のとき
は、rやLは生じないので、フエライト磁心や抵
抗Rの影響を受けない、即ち一次側から見た抵抗
RXは0である。一次巻線1に流れる電流が交流
のときは、その周波数が高くなるとともに、rや
Lの作用が現われ、二次側の抵抗Rが影響して来
る。従つて、一次側から見たインピーダンスRX
は第4図に示すように、周波数の増加とともに高
くなり、純抵抗RX0に漸近する。この純抵抗RX0
は一次巻線の巻数をn1、二次巻線の巻数をn2とす
ると、
RX0=(n1/n2)2×R
で表わされる。 Here, when the current flowing through the primary winding 1 is direct current, r and L do not occur, so it is not affected by the ferrite magnetic core or the resistance R, that is, the resistance seen from the primary side.
RX is 0. When the current flowing through the primary winding 1 is alternating current, its frequency increases and the effects of r and L appear, and the resistance R on the secondary side comes into play. Therefore, the impedance R X seen from the primary side
As shown in FIG. 4, as the frequency increases, R becomes higher and approaches the pure resistance R X0 . This pure resistance R
is expressed as R X0 =(n 1 /n 2 ) 2 ×R, where n 1 is the number of turns of the primary winding and n 2 is the number of turns of the secondary winding.
以上のことから明らかなように、線路1の周り
にフエライトビードコア3を配置し、コア3に2
次巻線2を巻き、2次巻線2の両端を純抵抗4で
接続すると、線路を流れる電流が直流や周波数の
低い帯域では、上記抵抗は線路に全く影響しない
か、ほとんど影響しない。しかしながら、反射や
リンギングが問題となる周波数の高い領域では純
抵抗RX0として作用し、伝送エネルギーの損失を
最小減に抑えることができる。 As is clear from the above, the ferrite bead core 3 is placed around the track 1, and the core 3 has two
When the secondary winding 2 is wound and both ends of the secondary winding 2 are connected with a pure resistor 4, the resistance has no or almost no effect on the line when the current flowing through the line is direct current or in a low frequency band. However, in a high frequency region where reflection and ringing are a problem, it acts as a pure resistance R X0 and can minimize transmission energy loss.
第5図を参照して、本考案によれば、デイジタ
ル伝送で良く使用されるパラレル伝送路1-1,1
−2,……1−nを1つのフエライト環状磁心3に
貫通し、一本の2次巻線2を抵抗4で終端させる
ことによつて、全線路の線路終端を一つの終端器
で行なうことができる。 Referring to FIG. 5, according to the present invention, parallel transmission lines 1 -1 , 1 which are often used in digital transmission
-2 ,...1-n pass through one ferrite annular magnetic core 3, and one secondary winding 2 is terminated with a resistor 4, thereby terminating the entire line with one terminator. be able to.
第5図の場合の一次側から見た等価回路を示す
と第6図のようになる。 The equivalent circuit seen from the primary side in the case of FIG. 5 is shown in FIG. 6.
本考案によれば、線路に直接抵抗を接続するこ
となく、しかも高周波の反射波やリンギングを吸
収できる線路終端器が、簡単な構成で実現でき、
その上、多チヤンネル系においても一つの終端器
で、同時に線路終端を行なえるので、デイジタル
電子機器の電磁妨害対策上極めて有効である。
According to the present invention, a line terminator that can absorb high-frequency reflected waves and ringing without directly connecting a resistor to the line can be realized with a simple configuration.
Furthermore, even in a multi-channel system, lines can be terminated at the same time using a single terminator, which is extremely effective as a countermeasure against electromagnetic interference in digital electronic equipment.
第1図は本考案の一実施例を示す斜視図、第2
図はその回路図、第3図は高周波での等価回路
図、第4図は第 図の等価抵抗RXの周波数に対
する変化を示す図、第5図は本考案の他の実施例
を示す斜視図、第6図はその等価回路図である。
1-1,1-2,1−n……一次巻線としての線
路、2……二次巻線、3……フエライト環状磁
心、4……純抵抗、RX……等価抵抗。
Fig. 1 is a perspective view showing one embodiment of the present invention;
The figure shows the circuit diagram, Figure 3 is an equivalent circuit diagram at high frequency, Figure 4 is a diagram showing the variation of the equivalent resistance R 6 are equivalent circuit diagrams thereof. 1 -1 , 1 -2 , 1-n...Line as primary winding, 2...Secondary winding, 3...Ferrite annular magnetic core, 4...Pure resistance, Rx ...Equivalent resistance.
Claims (1)
不整合にもとづく反射やリンギングを吸収するた
めに該伝送線路に設ける線路終端器において、該
伝送線を貫通するか巻き付けられることによつて
該伝送線路上に配置されるフエライトビードと、
該フエライトビードに巻回された巻線と、該巻線
の両端間に接続された純抵抗とで構成した線路終
端器。 A line terminator installed on a transmission line to absorb reflections and ringing due to impedance mismatching between the transmission line and the signal source or receiving end, which terminates on the transmission line by passing through or wrapping around the transmission line. Ferrite beads placed in
A line terminator comprising a winding wound around the ferrite bead and a pure resistor connected between both ends of the winding.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985032331U JPH0424650Y2 (en) | 1985-03-08 | 1985-03-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985032331U JPH0424650Y2 (en) | 1985-03-08 | 1985-03-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61151425U JPS61151425U (en) | 1986-09-19 |
JPH0424650Y2 true JPH0424650Y2 (en) | 1992-06-11 |
Family
ID=30533746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985032331U Expired JPH0424650Y2 (en) | 1985-03-08 | 1985-03-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0424650Y2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002280858A (en) * | 2001-03-16 | 2002-09-27 | Hitachi Kokusai Electric Inc | Filter circuit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56122201A (en) * | 1980-01-31 | 1981-09-25 | Rca Corp | Impedance converter |
JPS6057504A (en) * | 1983-09-09 | 1985-04-03 | Hitachi Ltd | Signal transmitting circuit |
-
1985
- 1985-03-08 JP JP1985032331U patent/JPH0424650Y2/ja not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56122201A (en) * | 1980-01-31 | 1981-09-25 | Rca Corp | Impedance converter |
JPS6057504A (en) * | 1983-09-09 | 1985-04-03 | Hitachi Ltd | Signal transmitting circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002280858A (en) * | 2001-03-16 | 2002-09-27 | Hitachi Kokusai Electric Inc | Filter circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS61151425U (en) | 1986-09-19 |
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