JPH04227392A - Television signal processing system - Google Patents

Television signal processing system

Info

Publication number
JPH04227392A
JPH04227392A JP3136260A JP13626091A JPH04227392A JP H04227392 A JPH04227392 A JP H04227392A JP 3136260 A JP3136260 A JP 3136260A JP 13626091 A JP13626091 A JP 13626091A JP H04227392 A JPH04227392 A JP H04227392A
Authority
JP
Japan
Prior art keywords
signal
television signal
television
scanning
field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3136260A
Other languages
Japanese (ja)
Inventor
Kazumasa Matsui
松井 一征
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Hitachi Ltd
Original Assignee
Hitachi Denshi KK
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK, Hitachi Ltd filed Critical Hitachi Denshi KK
Priority to JP3136260A priority Critical patent/JPH04227392A/en
Publication of JPH04227392A publication Critical patent/JPH04227392A/en
Pending legal-status Critical Current

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  • Color Television Systems (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To reproduce a picture with lots of scanning lines without flickering by forming an output of an image pickup element device of sequential scanning into an interlace signal, sending the signal and allowing a reception section to reproduce the signal as the sequential scanning television signal. CONSTITUTION:A line sequential scanning signal is obtained by an image pickup device and it is converted into an interlace scanning television signal 120 by using storage circuits (scanning line buffer storage circuits) 108-110 and the resulting signal is sent. Then the receiver side converts the signal into a signal of line sequential scanning having a frame frequency being a multiple of (n) of the frame frequency of the television signal 120 to reproduce the picture. That is, the line sequential picture signal is converted into an interlace television signal comprising n-fields by one frame and the receiver side converts the television signal into a line sequential signal having a frequency being a multiple of (n) of the frame frequency of the television signal and reproduces it.

Description

【発明の詳細な説明】[Detailed description of the invention]

【0001】0001

【産業上の利用分野】本発明は、テレビ信号処理方式、
更に詳しく言えば、テレビ信号を眼が疲労しないより良
い画質の得られるテレビ信号に変換する信号処理方式に
関するものである。
[Industrial Application Field] The present invention relates to a television signal processing system,
More specifically, the present invention relates to a signal processing method for converting a television signal into a television signal that provides better image quality without causing eye fatigue.

【0002】0002

【従来技術】現行の標準テレビ方式においては、所要周
波数帯域を減らすために飛越走査を採用している。その
ため、画面の垂直に急激に変化する部分にちらつきを感
じてしまう。
BACKGROUND OF THE INVENTION Current standard television systems employ interlaced scanning to reduce the required frequency band. As a result, flickering appears in parts of the screen that change rapidly vertically.

【0003】図1を用いてちらつきの生じる理由を説明
する。図1において、第1フイルドの走査線群1が順次
走査され、次に、走査線群1の中間に存在する第2フイ
ルドの走査線群2が順次走査され、また第1フイルドの
走査線群1が走査されるというように走査が行なわれる
。したがって、画面が垂直方向に急激に変化している場
合、たとえば図1に示すように上が黒で下が白へ急激に
変化している場合には、第1フイルドの黒から白への変
化3と第2フイルドの黒から白への変化4の場所が1走
査線間隔だけずれてしまう。したがって、白黒の変化の
場所がフレーム周期で上下することになり、これが画面
の垂直に急激に変化する部分でちらつきを感じさせる。
The reason why flickering occurs will be explained with reference to FIG. In FIG. 1, the scanning line group 1 of the first field is sequentially scanned, then the scanning line group 2 of the second field located in the middle of the scanning line group 1 is sequentially scanned, and the scanning line group 1 of the first field is sequentially scanned. 1 is scanned, and so on. Therefore, if the screen changes suddenly in the vertical direction, for example from black at the top to white at the bottom, as shown in Figure 1, the change from black to white in the first field 3 and the location of the change from black to white in the second field 4 are shifted by one scanning line interval. Therefore, the location of the change in black and white moves up and down with the frame period, which causes a flicker to appear in areas of the screen where there is a sudden vertical change.

【0004】0004

【発明が解決しようとする課題】上記のちらつきは、通
常の画面ではあまり気にならないけれども、多くの水平
線が規則的に並んだり、水平に近い線が一点に集中する
画面では、非常に気になる。また、長時間テレビ画像を
観視する場合の眼の疲労の原因となる。
[Problem to be Solved by the Invention] The above flickering does not bother you much on a normal screen, but it becomes very noticeable on a screen where many horizontal lines are arranged regularly or near-horizontal lines are concentrated at one point. Become. It also causes eye fatigue when viewing television images for a long time.

【0005】したがって、本発明の目的は、飛越走査を
採用しているテレビ信号から、ちらつきを生じないテレ
ビ信号を得るテレビ信号処理方式を実現することである
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to realize a television signal processing system for obtaining a flickering-free television signal from a television signal employing interlaced scanning.

【0006】[0006]

【課題を解決するための手段】本発明では、上記の目的
を達成するため、撮像装置で線順次走査の信号を得て、
これを記憶回路を用いて飛越走査(インタレース)のテ
レビ信号に変換して送信し、受像側で上記テレビ信号の
フレーム周波数のn倍のフレーム周波数の線順次走査の
信号に変換して画像を再生するようにしたものである。
[Means for Solving the Problems] In order to achieve the above object, the present invention obtains line-sequential scanning signals with an imaging device,
This is converted into an interlaced television signal using a storage circuit and transmitted, and on the receiver side it is converted into a line-sequential scanning signal with a frame frequency n times the frame frequency of the television signal to display the image. It is designed to be played back.

【0007】以下の実施例では、インタレースは現在一
般に行なわれている2:1の場合について説明するが、
本発明はn(n>2以上の整数):1の場合についても
実現できる。
[0007] In the following example, the case where interlace is 2:1, which is generally practiced at present, will be explained.
The present invention can also be implemented in the case of n (an integer greater than or equal to 2):1.

【0008】[0008]

【作用】本発明は順次走査の撮像装置の出力をインタレ
ース信号にして伝送し、受信部で順次走査のテレビ信号
として再生するため、インタレースによる現行の伝送帯
域を使用しながら、走査線の多い画像をちらつきがなく
再生することができる。
[Operation] The present invention transmits the output of a progressive scanning imaging device as an interlaced signal, and reproduces it as a progressive scanning television signal in the receiving section. A large number of images can be played back without flickering.

【0009】[0009]

【実施例】図2は本発明によるテレビ信号処理方式の一
実施例における送信側の撮像装置の出力である線順次走
査された画像信号を2:1のインタレースされたテレビ
信号に変換する部分の構成を示す構成図である。
[Embodiment] FIG. 2 shows a portion of converting a line-sequentially scanned image signal output from an imaging device on the transmitting side into a 2:1 interlaced television signal in an embodiment of the television signal processing method according to the present invention. FIG. 2 is a configuration diagram showing the configuration of.

【0010】飛越走査を行なわない、すなわちフレーム
を上から下まで順次走査する撮像装置からの三原色信号
101,102および103は、一般に知られているマ
トリックス回路104によって輝度信号105と二つの
色信号106および107に変換される。信号105,
106および107は少なくとも1フイルド分の容量を
持つ緩衝記憶回路108,109および110にそれぞ
れ読み込まれる。
Three primary color signals 101, 102, and 103 from an imaging device that does not perform interlaced scanning, that is, sequentially scans a frame from top to bottom, are converted into a luminance signal 105 and two color signals 106 by a generally known matrix circuit 104. and 107. signal 105,
106 and 107 are read into buffer memory circuits 108, 109 and 110, respectively, each having a capacity of at least one field.

【0011】緩衝記憶回路108,109および110
は、同期信号111からタイミング発生回路112によ
って発生させられるタイミング信号113によって走査
線を一本おきに出力114,115,116に読み出し
て飛越走査を行なった信号に変換する。容量が1フイル
ドでも良い理由は読み出した所に順次到来する信号を書
き込めばよいからである。従って、夫々1フレーム分の
容量を用意すれば読出した所に書込む必要がなく、タイ
ミング発生回路112の構成が簡単になる。二つの色信
号に対応する出力115および116は、一般に知られ
ている変調回路117に与えられ搬送色信号118に変
換される。輝度信号に対応する出力114と搬送色信号
118は、加算回路119によって加算され複合カラー
テレビ信号120となる。すなわち、1/30秒毎に5
25本の順次走査された信号が緩衝記憶回路108,1
09,110に記録され、走査線を1本おきに読み出す
から262.5本分の信号が1/60秒の間に読出され
1フイールド分の画像信号を得て、次の1/60秒の間
に残りの262.5本分が読出され1フイールドの信号
に変換される。これをくり返すことによって、通常のテ
レビ信号と同様のインタレースされた信号となる。
Buffer storage circuits 108, 109 and 110
reads every other scanning line to outputs 114, 115, and 116 using a timing signal 113 generated by a timing generation circuit 112 from a synchronization signal 111, and converts it into an interlaced scanning signal. The reason why it is sufficient to have a capacity of one field is that it is sufficient to write the signals that arrive sequentially in the read locations. Therefore, if a capacity for one frame is provided for each, there is no need to write to the read location, and the configuration of the timing generation circuit 112 becomes simpler. Outputs 115 and 116 corresponding to the two color signals are applied to a commonly known modulation circuit 117 and converted into a carrier color signal 118. The output 114 corresponding to the luminance signal and the carrier color signal 118 are summed by a summing circuit 119 to form a composite color television signal 120. That is, every 1/30 second 5
The 25 sequentially scanned signals are sent to the buffer memory circuit 108,1.
09,110, and since every other scanning line is read out, 262.5 signals are read out in 1/60 seconds to obtain an image signal for one field, and then the next 1/60 second signal is read out. In the meantime, the remaining 262.5 lines are read out and converted into one field signal. By repeating this process, an interlaced signal similar to a normal television signal is obtained.

【0012】図2においてマトリックス回路104と緩
衝記憶回路108,109,110の順序を逆にしても
所定の動作をするけれども、三つの緩衝記憶回路の帯域
を輝度信号と同じにしなければならないため回路規模が
大きくなる。
In FIG. 2, even if the order of the matrix circuit 104 and the buffer memory circuits 108, 109, and 110 is reversed, the prescribed operation is performed, but since the band of the three buffer memory circuits must be made the same as that of the luminance signal, the circuit The scale becomes larger.

【0013】図3は、図2の変換回路によって発生させ
られた飛越走査を行なうカラーテレビ信号を、公知輝度
、色信号分離回路により輝度信号と色信号に分離した後
に、飛越走査をしない(順次走査)信号に変換するため
の変換回路の構成を示す図面である。
FIG. 3 shows a color television signal generated by the conversion circuit of FIG. 2 which is subjected to interlaced scanning, after being separated into a luminance signal and a chrominance signal by a known luminance and chrominance signal separation circuit. 2 is a drawing showing the configuration of a conversion circuit for converting into a scanning (scanning) signal.

【0014】図3において、入力信号201は、二つの
1フイルド遅延回路202および203によって、1フ
イルド遅延した信号204と2フイルド遅延した信号2
05が発生させられる。入力信号201と1フイルド遅
延された信号204は、スイッチ回路206の二つの入
力となり、また、1フイルド遅延された信号204と2
フイルド遅延された信号205は、スイッチ回路207
の二つの入力となる。スイッチ回路206と207は、
垂直同期信号208により制御され、1フイルド遅延さ
れた信号が第1フイルドに有る場合には、入力信号20
1と1フイルド遅延され信号204を出力209および
210にそれぞれ接続する。また、1フイルド遅延され
た信号204が第2フイルドに有る場合には、1フイル
ド遅延させられた信号204と2フイルド遅延させられ
た信号205を出力209および210にそれぞれ出力
する。したがって、出力209と210には、常に同じ
フレームと第2フイルドと第1フイルドが現われている
ことになる。
In FIG. 3, an input signal 201 is converted into a signal 204 delayed by 1 field and a signal 2 delayed by 2 fields by two 1-field delay circuits 202 and 203.
05 is generated. The input signal 201 and the signal 204 delayed by 1 field become two inputs of the switch circuit 206, and the signal 204 delayed by 1 field and the signal 204 delayed by 1 field become the two inputs of the switch circuit 206.
The field-delayed signal 205 is sent to the switch circuit 207
There are two inputs. The switch circuits 206 and 207 are
Controlled by the vertical synchronization signal 208, if the signal delayed by one field is present in the first field, the input signal 20
1 and 1 field delayed signals 204 are connected to outputs 209 and 210, respectively. Further, when the signal 204 delayed by one field is present in the second field, the signal 204 delayed by one field and the signal 205 delayed by two fields are outputted to outputs 209 and 210, respectively. Therefore, the same frame, second field, and first field always appear in the outputs 209 and 210.

【0015】出力209と210は、走査線緩衝記憶回
路213と215とスイッチ回路224によって飛越走
査をしない信号225に変換される。
The outputs 209 and 210 are converted into a signal 225 without interlaced scanning by scanning line buffer storage circuits 213 and 215 and a switch circuit 224.

【0016】図4及び図5の波形図を用いて、上記受信
部の信号変換の動作を説明する。
The signal conversion operation of the receiving section will be explained using the waveform diagrams of FIGS. 4 and 5.

【0017】図4は、説明の便宜上図3のスイッチ20
6,207のスイッチが上側になった場合を示す。(図
3と同一物は同一の番号を付している)。
FIG. 4 shows the switch 20 of FIG. 3 for convenience of explanation.
6,207 is in the upper position. (Things that are the same as those in FIG. 3 are given the same numbers).

【0018】前述の如く、信号209と210はそれぞ
れ同一フレームにおける第2フイールドと第1フイルム
の信号が発生しており、これらは走査線数とフイルド周
期の関係によって、図5の如く180度の位相差を持ち
、隣り合う走査線が同一の時刻に存在するようになる。
As mentioned above, the signals 209 and 210 are generated from the second field and the first film in the same frame, respectively, and depending on the relationship between the number of scanning lines and the field period, they are separated by 180 degrees as shown in FIG. There is a phase difference so that adjacent scanning lines exist at the same time.

【0019】緩衝記憶回路213,215はいずれも、
少なくとも一走査線の半分の画素の記憶容量を持ち、書
き込みの速度と読出しの速度を独立にできる記憶回路で
、半導体ランダムアクセス記憶集積回路、磁心ランダム
アクセス記憶装置などで構成される。記憶容量が0.5
走査線で良い理由は、読み出した後へ順次残りの部分を
読み込めば良いからである。したがって、1走査線分の
記憶容量を用意すれば、読出した後へ書きこむ必要がな
くなるので、緩衝記憶回路213および215の制御回
路が簡単になる。
Both buffer memory circuits 213 and 215 are
A memory circuit that has a storage capacity of at least half the pixels of one scanning line, and is capable of independent writing and reading speeds, and is composed of semiconductor random access memory integrated circuits, magnetic core random access memory devices, etc. Storage capacity is 0.5
The reason why a scanning line is fine is that after reading out the remaining portion, it is sufficient to sequentially read the remaining portion. Therefore, if a storage capacity for one scanning line is provided, there is no need to write data after reading, and the control circuit for buffer storage circuits 213 and 215 becomes simpler.

【0020】これらの緩衝記憶回路213,215およ
びスイッチ回路224を駆動するため、テレビ信号20
1から同期信号分離回路226で水平同期信号227を
分離し、それを用いてクロック発生回路228で水平同
期信号に同期したクロック信号229を作り、書き込み
を制御する。又読み出しは上記クロック信号の2倍の速
度で読み出す。逓倍器230で上記分離された水平同期
信号から、水平同期信号の半分の周期を持つ同期信号2
31を発生し、スイッチ回路224を制御する。
In order to drive these buffer memory circuits 213, 215 and switch circuit 224, the television signal 20
A horizontal synchronizing signal 227 is separated from the horizontal synchronizing signal 227 by a synchronizing signal separating circuit 226, and is used to generate a clock signal 229 synchronized with the horizontal synchronizing signal in a clock generating circuit 228 to control writing. Also, reading is performed at twice the speed of the above clock signal. A synchronization signal 2 having half the period of the horizontal synchronization signal is generated from the horizontal synchronization signal separated by the multiplier 230.
31 and controls the switch circuit 224.

【0021】したがって、テレビ信号201および20
4を0.5走査線容量の緩衝記憶回路213と215に
それぞれ走査線の中央まで読み込んでおいて、それぞれ
出力213´および215´に図5の波形213´(破
線)、215(実線)のように2倍のスピードで読み出
して、スイッチ回路224を用いて、水平周期の半分の
周期で出力213´と215´を交互に切り換えて出力
すれば、波形225に示すように、1フイルドを新しい
1フレームとする飛越走査を行なわない変換されたテレ
ビ信号225が得られる。
[0021] Therefore, the television signals 201 and 20
4 to the center of the scanning line in buffer memory circuits 213 and 215 with a 0.5 scanning line capacity, respectively, and the waveforms 213' (broken line) and 215 (solid line) in FIG. If the reading speed is doubled as shown in FIG. A converted television signal 225 is obtained without performing interlaced scanning for one frame.

【0022】以上本発明を実施例によって説明したが、
本発明は上記実施例に限定されるものでなく、画質の許
すかぎり、テレビ信号の輝度成分、あるいは輝度成分の
低周波部のみに適用することも本発明に含まれるもので
ある。又、実施例は2:1のインタレースされたテレビ
信号について説明したが一般にn:1のインタレースさ
れた場合にも適用される。この場合は送信側の変換回路
では少なくとも(n−1)個のフイルド分の緩衝記憶回
路を必要とし、受信側では2(n−1)個のフイルド遅
延回路が必要となる。
The present invention has been explained above using examples, but
The present invention is not limited to the above-mentioned embodiments, and the present invention includes application only to the luminance component of a television signal or the low frequency portion of the luminance component, as long as image quality permits. Further, although the embodiments have been described with respect to a 2:1 interlaced television signal, the present invention generally also applies to n:1 interlaced television signals. In this case, the conversion circuit on the transmitting side requires buffer storage circuits for at least (n-1) fields, and the receiving side requires 2(n-1) field delay circuits.

【0023】また、本発明の回路の説明をアナログ処理
とディジタル処理の区別なく説明してきたが、ディジタ
ル処理および標本化をともなう処理を行なう場合には、
AD変換回路、DA変換回路、瀘波回路が必要となる。 しかしながら、これらの回路をどのように用いるかは、
関連分野の技術者の常識とするところなので、説明を省
いた。
Furthermore, although the circuit of the present invention has been explained without distinguishing between analog processing and digital processing, when performing processing involving digital processing and sampling,
An AD conversion circuit, a DA conversion circuit, and a filter circuit are required. However, how to use these circuits is
Since this is common knowledge for engineers in related fields, I have omitted the explanation.

【0024】[0024]

【発明の効果】本発明は順次走査の撮像装置の出力をイ
ンタレース信号にして伝送し、受信部で順次走査のテレ
ビ信号として再生するため、インタレースによる現行の
伝送帯域を使用しながら、走査線の多い画像をちらつき
がなく再生することができる。
Effects of the Invention The present invention transmits the output of a progressive scanning imaging device as an interlaced signal and reproduces it as a progressive scanning television signal in the receiving section. Images with many lines can be played back without flickering.

【図面の簡単な説明】[Brief explanation of the drawing]

【図1】従来の飛越走査を説明する図面[Figure 1] Drawing explaining conventional interlaced scanning

【図2】本発明
によるテレビ信号処理方式における送信側および、受信
側における信号変換回路の構成を示す図
FIG. 2 is a diagram showing the configuration of signal conversion circuits on the transmitting side and receiving side in the television signal processing system according to the present invention.

【図3】本発明
によるテレビ信号処理方式における送信側および、受信
側における信号変換回路の構成を示す図
FIG. 3 is a diagram showing the configuration of signal conversion circuits on the transmitting side and receiving side in the television signal processing system according to the present invention.

【図4】上記図
3の信号変換回路の構成図
[Figure 4] Configuration diagram of the signal conversion circuit shown in Figure 3 above

【図5】図3の動作を示す波
形図
[Figure 5] Waveform diagram showing the operation of Figure 3

【符号の説明】[Explanation of symbols]

104…マスリックス回路、108,109,110…
緩衝記憶回路、112…タイミグ発生回路、117…変
調回路、202,203…フイルド遅延回路、213,
215…緩衝記憶回路。
104...Mathrix circuit, 108, 109, 110...
Buffer storage circuit, 112... Timing generation circuit, 117... Modulation circuit, 202, 203... Field delay circuit, 213,
215...Buffer memory circuit.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】送信側で撮像装置によって得られた線順次
の画像信号を1フレームがnフイルドからなるインタレ
ースされたテレビ信号に変換し、受信側で上記テレビ信
号をフレーム周波数が上記テレビ信号のフレーム周波数
のn倍の線順次走査信号に変換するテレビ信号処理方式
であって、受信側で、入力された第1のテレビ信号と、
第1のテレビ信号から1フイルド遅延された第2のテレ
ビと、第1のテレビ信号から2フイルド遅延された第3
のテレビ信号とを得て、第2のテレビ信号が第1フイル
ドの信号であるときは上記第1および第2のテレビ信号
が、第2のテレビ信号が第2フイルドの信号があるとき
は上記第2および第3のテレビ信号が発生するように上
記第1、第2、第3のテレビ信号から2つのテレビ信号
を選択し、上記選択された2つのテレビ信号のそれぞれ
の時間を1/2に圧縮し、圧縮された上記2つのテレビ
信号を走査線単位で交互に切換えて時系列のテレビ信号
に変換するテレビ信号処理方式。
1. A transmitting side converts a line-sequential image signal obtained by an imaging device into an interlaced television signal in which one frame consists of n fields, and a receiving side converts the television signal into an interlaced television signal whose frame frequency is the same as that of the television signal. A television signal processing method that converts an input first television signal into a line-sequential scanning signal with n times the frame frequency of
a second television signal delayed by one field from the first television signal; and a third television signal delayed by two fields from the first television signal.
When the second television signal is a signal of the first field, the first and second television signals are obtained, and when the second television signal is a signal of the second field, the above television signal is obtained. Select two television signals from the first, second, and third television signals such that a second and third television signal are generated, and halve the time of each of the two selected television signals. A television signal processing method that converts the two compressed television signals into a time-series television signal by switching alternately on a scanning line basis.
JP3136260A 1991-06-07 1991-06-07 Television signal processing system Pending JPH04227392A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3136260A JPH04227392A (en) 1991-06-07 1991-06-07 Television signal processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3136260A JPH04227392A (en) 1991-06-07 1991-06-07 Television signal processing system

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP58242032A Division JPS59181789A (en) 1983-12-23 1983-12-23 Television signal processing system

Publications (1)

Publication Number Publication Date
JPH04227392A true JPH04227392A (en) 1992-08-17

Family

ID=15171029

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3136260A Pending JPH04227392A (en) 1991-06-07 1991-06-07 Television signal processing system

Country Status (1)

Country Link
JP (1) JPH04227392A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6262115A (en) * 1985-09-13 1987-03-18 Hitoshi Ashina Welding torch portion in gas sealed arc welding machine

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6262115A (en) * 1985-09-13 1987-03-18 Hitoshi Ashina Welding torch portion in gas sealed arc welding machine

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