JPH0422342B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] This project focuses on semiconductor devices, especially the newly developed THETA (Tunneling Hot Electron
Transfer Amplifier) or HET (Hot
Concerning improvements to semiconductor devices called electron transistors. Microelectronics is currently making remarkable progress, and in order to make further progress, research is being conducted to realize new semiconductor devices based on operating principles different from those of conventional transistors. Although the HET is a semiconductor device based on such a new operating principle, its base contact has problems as described below, and a solution to these problems is strongly desired. [Prior Art] In the previously proposed HET, the operation shown in the potential diagram of FIG. 2a is performed. (M. Heiblum;
1980 IEEE Electron Devices Meeting) That is, this device has three areas: an emitter, a base, and a collector, and potential barriers between the base, emitter, and collector, respectively.
For example, when a bias voltage is applied to this device to make the emitter a negative potential with respect to the base at a temperature of 77K, electrons penetrate the barrier between the emitter and base due to the tunnel effect, and the emitter current I _E
Configure. These electrons have approximately the same energy, and in the base region are at an energy level higher than the conduction band edge by eV _BE due to the emitter-base potential difference V _BE . Due to this energy, the electrons move toward the collector in the hot electron state, and in this direction (X
The probability that an electron _passes through the base region of length d _B is exp(−d _B /
l _e ). The barrier height on the collector side with respect to the base region is φ _c , 1/of the normal width of the energy of the electron beam.
2 as δ, X of the energy level difference of the electrons
When the component is larger than φ _c + δ, the emitter current
Most of I _E exceeds the barrier φ _c on the collector side, and the common base current amplification factor α=I _C /I _E can be made to asymptotically approach 1. A schematic side sectional view of a conventional example in which this HET is realized as a semiconductor device is shown in FIG. 2b. In the figure, 21 is a semi-insulating gallium arsenide (GaAs) substrate, 22, 28 and 29 are n ⁺ type GaAs
contact layer, 23 is n-type GaAs collector layer, 2
4 is aluminum gallium arsenide (AlGaAs) barrier layer, 25 is n-type GaAs base layer, 26 is
AlGaAs barrier layer, 27 is n-type GaAs emitter layer,
30 is a collector electrode, 31 is a base electrode, 32 is an emitter electrode, and 33 is a protective insulating film. The collector layer 23 to the emitter layer 27 of the semiconductor substrate of this conventional example are constructed as shown in the example below, for example.

[Problem that the invention seeks to solve]

As explained above, the surface depletion layer that occurs in the base layer exposed to separate the base electrode of the HET, or the depletion layer that reaches the base layer from the barrier layer, and the contact regrowth layer of the base layer once exposed. The base resistance increases due to the depletion region with low electron concentration that occurs near the interface.
Furthermore, since it is difficult to reduce the thickness of the base layer, improvement in characteristics such as current amplification factor is restricted. Naturally, attempts have been made to increase the impurity concentration of the base layer in order to deal with this problem, but the maximum possible concentration is 5 to 5. The effect remains at around 6×10 ¹⁸ cm ^-3 and is still insufficient. In order to achieve the characteristics expected of this new semiconductor device, we have eliminated the factors that increase base resistance, lowered the resistance, and reduced the thickness of the base layer, and also eliminated the troublesome selective regrowth of the base contact layer. There is a need for a manufacturing method that does not require processes. [Means for solving the problem] The problem mentioned above is that the n-type
GaAs collector contact layer, n-type GaAs collector layer, non-doped AlGaAs first barrier layer, n-type
A step of sequentially laminating a GaAs base layer, a non-doped AlGaAs second barrier layer, an n-type GaAs emitter layer, and an n-type GaAs emitter contact layer,・The n-type GaAs base layer includes a step of forming a collector electrode, a base electrode, and an emitter electrode made of Ge/Au, respectively, and the n-type GaAs base layer is made of a plurality of non-doped GaAs layers having the same thickness.
The solution is to form layers by growing alternating layers and atomically plane doped layers of Si. [Operation] The base layer according to the present invention is subjected to atomic plane doping of silicon (Si) periodically and repeatedly in its thickness direction. Atomic plane doping generates carrier electrons at a high concentration of about 1.5×10 ¹⁹ cm ^-3 , which is about 2.5 times that of conventional uniform doping. The high concentration of carrier electrons resulting from this atomic plane doping significantly reduces the resistivity of the base layer and stops the depletion layer from elongating, making it possible to lower the resistance of the base layer and reduce its thickness. [Example] The present invention will be specifically described below with reference to Examples. FIG. 1a is a schematic side sectional view of a hot electron transistor manufactured according to an embodiment of the present invention, and FIG. 1b is an enlarged view of the main part thereof. In the figure, 1 is a semi-insulating GaAs substrate, 2 to 8 are epitaxial growth layers described below, 10 is a collector electrode, 11 is a base electrode, 12 is an emitter electrode, and 13 is a protective insulating film. In this embodiment, the epitaxial growth layers 2 to 8 are epitaxially grown one after another on a semi-insulating GaAs substrate 1 by, for example, a molecular beam epitaxial growth method as shown in the example below. The base layer 5 is grown as follows. In other words, the thickness is approximately 2 nm due to As and Ga beams.
The growth of the GaAs layer 5a is repeated, and the atomic plane doping 5b of Si with a surface concentration of about 3×10 ¹² cm ^-2 is repeated by stopping the Ga beam and injecting the Si beam.
The GaAs layer 5a is grown 15 times to form the base layer 5 with a thickness of about 30 nm.

〔Effect of the invention〕

As explained above, according to the present invention, the base resistance is reduced, characteristics such as current amplification factor are improved, and selective regrowth is not required.
This will have the effect of greatly advancing the development of HET.

[Brief explanation of drawings]

FIG. 1a is a schematic side sectional view showing a hot electron transistor manufactured according to an embodiment of the present invention, b is an enlarged view of its main parts, FIG. 2a is an explanatory diagram of the operation of this device, and b is a conventional example. FIG. In the figure, 1 is a semi-insulating GaAs substrate, 2 and 8 are n ⁺ type GaAs contact layers, 3 is an n-type GaAs collector layer, 4 is an AlGaAs barrier layer, 5 is a base layer, 5a is a non-doped GaAs layer, and 5b is a Si atomic plane doped layer, 6 AlGaAs barrier layer, 7 n-type GaAs emitter layer, 10 collector electrode, 11 base electrode, 12 emitter electrode,
13 indicates a protective insulating film.

Claims (1)

[Claims] 1. On a semi-insulating GaAs substrate 1, an n-type GaAs collector contact layer 2, an n-type GaAs collector layer 3,
Non-doped AlGaAs first barrier layer 4, n-type
GaAs base layer 5, non-doped AlGaAs second barrier layer 6, n-type GaAs emitter layer 7, n-type GaAs
a step of sequentially laminating emitter contact layers 8;
Collector electrode 10 and base electrode 11 made of Au
and an emitter electrode 12, respectively, and the n-type GaAs base layer 5 is formed by alternately growing a plurality of non-doped GaAs layers 5a and Si atomic plane doping layers 5b having the same thickness. 1. A method for manufacturing a hot electron transistor, comprising: forming a hot electron transistor;