JPH04219879A - Arithmetic unit - Google Patents

Abstract

PURPOSE:To provide the unit which eliminates the need for instruction access and is increased in arithmetic speed. CONSTITUTION:Plural self-conclusion type arithmetic means 1 equipped with logic elements 2, logic setting storage elements 3, and arithmetic result storage elements 4 are provided and the partial charge allotment of those self-conclusion type arithmetic means 1 is stored. When necessary data is inputted in this state, the respective self-conclusion type arithmetic means 1 perform their parts of arithmetic.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an arithmetic device with dramatically increased arithmetic speed.

0002

2. Description of the Related Art Hitherto known arithmetic devices have to process a program step by step and read necessary instructions at each step of processing the program. For example, if a conventional arithmetic device uses accumulation, a situation as shown in FIG. 7 will occur. In other words, the conventional device performs cumulative totaling once, but requires one instruction access, one input, one instruction access, one result input, one instruction access, and one addition.
, instruction access, result storage 1, instruction access, result output 1, and thus 10 cycles are required, and an instruction access is required for each stage.

0003

SUMMARY OF THE INVENTION In such a conventional arithmetic unit, necessary instructions must be read during program processing, resulting in a slow processing speed. An object of the present invention is to provide an arithmetic device that does not require instruction access.

0004

[Means for Solving the Problems] The present invention arranges a plurality of self-contained calculation means each consisting of a logic element and a memory element as main elements, and furthermore, connects these self-contained calculation means to each other. One of the unit blocks is connected to external input means, another unit block is connected to external output means, and one other unit block is connected to external input means. is connected to an external memory, the roles of the self-contained calculation means in each unit block are set in advance, and the self-contained calculation means are connected to each other.

[0005]

[Operation] Since the present invention is constructed as described above, when a program corresponding to the process to be executed by the arithmetic device is inputted from the external input means, the self-contained arithmetic means performs its own arithmetic processing according to the program. to remember and retain. In this state, when predetermined data is input from the external input means,
Each self-contained calculation means executes processing.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The first embodiment shown in FIGS. 1 to 4 shows an example of an accumulator, which is provided with four unit blocks a to d. The unit block a functions as an input block, the unit block b functions as an addition block, the unit block c functions as a memorial access block, and the unit block d functions as an output block. Each of these blocks consists of a plurality of self-contained calculation means 1. This self-contained calculation means 1 includes a second
As shown in the figure, it consists of a logic element 2, a logic setting storage element 3, and an operation result storage element 4.

The logic setting storage element 3 receives a program signal from the first setting channel 5 and inputs it to the logic element 3, and also inputs the program signal to the next self-contained calculation means 1 via the second setting channel 6. The contents of the program are transmitted to. Further, the logic element 2 is connected to other logic elements 2 in the same unit block via a plurality of channel networks 7 to 10, and the operation result is stored in the operation result storage element 4.

In each unit block, the first setting channel 5 of any one self-contained calculation means is connected to the second setting channel 2 of the other unit block. Further, the second setting channel 6 of the other self-contained calculation means is
It is connected to the first setting channel 5 of another unit block.

However, only the first channel of unit block a is connected to external input means (not shown). The input block a outputs a predetermined response signal when the input operation is completed. The addition block b receives the signal from the input block a and is also capable of exchanging signals with the memorial access block c. This memorial access block c is capable of inputting the addition result to the external memory 11 or taking out the stored signal of this external memory 11. The output block d is connected to an external output means (not shown), and receives a response signal corresponding to its output.

Next, the operation of this first embodiment will be explained. First, a program for sharing the role of the self-contained calculation means 1 of each unit block a to d is inputted to the input block a from an external input means. At this time, the program signal from the external input means is input to the logic setting storage element 3 from the first setting channel 5. The logic setting storage element 3 that receives the program signal sends the program signal to the logic element 2 according to the role determined for the self-contained calculation means 1, and the calculation result storage element 4 stores the contents. .

Furthermore, when a signal unrelated to the self-contained arithmetic element 1 is input, the logic setting storage element 3 determines this, and the unrelated signal is transmitted from the second setting channel to the other self-contained arithmetic element 1. 1. That is, this logic setting storage element 3 determines whether the signal input thereto is related to the role of its own self-contained arithmetic element 1, and the signal not related to its own role is stored in the next one. It fulfills the function of distributing to the self-contained arithmetic element 1.

Once the role of the self-contained arithmetic element 1 of each unit block a to d has been specified as described above, next,
First, the result stored in the memory 11 is set to 0. If data is input to input block a in this state, data input via input block a and data stored in memory 11 are added to addition block b. Then, the addition result is written into the memory 11, and the memorial access block c sends the addition result to the output block d, from which it is sequentially output to the outside.

FIG. 3 shows the above calculation process. Although FIG. 3 looks as if the steps proceed in chronological order, in reality, these steps are performed simultaneously, and FIG. 4 shows this situation. As is clear from FIG. 4, according to this embodiment, input→
Result input → addition → result storage → result output can be performed concurrently.

The second embodiment shown in FIGS. 5 and 6 differs from the first embodiment in the configuration of the self-contained arithmetic element 1. That is, the self-contained arithmetic element 1 of this second embodiment
consists of a logic element 12 and a memory element 13, and this memory element 13 also serves as the logic setting memory element 3 of the first embodiment. Further, in this second embodiment, each channel 14 to 17 led from the logic element 12 also serves as the first and second setting channels 5 and 6 of the first embodiment.

Now, when a reset signal is input from the reset input channel 18, the memory element 13 is initialized, for example, set to all zeros. When all the memory elements 13 are set to 0 in this way, the setting state of each logic element 12 can be specified from the outside via the memory element 13 of each self-contained calculation means 1.

In the second embodiment as described above, unlike the first embodiment, the first and second setting channels are not required, so that the system can be made more compact.

Although the first and second embodiments above show an example of an accumulator, the present invention is not limited to an accumulator, but can be used as a general-purpose arithmetic device.

[0018]

According to the arithmetic device of the present invention, there is no need to read instructions for processing a program while it is being processed, so that the arithmetic speed becomes faster.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a circuit of a first embodiment of the present invention.

FIG. 2 is a block diagram showing a logic circuit of the self-contained calculation means of the first embodiment.

FIG. 3 is a chart diagram of the first embodiment.

FIG. 4 is an explanatory diagram showing the accumulation status of the first embodiment.

FIG. 5 is a block diagram showing a circuit of a second embodiment.

FIG. 6 is a block diagram showing a logic circuit of the self-contained calculation means of the second embodiment.

FIG. 7 is an explanatory diagram showing the execution contents of conventional accumulation.

[Explanation of symbols]

a Unit block b Unit block c Unit block d Unit block 1 Self-contained calculation means 2 Logic element 3 Logic setting memory element 4 Operation result storage element 12 Logic element 13 Memory element

Claims (2)

[Claims] 1. A plurality of self-contained calculation means each having a logic element and a memory element as main elements are arranged, and furthermore, a plurality of unit blocks each formed by interconnecting the self-contained calculation means are provided, One of the unit blocks is connected to an external input means, another unit block is connected to an external output means, and another unit block is connected to an external memory,
An arithmetic device characterized in that the roles of self-contained arithmetic means in each unit block are set in advance, and the self-contained arithmetic means are interconnected. 2. The arithmetic device according to claim 1, further comprising self-contained arithmetic means whose main elements are a logic element, a logic setting element, and an arithmetic result storage element.