JPH04217A - Charging circuit for electrical double layer capacitor - Google Patents

Charging circuit for electrical double layer capacitor

Info

Publication number
JPH04217A
JPH04217A JP2099261A JP9926190A JPH04217A JP H04217 A JPH04217 A JP H04217A JP 2099261 A JP2099261 A JP 2099261A JP 9926190 A JP9926190 A JP 9926190A JP H04217 A JPH04217 A JP H04217A
Authority
JP
Japan
Prior art keywords
voltage
double layer
layer capacitor
charging
electrical double
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2099261A
Other languages
Japanese (ja)
Inventor
Takashi Kawai
隆 河合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP2099261A priority Critical patent/JPH04217A/en
Publication of JPH04217A publication Critical patent/JPH04217A/en
Pending legal-status Critical Current

Links

Landscapes

  • Direct Current Feeding And Distribution (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

PURPOSE:To shorten the charging time of a large capacity electrical double layer capacitor by employing a charging power supply generating a voltage sufficiently higher than a predetermined charging voltage. CONSTITUTION:Since the generating voltage of a DC power supply 1 is set sufficiently higher than the predetermined charging voltage of an electrical double layer capacitor 2, the capacitor 2 is charged quickly. When the voltage at a terminal 3 reaches the predetermined charging voltage, the voltage at the terminal 3 side 4 out of voltages applied on two inputs of a comparator circuit 8 exceeds the voltage of a reference voltage supply 7, and thereby a switch 4 is interrupted to stop charging operation. The electrical double layer capacitor 2 is then removed and the stored charges are employed as a power supply. Consequently, an electrical double layer capacitor having large capacity can be charged in a quite short time.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、大電力用の電気二重層キャパシタを短時間
内に所定の電圧まで充電可能な充電回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a charging circuit that can charge a high-power electric double layer capacitor to a predetermined voltage within a short time.

(従来の技術および解決すべき課題) 大容量の電気二重層キャパシタを所定の充電予定電圧E
まで充電する従来の充電回路においては、充電用電源の
発生電圧がほぼ同し電圧Eのものを使用しているので、
第2図の曲線aに示すように、充電用電源の内部インピ
ーダンスあるいは電流制限用抵抗と大容量の電気二重層
キャパシタとの時定数で決まる長い充電時間(tl)を
要するという問題があった。
(Prior art and problems to be solved) A large capacity electric double layer capacitor is charged at a predetermined charging voltage E.
In conventional charging circuits that charge up to
As shown by curve a in FIG. 2, there is a problem in that a long charging time (tl) is required, which is determined by the internal impedance of the charging power source or the time constant of the current limiting resistor and the large-capacity electric double layer capacitor.

(課題を解決するための手段) そこで、この発明は、このような大容量の電気二重層キ
ャパシタの充電に費やす時間を短縮するために考えられ
たもので、充電用電源として発生電圧が、充電予定電圧
Eよりも十分に高い電源を使用して、第2図に示す曲線
すに沿って充電し、電気二重層キャパシタの端子電圧が
Eまで達したときに、充電回路を切り離すように構成し
、充電時間を時間(t2)まで短縮を可能ならしめたも
のである。
(Means for Solving the Problems) Therefore, the present invention was devised in order to shorten the time spent charging such a large capacity electric double layer capacitor. Using a power source that is sufficiently higher than the planned voltage E, the battery is charged along the curve shown in Figure 2, and when the terminal voltage of the electric double layer capacitor reaches E, the charging circuit is disconnected. , it is possible to shorten the charging time to time (t2).

(実施例) この発明の電気二重層キャパシタ用充電回路は、第1図
に示すように、充電予定電圧Eよりも十分に高い電圧を
発生する直流電源1と、大容量の電気二重層キャパシタ
2か接続される端子3と、直流電源1と端子3との間に
設けられたスイッチ4および充電電流制限用抵抗5と、
このスイッチ4を制御する制御回路6とを具備している
(Embodiment) As shown in FIG. 1, a charging circuit for an electric double layer capacitor of the present invention includes a DC power supply 1 that generates a voltage sufficiently higher than a scheduled charging voltage E, and a large capacity electric double layer capacitor 2. a switch 4 and a charging current limiting resistor 5 provided between the DC power supply 1 and the terminal 3;
A control circuit 6 for controlling this switch 4 is provided.

この制御回路6は、ツェナー・ダイオードのような基’
$74圧源7の電圧Eと端子3の電圧とを比較し、その
比較出力でスイッチ4の開閉を制御する演算増幅器のよ
うな比較回路8で構成されている。
This control circuit 6 is based on a base such as a Zener diode.
It is comprised of a comparison circuit 8 such as an operational amplifier that compares the voltage E of the $74 pressure source 7 with the voltage of the terminal 3 and controls the opening and closing of the switch 4 using the comparison output.

このスイッチ4としては、図示したトランジスタのよう
な半導体スイッチのほかに、機械的な接点を有するリレ
ーを用いてもよいのである。
As the switch 4, in addition to a semiconductor switch such as the illustrated transistor, a relay having mechanical contacts may be used.

(動作) 放電状態にある電気二重層キャパシタ2を端子3に接続
すると、比較回路8の2つの入力に印加されている電圧
のうち、端子3側の電圧が基準電圧源7の電圧Eよりも
低いので、スイッチ4が導通させて直流電源1より電気
二重層キャパシタ2へ充電を開始する。
(Operation) When the electric double layer capacitor 2 in a discharged state is connected to the terminal 3, of the voltages applied to the two inputs of the comparator circuit 8, the voltage on the terminal 3 side becomes higher than the voltage E of the reference voltage source 7. Since the voltage is low, the switch 4 is turned on and charging of the electric double layer capacitor 2 from the DC power source 1 is started.

このとき、直流電源1の発生電圧は、電気二重層キャパ
シタ2に対する充電予定電圧Eよりも十分に高く設定さ
れているので、第2図の曲ibに沿って急速に充電され
る。しかし、端子3の電圧が、充電予定電圧Eに達する
と、比較回路8の2つの人力に印加されている電圧のう
ち、端子3側の電圧か基準電圧源7の電圧よりも高くな
るので、スイッチ4を遮断せしめて充電を停止する。
At this time, the voltage generated by the DC power supply 1 is set to be sufficiently higher than the scheduled charging voltage E for the electric double layer capacitor 2, so that the electric double layer capacitor 2 is rapidly charged along curve ib in FIG. However, when the voltage at the terminal 3 reaches the scheduled charging voltage E, of the voltages applied to the two voltages of the comparison circuit 8, the voltage at the terminal 3 side or the voltage at the reference voltage source 7 becomes higher. Switch 4 is shut off to stop charging.

そして、端子3より電気二重層キャパシタ2を外して、
充電された電荷を電源としてfll用するのである。
Then, remove the electric double layer capacitor 2 from the terminal 3,
The charged electric charge is used as a power source.

(効果) この発明の電気二重層キャパシタ用充電回路は、以上で
説明したように充電予定電圧Eよりも十分に高い電源電
圧によって充電するように構成されているので、大容量
の電気二重層キャパシタを極めて短時間に充電すること
ができる。
(Effects) As explained above, the electric double layer capacitor charging circuit of the present invention is configured to charge with a power supply voltage that is sufficiently higher than the scheduled charging voltage E. can be charged in an extremely short time.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の電気二重層キャパシタ用充電回路
の一実施例を示す回路図、第2図は、充電動作を説明す
るために用いる曲線図である。 1・・・直流電源 2・・・電気二重層キャパシタ 3・・・端子 4・・・スイッチ 6・・・制御回路 7・・・基1!電圧源 8・・・比較回路 第2図
FIG. 1 is a circuit diagram showing an embodiment of the electric double layer capacitor charging circuit of the present invention, and FIG. 2 is a curve diagram used to explain the charging operation. 1... DC power supply 2... Electric double layer capacitor 3... Terminal 4... Switch 6... Control circuit 7... Base 1! Voltage source 8... Comparison circuit Figure 2

Claims (1)

【特許請求の範囲】[Claims] (1)充電予定電圧よりも高い電圧を発生する直流電源
と、被充電電気二重層キャパシタが接続される端子と、
上記直流電源と端子との間に設けられたスイッチと、上
記充電予定電圧とほぼ等しい電圧を発生する基準電圧源
と、該基準電圧源の出力電圧および上記端子の電圧を比
較し、その比較結果に基づく出力により上記スイッチを
制御する制御回路とを具備することを特徴とする電電気
二重層キャパシタ用充電回路。
(1) A DC power source that generates a voltage higher than the scheduled charging voltage and a terminal to which the electric double layer capacitor to be charged is connected;
A switch provided between the DC power source and the terminal, a reference voltage source that generates a voltage approximately equal to the scheduled charging voltage, and the output voltage of the reference voltage source and the voltage of the terminal are compared, and the comparison result is 1. A charging circuit for an electrical double layer capacitor, comprising: a control circuit that controls the switch using an output based on the above.
JP2099261A 1990-04-17 1990-04-17 Charging circuit for electrical double layer capacitor Pending JPH04217A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2099261A JPH04217A (en) 1990-04-17 1990-04-17 Charging circuit for electrical double layer capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2099261A JPH04217A (en) 1990-04-17 1990-04-17 Charging circuit for electrical double layer capacitor

Publications (1)

Publication Number Publication Date
JPH04217A true JPH04217A (en) 1992-01-06

Family

ID=14242770

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2099261A Pending JPH04217A (en) 1990-04-17 1990-04-17 Charging circuit for electrical double layer capacitor

Country Status (1)

Country Link
JP (1) JPH04217A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6542768B1 (en) * 1999-07-30 2003-04-01 Siemens Aktiengesellschaft Signal pickup or signal generator for a magnetic resonance tomography device
US7339623B2 (en) * 2002-05-27 2008-03-04 Olympus Optical Co., Ltd. Camera and image pickup device unit which reduce influence of dust image quality
JP2010268292A (en) * 2009-05-15 2010-11-25 Yamaha Corp Electronic circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6542768B1 (en) * 1999-07-30 2003-04-01 Siemens Aktiengesellschaft Signal pickup or signal generator for a magnetic resonance tomography device
US7339623B2 (en) * 2002-05-27 2008-03-04 Olympus Optical Co., Ltd. Camera and image pickup device unit which reduce influence of dust image quality
JP2010268292A (en) * 2009-05-15 2010-11-25 Yamaha Corp Electronic circuit

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