JPH04206656A - Semiconductor device and semiconductor device mounting board - Google Patents
Semiconductor device and semiconductor device mounting boardInfo
- Publication number
- JPH04206656A JPH04206656A JP33017690A JP33017690A JPH04206656A JP H04206656 A JPH04206656 A JP H04206656A JP 33017690 A JP33017690 A JP 33017690A JP 33017690 A JP33017690 A JP 33017690A JP H04206656 A JPH04206656 A JP H04206656A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- semiconductor device
- board
- terminal
- bending
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 239000000758 substrate Substances 0.000 claims description 7
- 238000005452 bending Methods 0.000 abstract description 12
- 239000002184 metal Substances 0.000 abstract description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 238000003466 welding Methods 0.000 abstract description 2
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 235000014676 Phragmites communis Nutrition 0.000 description 1
- 230000002730 additional effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000004927 fusion Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は半導体装置をプリント基板等に搭載するときの
、該半導体装置のリード接続に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to lead connections for a semiconductor device when the device is mounted on a printed circuit board or the like.
（従来の技術）
この種の技術の従来例は実開昭６３−１５５６５１号公
報に開示されるものがあり、それを第２図ないし第４図
に示し、以下に説明する。(Prior Art) A conventional example of this type of technology is disclosed in Japanese Utility Model Application Laid-Open No. 63-155651, which is shown in FIGS. 2 to 4 and will be described below.
先ず第２図に示す従来例においては、半導体装置１をリ
ード２と一体に樹脂封止した後、リード２を樹脂封止部
３表面近傍から下方に屈曲させ、半導体装置１を設置す
る平面４に対してその角度αを２５°とする。また、リ
ード２の長さは、屈曲させて平面４に接触させた場合に
その角度αが２５°となるように設定しておく必要があ
る。そして１本例の場合、樹脂封止３の上型５と下型６
との厚さの比を、上型５の厚さＱを下型６の厚さａ′よ
り大となるように設定するのが好ましい。First, in the conventional example shown in FIG. 2, the semiconductor device 1 and the leads 2 are resin-sealed together, and then the leads 2 are bent downward from the vicinity of the surface of the resin-sealed portion 3 to form a flat surface 4 on which the semiconductor device 1 is installed. Let the angle α be 25°. Further, the length of the lead 2 needs to be set so that when the lead 2 is bent and brought into contact with the plane 4, the angle α is 25°. In the case of one example, the upper mold 5 and the lower mold 6 of the resin sealing 3
It is preferable to set the thickness ratio between the upper mold 5 and the lower mold 6 so that the thickness Q of the upper mold 5 is larger than the thickness a' of the lower mold 6.
このようにすることにより、リード２の長さを長くしな
いで、平面４に対する角度αを所定の範囲内に設定する
ことができ、高密度実装化に有利である。なお、このよ
うに上型５と下型６の厚さを選ぶことにより、パーツフ
ィーダで部品を供給する際に両面の判別が容易になる、
半導体装Ｗ１の位置が低くなることに伴って重心が下に
くるため、安定性が良好になるという付随的効果も得ら
れる。By doing so, the angle α with respect to the plane 4 can be set within a predetermined range without increasing the length of the leads 2, which is advantageous for high-density packaging. In addition, by selecting the thickness of the upper die 5 and the lower die 6 in this way, it becomes easy to distinguish between both sides when feeding parts with a parts feeder.
Since the center of gravity of the semiconductor device W1 is lowered as the position of the semiconductor device W1 is lowered, an additional effect of improved stability can also be obtained.
第３図に示す従来例は、樹脂封止部３を上記第１の例と
同様に形成し、先端部７が平面４に対して接触面積が大
きくなるように斜めに切断されたり−ド２を使用し、こ
のリード２を平面４に対してその角度αが２５°となる
ように屈曲させたものである。In the prior art example shown in FIG. The lead 2 is bent at an angle α of 25° with respect to the plane 4.
次に第４図に示す従来例は、樹脂封止部３を上記第１の
例と同様に形成し、先端部７が平面に対して接触面積が
大きくなるように斜めに折曲げられたリード２を使用し
、このリード２を平面４に対してその角度αが２５°と
なるように屈曲させたものである。Next, in the conventional example shown in FIG. 4, the resin sealing part 3 is formed in the same manner as in the first example, and the lead is bent diagonally so that the tip part 7 has a large contact area with the plane. 2, and the lead 2 is bent so that the angle α with respect to the plane 4 is 25°.
（発明が解決しようとする課題）
しかしながら、前記構成の半導体装置のリード形状では
、プレス加工時に曲げ加工が安定せず、リードの曲げ先
端部の平面当接が不安定になる。(Problems to be Solved by the Invention) However, with the lead shape of the semiconductor device having the above-mentioned configuration, bending is not stable during press working, and the planar contact of the bending tip of the lead becomes unstable.
主としてプレス加工時のリード素材のスプリングバック
による加工精度、従属的ではあるが半導体装置の取り扱
い時の、リード変形等による、前記平面当接に不具合が
発生するという問題点があった。There has been a problem in that problems occur in the flat contact, mainly due to processing accuracy due to springback of the lead material during press working, and secondary to deformation of the lead during handling of the semiconductor device.
（問題を解決するための手段）
この発明は、以上述へたプレス加工工程によるリードの
平面当接の不安定化という問題点を除去するため、リー
ドの曲げ加工を削除し、搭載基板の端子と半導体装置の
り−トとの隙間に接続片を設け、導通、固定させて、半
導体装置を基板に搭載するようにした。(Means for Solving the Problem) In order to eliminate the problem of unstable planar contact of the leads due to the above-mentioned press working process, the present invention eliminates the bending process of the leads and terminals of the mounting board. A connecting piece is provided in the gap between the semiconductor device board and the semiconductor device board to establish conduction and fixation, and the semiconductor device is mounted on the board.
（作用）
本発明は前述のように、半導体装置のリードと搭載基板
の端子との間に接続片を設けたので、該リードを曲げる
ことなくその接続ができ、リード曲げ加工の削除、接続
の安定化が図れる。(Function) As described above, the present invention provides a connection piece between the lead of the semiconductor device and the terminal of the mounting board, so that the connection can be made without bending the lead, eliminating the need for lead bending and making the connection easier. Stabilization can be achieved.
（実施例） 第１図は、この発明を説明する断面概略図である。(Example) FIG. 1 is a schematic cross-sectional view illustrating the present invention.
実施例として図示した第１図は、プリント基板等に半導
体素子を搭載した時のプリント基板端子と半導体装置の
外部リードの接続部の拡大断面図である。ここで、各種
の用途によって配線引き廻しされた配線（図示せず）が
形成されたプリント配線基板４（従来例の平面４に相当
）の前記配線に電気的に配線導通された端子８が半導体
装置ｌの外部リード２の配置に対応し形成されている。FIG. 1, shown as an example, is an enlarged sectional view of a connecting portion between a printed circuit board terminal and an external lead of a semiconductor device when a semiconductor element is mounted on a printed circuit board or the like. Here, the terminal 8 electrically connected to the wiring of the printed wiring board 4 (corresponding to the plane 4 of the conventional example) on which the wiring (not shown) is formed is connected to the semiconductor. It is formed to correspond to the arrangement of the external leads 2 of the device 1.
リード２は半導体装置１の側面から折り曲げ加工せずに
直接外部に突設されている。このリード２は、種々の半
導体装置の形状によって四方向側面、対向する側面に形
成されているリード等があり半導体装置３の形状には限
定されない。The leads 2 are directly protruded from the side surface of the semiconductor device 1 without being bent. This lead 2 is not limited to the shape of the semiconductor device 3, and there are leads formed on four side surfaces, opposite side surfaces, etc. depending on the shape of various semiconductor devices.
ここでいう基板４は、一般的な製造方法によって製造さ
れた、ガラスエポキシ基板からなるプリント配線基板ま
たは、セラミック基板から成るプリント配線基板等があ
るが、これらに限定されず、半導体装置を搭載する場所
を基板とした。The substrate 4 here includes, but is not limited to, a printed wiring board made of a glass epoxy board, a printed wiring board made of a ceramic substrate, etc. manufactured by a general manufacturing method, and is used to mount a semiconductor device. The location was the base.
リード２の先端には、端子８との隙間を接続する接続片
９が取り付けられている。リード２の先端の接続片９と
端子８０表面を平面として、また基板４の表面も平面と
して共通とした。A connecting piece 9 is attached to the tip of the lead 2 to connect the gap with the terminal 8. The surface of the connecting piece 9 at the tip of the lead 2 and the surface of the terminal 80 were made flat, and the surface of the substrate 4 was also made flat.
接続片９と端子８とは略平行になるように設計され、ハ
ンダ等の融着手段によって固定される。The connecting piece 9 and the terminal 8 are designed to be substantially parallel, and are fixed by fusion means such as solder.
接続片９はリード２にスポット溶接またはハンダ付は等
によって取り付けてもよい。接続片９の材質については
、銅、Ｆ ｅ −Ｎ ｉ 、銅合金等いずれの材質でも
よく、また表面にメツキ処理しておいてもよいし、融着
できる材質であれば限定されない。The connecting piece 9 may be attached to the lead 2 by spot welding, soldering, or the like. The material of the connecting piece 9 may be any material such as copper, Fe-Ni, copper alloy, etc. The surface may be plated, and the material is not limited as long as it can be fused.
本実施例では接続片９はリート２の先端に形成したが、
端子８側に取り付けておいてもよく、要はリード２と端
子８とを接続片９で導通固定できればよい。In this embodiment, the connecting piece 9 was formed at the tip of the reed 2, but
It may be attached to the terminal 8 side, as long as the lead 2 and the terminal 8 can be electrically connected and fixed by the connecting piece 9.
接続片９の形状はり一ド２の巾と路間−で、端子８の形
状内に収納される程度の形状として、形状円柱、角柱等
形状についても接続端子の形状、リードの本数等によっ
て種々の変形が可能であり、限定するものではない。The shape of the connecting piece 9 is such that it can be accommodated within the shape of the terminal 8 depending on the width of the beam 2 and the distance between the leads, and the shape such as cylindrical or prismatic may vary depending on the shape of the connecting terminal, the number of leads, etc. Variations are possible and are not limited.
特に本発明の実施にあたり注意しなければならないのは
、基板４の面とほぼ平行状態で金属部材から成る、接続
片９を設けることが必要である。Particular attention must be paid when carrying out the present invention, since it is necessary to provide the connecting piece 9 made of a metal member substantially parallel to the surface of the substrate 4.
多端子半導体装置になると平面当接を充分に確保しない
と、リードの接続不良が発生しやすくなり、電気的、信
頼性的にも不安定な取り付け、接続方法となってしまう
。In the case of a multi-terminal semiconductor device, if sufficient plane contact is not ensured, poor connection of leads is likely to occur, resulting in an installation and connection method that is electrically and unreliably unstable.
本発明はリードを曲げる工程がないので、比較的平面当
接が確保しやすい技術である。特に本発明は、Ｔ Ｓ
ＯＰ （Ｔｈｉｎ Ｓｍａｌｌ ｏｕｔ／ｉｎｅ Ｐａ
ｃｋａｇｅ、）の基板搭載に好適である。なぜならＴＳ
ＯＰは本体厚さがたかだか１ｍ程度であるので、側面で
リードを折り曲げるとクラックが入りやすいし、また薄
いので１ｍの寸法内でのクランク曲げを行うことは精度
的にも問題があった。また本体が薄いので接続片の厚さ
が薄くてすむので取り付けが容易である。接続辺の加工
も容易である。Since the present invention does not require the step of bending the leads, it is a technique that relatively easily ensures plane contact. In particular, the present invention provides T S
OP (Thin Small out/ine Pa
It is suitable for mounting on boards such as ckage, etc. Because T.S.
Since the main body thickness of OP is about 1 m at most, cracks tend to occur when the leads are bent at the sides, and since they are thin, there is also a problem in terms of accuracy when crank bending within a dimension of 1 m. Furthermore, since the main body is thin, the connection piece only needs to be thin, making installation easy. Processing of the connection side is also easy.
（発明の効果）
以上、説明したように、この発明によれば基板端子とリ
ードとの隙間に接続片を設けたので、リードの折り曲げ
加工工程が削除され、本導体装置の側面部のリード加工
時のクラック、リードの折り曲げ加工による精度のバラ
ツキ等による平面当接性等の不都合が低減され、基板搭
載による電気的特性、接続強度の安定化の効果が期待で
きる。(Effects of the Invention) As explained above, according to the present invention, since the connecting piece is provided in the gap between the board terminal and the lead, the lead bending process is eliminated, and the lead process on the side surface of the present conductor device is Inconveniences such as surface contact due to cracks caused by lead bending and variations in accuracy due to lead bending are reduced, and the effect of stabilizing electrical characteristics and connection strength by mounting on a board can be expected.
第１図は本発明の実施例の断面図、第２図ないし第４図
は従来例の正面図である。
１・半導体装置、２・ リート、４ ・基板、８・端子
、９・・・接続片。
本発明の実施例の断面図
第１図
従来例の正面図
第２図
他の従来例の正面図
第３図
他の従来例の正面図
第４図FIG. 1 is a sectional view of an embodiment of the present invention, and FIGS. 2 to 4 are front views of a conventional example. 1. Semiconductor device, 2. REIT, 4. Substrate, 8. Terminal, 9... Connection piece. 1. Front view of a conventional example. 2. Front view of another conventional example. 3. Front view of another conventional example. 4.
Claims (2)
部端子に電気的に接続するための接続片を設けたことを
特徴とする半導体装置。(1) A semiconductor device characterized in that a connecting piece for electrically connecting the lead to an external terminal is provided at one end of an external lead of the semiconductor device.
前記半導体装置のリードと電気的に接続する端子の上に
、前記リードと接続をするための接続片を設けたことを
特徴とする半導体搭載基板。(2) A semiconductor device characterized in that, in a substrate on which a semiconductor device is mounted, a connecting piece for connecting to the lead is provided on a terminal electrically connected to the lead of the semiconductor device on the substrate. Mounted board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33017690A JPH04206656A (en) | 1990-11-30 | 1990-11-30 | Semiconductor device and semiconductor device mounting board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33017690A JPH04206656A (en) | 1990-11-30 | 1990-11-30 | Semiconductor device and semiconductor device mounting board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04206656A true JPH04206656A (en) | 1992-07-28 |
Family
ID=18229677
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33017690A Pending JPH04206656A (en) | 1990-11-30 | 1990-11-30 | Semiconductor device and semiconductor device mounting board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04206656A (en) |
-
1990
- 1990-11-30 JP JP33017690A patent/JPH04206656A/en active Pending
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