JPH0420232U - - Google Patents

Info

Publication number
JPH0420232U
JPH0420232U JP6014890U JP6014890U JPH0420232U JP H0420232 U JPH0420232 U JP H0420232U JP 6014890 U JP6014890 U JP 6014890U JP 6014890 U JP6014890 U JP 6014890U JP H0420232 U JPH0420232 U JP H0420232U
Authority
JP
Japan
Prior art keywords
magazine
guide means
width
movable
guide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6014890U
Other languages
English (en)
Japanese (ja)
Other versions
JPH085952Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6014890U priority Critical patent/JPH085952Y2/ja
Publication of JPH0420232U publication Critical patent/JPH0420232U/ja
Application granted granted Critical
Publication of JPH085952Y2 publication Critical patent/JPH085952Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Stacking Of Articles And Auxiliary Devices (AREA)
  • Wire Bonding (AREA)
JP6014890U 1990-06-08 1990-06-08 マガジンガイド装置 Expired - Lifetime JPH085952Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6014890U JPH085952Y2 (ja) 1990-06-08 1990-06-08 マガジンガイド装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6014890U JPH085952Y2 (ja) 1990-06-08 1990-06-08 マガジンガイド装置

Publications (2)

Publication Number Publication Date
JPH0420232U true JPH0420232U (no) 1992-02-20
JPH085952Y2 JPH085952Y2 (ja) 1996-02-21

Family

ID=31587258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6014890U Expired - Lifetime JPH085952Y2 (ja) 1990-06-08 1990-06-08 マガジンガイド装置

Country Status (1)

Country Link
JP (1) JPH085952Y2 (no)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007043115A1 (ja) * 2005-09-30 2007-04-19 Hidaka Seiki Kabushiki Kaisha フィン板の集積装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007043115A1 (ja) * 2005-09-30 2007-04-19 Hidaka Seiki Kabushiki Kaisha フィン板の集積装置

Also Published As

Publication number Publication date
JPH085952Y2 (ja) 1996-02-21

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