JPH0420156U - - Google Patents
Info
- Publication number
- JPH0420156U JPH0420156U JP5870390U JP5870390U JPH0420156U JP H0420156 U JPH0420156 U JP H0420156U JP 5870390 U JP5870390 U JP 5870390U JP 5870390 U JP5870390 U JP 5870390U JP H0420156 U JPH0420156 U JP H0420156U
- Authority
- JP
- Japan
- Prior art keywords
- memory
- cpu
- controller
- shared
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 claims description 12
- 230000004044 response Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5870390U JPH0420156U (es) | 1990-06-01 | 1990-06-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5870390U JPH0420156U (es) | 1990-06-01 | 1990-06-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0420156U true JPH0420156U (es) | 1992-02-20 |
Family
ID=31584557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5870390U Pending JPH0420156U (es) | 1990-06-01 | 1990-06-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0420156U (es) |
-
1990
- 1990-06-01 JP JP5870390U patent/JPH0420156U/ja active Pending