JPH04199670A - Ic package lead frame - Google Patents
Ic package lead frameInfo
- Publication number
- JPH04199670A JPH04199670A JP33170190A JP33170190A JPH04199670A JP H04199670 A JPH04199670 A JP H04199670A JP 33170190 A JP33170190 A JP 33170190A JP 33170190 A JP33170190 A JP 33170190A JP H04199670 A JPH04199670 A JP H04199670A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- terminals
- package
- terminal
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims abstract description 7
- 239000011810 insulating material Substances 0.000 claims abstract description 5
- 239000003566 sealing material Substances 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 13
- 239000010931 gold Substances 0.000 abstract description 4
- 229910052737 gold Inorganic materials 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、ＩＣの封止パッケージに用いられるリードフ
レームに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame used in a sealed package of an IC.
［発明の概要］
本発明は、ＩＣとリードフレームを金線などで結線し、
プラスチック等で封止するパッケージに用いるリードフ
レームにおいて
金属線と接続されるリードフレーム端子を同一延長線上
に複数個配置し、個々の端子を絶縁材料で分離し、それ
ぞれの端子が個々のパッケージ端子となることにより、
ＩＣパッケージの高密度実装、多ビンパッケージを可能
にしたものである。[Summary of the invention] The present invention connects an IC and a lead frame with gold wire or the like,
In a lead frame used for a package sealed with plastic, etc., multiple lead frame terminals connected to metal wires are arranged on the same extension line, each terminal is separated by an insulating material, and each terminal is connected to an individual package terminal. By becoming
This enables high-density packaging of IC packages and multi-bin packaging.
［従来の技術］
従来のＩＣパッケージでは、ＩＣとリードフレームを金
線を用いてそれぞれ対応する端子に結線し、その端子が
そのままパッケージの端子となっている。そして結線す
る金線の長さにはある上限があり、リードフレーム端子
の寸法には、機械的強度、金線を接続するのに必要な領
域の確保等の制約があるため、最大のリードフレームサ
イズつまり端子数は、チップサイズにより決定されてい
る。[Prior Art] In a conventional IC package, an IC and a lead frame are connected to corresponding terminals using gold wires, and the terminals directly serve as package terminals. There is a certain upper limit to the length of the gold wire that can be connected, and there are restrictions on the dimensions of the lead frame terminal, such as mechanical strength and securing the area necessary to connect the gold wire. The size, that is, the number of terminals, is determined by the chip size.
第３図は、従来のリードフレームによるワイヤーボンデ
ィングの例である。ＩＣバッド３−１は、リードフレー
ム端子３−３と金線３−２により結線されパッケージ端
子３−４より外部に出力される。一般的にリードフレー
ム端子３−３は、ＩＣパッド３−１と比べ大きくなるた
め両者の間隔が異なり、単位長当りの端子数はＩＣパッ
ドの方が多くなる。そのためこの場合ＩＣパッド３−５
を使うことができず未使用パッドとなってしまう。FIG. 3 is an example of wire bonding using a conventional lead frame. The IC pad 3-1 is connected to a lead frame terminal 3-3 by a gold wire 3-2, and outputted to the outside from a package terminal 3-4. Generally, the lead frame terminal 3-3 is larger than the IC pad 3-1, so the spacing between the two is different, and the number of terminals per unit length of the IC pad is larger. Therefore, in this case, IC pad 3-5
can't be used and it becomes an unused pad.
本例では、約半数のＩＣパッドしか利用することができ
ず、回路によっては必要な信号数を確保不能となる場合
もある。In this example, only about half of the IC pads can be used, and depending on the circuit, it may be impossible to secure the necessary number of signals.
［発明が解決しようとする課Ｍ］
しかしながら、半導体集積回路の微細化が進み半導体素
子の寸法が縮小すると、同規模の回路をＩＣにした場合
、チップサイズが小さくなり、それに従いリードフレー
ムも小さくする必要がある。[Problem M to be solved by the invention] However, as semiconductor integrated circuits become smaller and the dimensions of semiconductor elements shrink, when a circuit of the same size is made into an IC, the chip size becomes smaller and the lead frame becomes smaller accordingly. There is a need to.
しかし、リードフレーム端子の大きさはＩＣ程微細化す
ることが困難なため最悪の場合、必要数のリードフレー
ム端子が確保不能となり必要以上にチップを大きく作る
ことを余儀なくされるという問題点を有していた。However, it is difficult to make lead frame terminals as small as ICs, so in the worst case scenario, it becomes impossible to secure the required number of lead frame terminals, resulting in a chip that is forced to be made larger than necessary. Was.
そこで本発明は従来のこのような問題点を解決するもの
で、限られた大きさのリードフレームに多数の金線接続
用端子を構成させ、ＩＣパッドとの接続を満足させるも
のである。The present invention solves these conventional problems by configuring a large number of gold wire connection terminals on a lead frame with a limited size, thereby achieving a satisfactory connection with an IC pad.
［課願を解決するための手段］
本発明のＩＣパッケージ用リードフレームは、ＩＣチッ
プのバットとリードフレームを金属線を用い接続し、封
止材料で固定する構造を有するパッケージに使用される
リードフレームにおいて、ａ）金属線と接続される１ノ
ードフレーム端子をｂ）同一延長線上に複数個配置し
Ｃ）個々の前記リードフレーム端子を絶縁材料で分離し
ｄ）それぞれの前記リードフレーム端子が個々のパッケ
ージ端子となることを特徴とする［実施例］
以下、本発明の実施例を図面により説明する。[Means for Solving the Problems] The lead frame for an IC package of the present invention is a lead used in a package having a structure in which a butt of an IC chip and a lead frame are connected using a metal wire and fixed with a sealing material. In the frame, a) a plurality of one-node frame terminals to be connected to the metal wire are arranged, b) a plurality of them are arranged on the same extension line, C) each of the lead frame terminals is separated by an insulating material, and d) each of the lead frame terminals is individually arranged. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第１図は、本発明のワイヤーボンディングの部分拡大図
であり、リードフレーム端子１−３と１−４は、絶縁層
１−５により電気的に分離され、１−３．１−４は、金
線１−２によりそれぞれのＩＣパッド１−１と接続され
る。FIG. 1 is a partially enlarged view of the wire bonding of the present invention, in which lead frame terminals 1-3 and 1-4 are electrically separated by an insulating layer 1-5, and 1-3, 1-4 are It is connected to each IC pad 1-1 by a gold wire 1-2.
この例では、リードフレーム端子１本分の範囲で２個の
工Ｃパッド接続することが可能となり従来の２倍の実装
が可能である。In this example, it is possible to connect two C-pads within the range of one lead frame terminal, and the number of mountings can be doubled compared to the conventional method.
第２図は、本発明におけるリードフレームによるワイヤ
ーボンディングの例である。FIG. 2 is an example of wire bonding using a lead frame in the present invention.
ＩＣパッド２−１は、金線２−２によりそれぞれリード
フレーム端子２−３．２−４に接続され絶縁層をはさん
で同じ形状のリードフレーム引き出し部を通りパッケー
ジ端子付近で分割され２−３で受けた信号は、パッケー
ジ端子２−５に２−４で受けた信号は、パッケージ端子
２−６に出力される。The IC pads 2-1 are connected to lead frame terminals 2-3 and 2-4 by gold wires 2-2, pass through lead frame extensions of the same shape with an insulating layer in between, and are divided near the package terminals 2-1. The signal received at 3 is output to the package terminal 2-5, and the signal received at 2-4 is output to the package terminal 2-6.
この例では、全てのＩＣパッドを利用することができる
。In this example, all IC pads can be used.
［発明の効果コ
本発明は、リードフレームのＩＣ接続用金属線接続端子
を同一延長線上に複数個配置し、個々の端子を絶縁材料
で分離しそれぞれの端子が個々のパッケージ端子となる
構成にしたので、単位長当りの接続数増加が可能となり
、従って１）チップサイズの大小に関わらず任意の端子
数のパッケージを作成できる。[Effects of the Invention] The present invention has a structure in which a plurality of metal wire connection terminals for IC connection of a lead frame are arranged on the same extension line, and each terminal is separated by an insulating material so that each terminal becomes an individual package terminal. Therefore, it is possible to increase the number of connections per unit length, and therefore 1) a package with an arbitrary number of terminals can be created regardless of the chip size.
２）多ピンパツケージを容易に実現できる。2) A multi-pin package can be easily realized.
３）既存の組立設備が利用できるため、新たな設備投置
を必要とせず低コストで実現できる。3) Since existing assembly equipment can be used, there is no need to install new equipment and it can be realized at low cost.
という効果がある。There is an effect.
第１図は、本発明のワイヤーボンディングの部分拡大図
であり、第２図は、本発明におけるリードフレームによ
るワイヤーボンディングの例を示す図である。
１−１・・・工Ｃパッド
１−２・・・金線
１−３．１−４・・・リードフレーム端子１−５・・・
絶縁膜
２−１・・・ＩＣパッド
２−２・・・金線
２−３．２−４・・・リードフレーム端子２−５．２−
６・・・パッケージ端子
第３図は、従来のリードフレームによるワイヤーボンデ
ィングの例を示す図である。
３−１．３−５・・・工Ｃバッド
３−２・・・金線
３−３・・・リードフレーム端子
３−４・・・パッケージ端子
以上
出願人 セイコーエプソン株式会社
代理人 弁理士 鈴木喜三部（他１名）第１図
第２図
第３図FIG. 1 is a partially enlarged view of wire bonding according to the present invention, and FIG. 2 is a diagram showing an example of wire bonding using a lead frame according to the present invention. 1-1...Engine C pad 1-2...Gold wire 1-3.1-4...Lead frame terminal 1-5...
Insulating film 2-1...IC pad 2-2...Gold wire 2-3.2-4...Lead frame terminal 2-5.2-
6...Package terminal FIG. 3 is a diagram showing an example of wire bonding using a conventional lead frame. 3-1.3-5...Engineer C bad 3-2...Gold wire 3-3...Lead frame terminal 3-4...Package terminal and above Applicant Seiko Epson Corporation Agent Patent attorney Suzuki Kisanbe (and 1 other person) Figure 1 Figure 2 Figure 3
Claims (1)
続し、封止材料で固定する構造を有するパッケージに使
用されるリードフレームにおいて、ａ）金属線と接続さ
れるリードフレーム端子をｂ）同一延長線上に複数個配
置し ｃ）個々の前記リードフレーム端子を絶縁材料で分離し ｄ）それぞれの前記リードフレーム端子が個々のパッケ
ージ端子となることを特徴とする ＩＣパッケージ用リードフレーム。[Claims] A lead frame used in a package having a structure in which a pad of an IC chip and a lead frame are connected using a metal wire and fixed with a sealing material, comprising: a) a lead frame terminal connected to the metal wire; b) a plurality of lead frame terminals are arranged on the same extension line, c) each of the lead frame terminals is separated by an insulating material, and d) each of the lead frame terminals serves as an individual package terminal. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33170190A JPH04199670A (en) | 1990-11-29 | 1990-11-29 | Ic package lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP33170190A JPH04199670A (en) | 1990-11-29 | 1990-11-29 | Ic package lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH04199670A true JPH04199670A (en) | 1992-07-20 |
Family
ID=18246622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP33170190A Pending JPH04199670A (en) | 1990-11-29 | 1990-11-29 | Ic package lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH04199670A (en) |
-
1990
- 1990-11-29 JP JP33170190A patent/JPH04199670A/en active Pending
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