JPH041912B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention performs display by varying the luminance of a plurality of EL (electroluminescent) elements.
This relates to EL display devices.

Conventionally, in a display device equipped with a plurality of EL elements, the brightness is controlled by changing the magnitude or pulse width of the voltage applied to the EL elements.

In addition, in EL elements, the application of DC bias reduces the life of the EL element, so
It is necessary to apply a voltage of opposite polarity to the applied voltage to the extent necessary to eliminate the DC bias.

However, in the display device described above,
Since the magnitude of the voltage applied to each EL element or the voltage application time is different, there is a problem in that the DC bias cannot be uniformly erased across all the EL elements.

The present invention has been developed in view of the above problem, and utilizes the fact that the luminance of an EL element changes depending on the frequency of the applied voltage. A voltage with a frequency corresponding to the luminance of each EL element is applied to each EL element so that the luminance is equal to By simultaneously applying voltage to each of the EL elements for the time period during which the sum of the value and the time integral value of the applied voltage for display becomes zero, the DC bias of all the EL elements can be erased at once. can be performed simultaneously and simultaneously
The purpose is to provide an EL display device.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention shown in the drawings will be described. FIG. 1 is a main electrical wiring diagram showing an embodiment of the present invention, and FIG. 2 shows V ₁ , X ₁ , X ₂ , X ₃ ,
The drive voltage waveforms of Y ₁ , Y ₂ , and Y ₃ are shown. V ₁ is a constant voltage, X ₁ ~ _{X 3} are brightness control signals, Y ₁ ~ _{Y 3}
is the scanning signal. Further, 1 to 9 correspond to one of a plurality of EL elements arranged in a dot matrix, that is, one dot in a display. At time _t1 , the voltage of only _Y1 of the scanning signals is high, transistor 10 is in the ON state, and dots 1,
One side of 4 and 7 is connected to ground. At this time, transistors 11 and 12 are in the OFF state, so
One side of dots 2, 3, 5, 6, 8, and 9 is floating above the ground level. On the other hand, in X ₁ to _{X 3} , voltages of different frequencies are applied to transistor 1.
It is applied to dots 1, 4, and 7 via dots 3, 14, and 15. Since the brightness of the EL element changes depending on the frequency of the driving waveform, dots 1, 4, and 7 light up at different brightnesses. Also, at this time, dots 2, 3, 5,
Since one side of lights 6, 8, and 9 is floating from the ground level, no voltage is applied to them and they do not light up. At time t ₂ , the same operation as at time t ₁ causes dots 2,
Only dots 5 and 8 are lit, and at time _t3 , only dots 3, 6, and 9 are lit. Then, at time _t4 , a voltage is applied to one side of all dots via the diodes by _V1 . On the other hand, since all voltages of X ₁ to _{X 3} are high, transistors 13, 14,
15 is in the ON state, and one side of all dots is at ground level. Therefore, a voltage of opposite polarity to the voltage applied during times _t1 to _t3 is applied to all dots, and the charges accumulated in the dots during times _t1 to _t3 are erased. That is, X ₁ ~ in Figure 2
The signal duty of X ₃ from time t ₁ to _{t 3} is all 1:1, and the drive voltage V ₂ is a constant voltage, so the voltage applied to dots 1 to 9 during time t ₁ to _{t 3} is The product of application time and voltage value is equal for all dots. Therefore, at time _t4 , if a voltage of opposite polarity with a product equal to the above product is applied to all dots, the application of the DC bias component can be removed from all dots.

Above, time t ₁ to t ₄ is one frame operation, and after time t ₄ , it returns to time t ₁ and one frame operation is repeated several times.
Repeats many times with a period of msec. Furthermore, by changing the frequency of the drive waveform during times _t1 to _t3 of _X1 to _X3 , the brightness of dots 1 to 9 can be controlled independently.

Next, a circuit for generating the voltages V ₁ , X ₁ to X ₃ and Y ₁ to _{Y 3} shown in FIG. 2 will be explained. Figure 3 shows the details. In this Figure 3, the oscillation circuit 2
0 to 4, a rectangular wave signal as shown in FIG. 1 is output and input to the binary counter 21. As a result, the outputs Q ₁ , Q ₂ , Q 2 of the binary counter 21
Q ₃ will be as shown in Figure 4, 2, 3, and 4, respectively.
Then, when the signal shown in FIG. 4 is shifted three times by the shift registers 22, 23, and 24 at the rising timing of the signal shown in FIG. 4 1 which is inverted by the inverter 25, the signal shown in FIG. It becomes a signal. In addition, the signal shown in FIG.
At the rising edge of the signal inverted by
When the signal shown in FIG. 4 is shifted once by the shift register 27, the signal shown in FIG. 4 is obtained. When the signals shown in FIG. 4, 5 and 6 are input to the OR gate 28, the output becomes the high level signal shown in FIG. 4, 7. When this high level signal is input to the reset terminal of the binary counter 21, the outputs Q ₁ , Q ₂ , Q ₃ of this binary counter 21 are all 0.
will be reset to This reset is OR gate 2
8 continues while the output is at high level. Further, when a high level signal from the OR gate 28 is applied to the transistor 30 via the inverter 29, a voltage _V1 having a peak value _V2 shown in FIG. 2 is generated.

In addition, the outputs Q ₂ and Q ₃ of the binary counter 21
is applied to the A and B terminals of the decoder 31. Here, if the high level signal is 1 and the low level signal is 0, if the Q ₂ and Q ₃ signals applied to the A and B terminals are both 0, only the output S ₀ will be 1,
If Q ₂ is 1 and Q ₃ is 0, only the output S ₁ will be 1,
If Q ₂ is 0 and Q ₃ is 1, only the output S ₂ will be 1.
Therefore, the outputs Y ₁ , Y ₂ , Y ₃ of the decoder 31 become as shown in FIG. 4, 8, 9, and 10.

Further, a signal of a higher frequency than the frequency shown in FIG.
When you input a rectangular waveform signal with different frequencies,
f ₁ , f ₂ , f ₃ are output. Furthermore, when the outputs Q ₂ and Q 3 of the binary counter 21 are input to the address terminals A ₀ and A ₁ of the ROM 33, the outputs T ₀ and Q ₃ of the ROM 33 are input.
Outputs synchronized with the signals shown in FIG. 4, 8, 9, and 10 appear at T ₁ , T ₂ , T ₃ , T ₄ , and T ₅ . this signal
T ₀ , T ₁ , T ₂ , T ₃ , T ₄ , T ₅ are connected to the signal selection circuit 34,
When input to the A and B terminals of 35 and 36, each signal selection circuit selects the signals of the I ₁ , I ₂ , I ₃ , and I ₄ terminals, that is, V ₃ ( (approximately 5V), select one of f ₁ , f ₂ , and f ₃ . Their outputs are shown in FIG. 2, 2, 3, and ₄ .
Let X ₂ and X ₃ be. Now, for example, in these signal selection circuits, when the values of the A and B terminals are 0, 0, V ₃
, f ₁ is output when it is 0, 1, f ₂ is output when it is 1, 0, and f ₃ is output when it is 1, 1, and the signal f ₁ is the signal during time t ₁ shown in Fig. 2. , the signal f ₂ is the signal during time t ₁ shown in FIG. 2, and the signal f ₃ is the signal during time t ₁ shown in FIG.
Assuming that the signals are between T ₀ , T ₁ , T ₂ , T ₃ , T 4 , and T ₄ of the ROM 33 at time t ₁ in FIG.
T ₅ becomes 011011, at time t ₂ it becomes 110110, and at time t ₃ it becomes 111001. Also,
When the reset signal 1 shown in FIG. 4 is applied to the reset terminal of the ROM 33, all outputs T ₀ to _{T 5} become 0, so the signal selection circuits 34, 35,
All outputs of 36 become V ₃ (period t ₄ in FIG. 2).
In this way, X ₁ , X ₂ ,
Since the output of _X3 is determined, the luminance of the dots 1 to 9 changes accordingly.

In addition, in the above example, the number of dots was 9, but
It may also be a dot matrix with an increased number of dots. Further, the EL elements may not be arranged in a dot matrix pattern, but may be arranged to display numbers, levels, etc., depending on the display target.

Furthermore, although we have shown a method in which the DC bias of all dots is erased after t ₁ , t ₂ , and t ₃ have elapsed, that is, after one frame scan, dots ₁ and 4 are erased for t 1 /2 hours after t ₁ elapsed. , 7, t After ₂ hours, dots for t ₂ /2 hours 2, 5, 8, t After ₃ hours, t ₃ /2
The DC bias of dots 3, 6, and 9 may be sequentially erased over time.

Further, although the voltage applied to the EL element is of a rectangular wave, it may be of other waveforms such as a triangular wave or a sawtooth wave.

In addition, the peak value of voltage V ₁ for DC bias cancellation is not set to V ₂ , but is made a little smaller, and its application time t ₄
You may try to make it a little better.

As described above, in the present invention, a voltage having a frequency corresponding to the luminance of light emission is applied to a plurality of EL elements, and the time integral value of the applied voltage during a predetermined display period is made equal for each EL element. and apply a voltage that has the opposite polarity to the applied voltage for display at a predetermined time with OV as a reference for a time period during which the sum of its temporal integral value and the temporal integral value of the applied voltage for display becomes zero. Since the voltage is applied to all EL elements at the same time, all EL
This has the excellent effect that the DC bias of the element can be uniformly and simultaneously erased.

[Brief explanation of drawings]

Fig. 1 is an electrical wiring diagram of main parts showing an embodiment of the present invention, Fig. 2 is a voltage waveform diagram showing the driving voltage of each part in Fig. 1, and Fig. 3 is a driving voltage of each part shown in Fig. 2. FIG. 4 is a waveform diagram for explaining the operation of the circuit shown in FIG. 3. 1-9...EL element, 10-14...Transistor, 20...Oscillation circuit, 31...Decoder, 3
3...ROM, 34, 35, 36...signal selection circuit.

Claims (1)

[Claims] 1. A plurality of EL elements are arranged in a predetermined array for display, and the frequency of the display voltage applied to these EL elements is varied to change the luminance of each EL element. In the EL display device, a voltage at a frequency corresponding to the luminance is applied to each EL element so that the time integral value of the display voltage during a predetermined display period is equal for each EL element. , a voltage that has a polarity opposite to the applied voltage for display at a predetermined time with OV as a reference,
An EL display device in which voltage is simultaneously applied to each of the EL elements for a time period during which the sum of the temporal integral value and the temporal integral value of the applied voltage for display becomes zero. 2. The predetermined arrangement of the plurality of EL elements is in the form of a dot matrix, and after one display scan in one direction in the dot matrix, the voltage of opposite polarity is applied to all the EL elements. An EL display device according to claim 1.