JPH04190177A - Inspecting method of circuit board - Google Patents

Inspecting method of circuit board

Info

Publication number
JPH04190177A
JPH04190177A JP2295891A JP29589190A JPH04190177A JP H04190177 A JPH04190177 A JP H04190177A JP 2295891 A JP2295891 A JP 2295891A JP 29589190 A JP29589190 A JP 29589190A JP H04190177 A JPH04190177 A JP H04190177A
Authority
JP
Japan
Prior art keywords
inspection
circuit
circuit board
microprocessor
conditions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2295891A
Other languages
Japanese (ja)
Inventor
Yukimasa Sugimoto
杉本 行正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Ibaraki Ltd
Original Assignee
NEC Ibaraki Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Ibaraki Ltd filed Critical NEC Ibaraki Ltd
Priority to JP2295891A priority Critical patent/JPH04190177A/en
Publication of JPH04190177A publication Critical patent/JPH04190177A/en
Pending legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To enable execution of detailed inspection by using a microprocessor for inspection and by setting conditions of the inspection jointly with an external inspection system. CONSTITUTION:A serial interface 6 is provided for inspection. Besides, a program wherein at least some of conditions of inspection are set in accordance with an instruction from an external inspection system 1 given through serial interfaces 5 and 6 is prepared in a microprocessor 7. The system 1 sets the conditions of inspection directly for an analog circuit 8 and a peripheral logic circuit 9 to be inspected, by a group 3 of input signal lines for inspection, while delivering the instruction through the interfaces 5 and 6 to the processor 7 of a circuit board 2 to be inspected. In accordance with the program prepared beforehand for the inspection, the processor 7 sets signals for the circuit 9 and a D/A converter 11 and informs the system 1 of completion the quality.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマイクロプロセッサを含むロジック回路とアナ
ログ回路とか相互に接続されて実装された回路基板の検
査方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for inspecting a circuit board on which a logic circuit including a microprocessor and an analog circuit are interconnected and mounted.

〔従来の技術〕[Conventional technology]

例えば従来の大型の磁気ディスク装置ては実装スペース
に余裕かあったので、機能別に独立した基板とし、ある
いは多数のジャンパープラグによって信号線を切り離す
ことかできるようにするなとの方法により、回路基板を
検査する際に回路を分割することかできるため、検査条
件を容易に設定することかてきた。したかつて、分割し
た回路ごとに外部から入力端にテスト信号を人力し、出
力端において出力信号を監視するという方法で細かい検
査診断をすることか可能てあった。
For example, in conventional large magnetic disk drives, there was limited mounting space, so circuit boards were created using independent boards for each function, or by making it possible to separate signal lines using multiple jumper plugs. Since the circuit can be divided when testing, testing conditions can be easily set. In the past, it was possible to conduct detailed inspections and diagnoses by manually applying a test signal to the input end of each divided circuit and monitoring the output signal at the output end.

ところか、最近の小型磁気ディスク装置では、従来の大
型装置の有する機能を小さな実装スペースて実現する必
要から各基板は高密度実装となり、ロジック回路とアナ
ログ回路とが一枚の基板内て相互に接続され、これらを
切離して回路を分割することはできない。また、マイク
ロプロセッサやLSIに多くの機能を盛り込んでいるた
め、直接外部から触れることのできない信号が多くなっ
ている。これらの理由により、上に述へたような高密度
実装の基板については、外部の検査システムから直接検
査条件を設定することが困難になってきており、そのた
めに検査内容か不十分なものとなり、結果として不良検
出率が低下したり、故障箇所の特定かてきないといった
問題か生している。
However, in recent small magnetic disk drives, it is necessary to realize the functions of conventional large drives in a small mounting space, so each board has to be mounted with high density, and logic circuits and analog circuits are interconnected on one board. They are connected and cannot be separated to divide the circuit. Furthermore, since many functions are incorporated into microprocessors and LSIs, there are many signals that cannot be directly accessed from the outside. For these reasons, it has become difficult to directly set inspection conditions from an external inspection system for high-density mounting boards such as those mentioned above, and as a result, the inspection content may be insufficient. As a result, there are problems such as a decrease in the defect detection rate and the inability to identify the location of the failure.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明の目的は、検査条件設定の困難性より生ずる問題
を解決する、回路基板の検査方法を提供するものである
SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit board inspection method that solves the problems caused by the difficulty in setting inspection conditions.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の回路基板の検査方法は、被検査回路基板内のマ
イクロプロセッサは外部の検査システムからの指令に従
って少なくとも一部の検査条件か設定されるようにブロ
クラムされ、外部の検査システムは前記指令を発して一
部の検査条件をマイクロプロセッサに設定するとともに
、その他の検査条件を被検査回路に直接設定し、そのう
えて被検査回路の少なくとも一部の信号の監視を行うこ
とにより回路基板の検査を行う。
In the circuit board inspection method of the present invention, the microprocessor in the circuit board to be inspected is programmed so that at least some of the inspection conditions are set according to instructions from an external inspection system, and the external inspection system follows the instructions. The circuit board is tested by transmitting a signal to the microprocessor, setting some test conditions in the microprocessor, setting other test conditions directly to the circuit under test, and monitoring at least part of the signals of the circuit under test. conduct.

〔作用1 被検査回路基板内のマイクロプロセッサを検査のために
利用し、外部の検査システムと共同して検査条件の設定
を行なうので、詳細な検査を行なうことができる。
[Operation 1] Since the microprocessor in the circuit board to be inspected is used for inspection and the inspection conditions are set in collaboration with an external inspection system, detailed inspection can be performed.

[実施例1 次に、本発明の実施例について図面を参昭して説明する
[Embodiment 1] Next, an embodiment of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

検査システムlと被検査回路基板2は通常の検査用入力
信号線群3と出力信号監視線群4のほかに、シリアルイ
ンターフェース5および6を介して接続される。被検査
回路基板2はマイクロプロセッサ7とアナログ回路8が
周辺ロジック回路9、A/DコンバータlOおよびD/
Aコンバータ11を介して接続されて構成されている。
The test system 1 and the circuit board 2 to be tested are connected through serial interfaces 5 and 6 in addition to the normal test input signal line group 3 and output signal monitoring line group 4. The circuit board 2 to be tested includes a microprocessor 7, an analog circuit 8, a peripheral logic circuit 9, an A/D converter IO, and a D/D converter 10.
They are connected via an A converter 11.

シリアルインターフェース6は検査用に設けたものであ
る。マイクロプロセッサ7にはシリアルインターフェー
ス5および6を介しての外部の検査システムlからの指
令に従って少な(とも一部の検査条件が設定されるプロ
グラムが準備されている。
The serial interface 6 is provided for inspection. The microprocessor 7 is prepared with a program in which a few (at least some) test conditions are set in accordance with commands from the external test system 1 via the serial interfaces 5 and 6.

次に1本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

検査の際、検査システムlは検査用入力信号線群3によ
って被検査回路であるアナログ回路8と周辺ロジック回
路9に直接検査条件を設定するとともにシリアルインタ
ーフェース5.6によって被検査回路基板2のマイクロ
プロセッサ7に指令  2を送る。マイクロプロセッサ
7は受は取った指令により予め検査用に準備されたプロ
グラムに従って周辺ロジック回路9やD/Aコンバータ
11の信号を設定し、設定完了を検査システムlにシリ
アルインターフェース5.6を介して通知する。検査シ
ステム1は設定完了通知を受は取った後、出力信号監視
線群4によって計測を行い良否を判定する。その掻削の
検査条件を設定するときは以上述べたのと同様なシーケ
ンスを繰り返す。必要によってはA/DコンバータlO
の読み取り値を検査システムlに報告するような指令を
つくることもできる。
During testing, the testing system 1 directly sets testing conditions for the analog circuit 8 and peripheral logic circuit 9, which are the circuits to be tested, using the testing input signal line group 3, and also sets the testing conditions directly for the analog circuit 8 and peripheral logic circuit 9, which are the circuits to be tested, and also controls the microcontroller of the circuit board 2 to be tested using the serial interface 5.6. Send command 2 to processor 7. The microprocessor 7 sets the signals of the peripheral logic circuit 9 and the D/A converter 11 in accordance with the program prepared in advance for inspection according to the command received, and notifies the inspection system 1 of the completion of the settings via the serial interface 5.6. Notice. After receiving the setting completion notification, the inspection system 1 performs measurement using the output signal monitoring line group 4 to determine pass/fail. When setting inspection conditions for scraping, the same sequence as described above is repeated. A/D converter lO if necessary
A command can also be created to report the readings to the inspection system I.

[発明の効果] 以上説明したように本発明は、被検査回路基板内のマイ
クロプロセッサを検査のために利用し、外部の検査シス
テムと共同して検査条件の設定を行うことにより、外部
の検査システムのみによって行う検査に比し、より詳細
な検査を行うことができる効果がある。
[Effects of the Invention] As explained above, the present invention utilizes a microprocessor in a circuit board to be tested for testing, and sets testing conditions in collaboration with an external testing system, thereby allowing external testing to be performed. This has the effect of allowing more detailed inspections to be performed compared to inspections performed solely by the system.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図である。 ■・・−検査システム、 2・・−被検査回路基板、 3・・・検査用入力信号線群、 4・・・出力信号監視線群、 5.6・・・シリアルインターフェース、7・・・マイ
クロプロセッサ、 8・・・アナログ回路、 9・・・周辺ロジック回路、 lO・・・A/Dコンバータ、 11・・・I)/Aコンバータ。 特許出願人  茨城日本電気株式会社
FIG. 1 is a block diagram showing one embodiment of the present invention. ■...-Inspection system, 2...-Circuit board to be inspected, 3... Input signal line group for inspection, 4... Output signal monitoring line group, 5.6... Serial interface, 7... Microprocessor, 8... Analog circuit, 9... Peripheral logic circuit, lO... A/D converter, 11... I)/A converter. Patent applicant: Ibaraki NEC Co., Ltd.

Claims (1)

【特許請求の範囲】 1、マイクロプロセッサを含むロジック回路とアナログ
回路とが相互に接続されて実装された回路基板を検査す
る方法であって、 前記マイクロプロセッサは外部の検査システムからの指
令に従って少なくとも一部の検査条件が設定されるよう
にプログラムされ、外部の検査システムは前記指令を発
して一部の検査条件をマイクロプロセッサに設定すると
ともに、その他の検査条件を被検査回路に直接設定し、
そのうえで被検査回路の少なくとも一部の信号の監視を
行うことにより回路基板の検査を行う、回路基板の検査
方法。
[Claims] 1. A method for inspecting a circuit board on which a logic circuit and an analog circuit including a microprocessor are interconnected and mounted, the microprocessor at least following instructions from an external inspection system. Some of the test conditions are programmed to be set, and the external test system issues the command to set some of the test conditions to the microprocessor, and directly sets other test conditions to the circuit under test;
A method for testing a circuit board, in which the circuit board is tested by monitoring at least part of the signals of the circuit under test.
JP2295891A 1990-11-01 1990-11-01 Inspecting method of circuit board Pending JPH04190177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2295891A JPH04190177A (en) 1990-11-01 1990-11-01 Inspecting method of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2295891A JPH04190177A (en) 1990-11-01 1990-11-01 Inspecting method of circuit board

Publications (1)

Publication Number Publication Date
JPH04190177A true JPH04190177A (en) 1992-07-08

Family

ID=17826501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2295891A Pending JPH04190177A (en) 1990-11-01 1990-11-01 Inspecting method of circuit board

Country Status (1)

Country Link
JP (1) JPH04190177A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5955219A (en) * 1996-11-29 1999-09-21 Sharp Kabushiki Kaisha Lithium nickel copper composite oxide and its production process and use

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5955219A (en) * 1996-11-29 1999-09-21 Sharp Kabushiki Kaisha Lithium nickel copper composite oxide and its production process and use

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