JPH04188738A - Integrated circuit element - Google Patents

Abstract

PURPOSE:To shorten a propagation delay time between transmitting paths, reduce a parasitic inductance, and readily make the characteristic measurement by a method wherein first bonding pads are arranged on the same circumference of a circle on a substrate. CONSTITUTION:Both first bonding pads 4 and second bonding pads 7 are concentrically arranged on the circumferences of circles, whereby the distance between each first bonding pad 4 and each corresponding bonding pad 7 is wholly made equal and all the lengths of a bonding wire 5 to be coupled to each other becomes equal. Further, the intervals of bonding wires 5 becomes equal. Further, if the shape of a substrate is a disk, when the second bonding pads 7 are arranged on the circumference of a circle, the distances between the first bonding pads 4 and the second bonding pads 7 are small, that is the lengths of the bonding wires 5 are short. Thus, a propagation delay time between transmitting paths is short, a parasitic inductance can be reduced, and the characteristics can easily be measured.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an ultrahigh-speed integrated circuit element used for optical transmission and the like.

[Prior Art] Conventionally, bonding pads on an integrated circuit chip of an integrated circuit element have been arranged along each side of a rectangular chip obtained by dicing a wafer.

This method has the advantage that a large number of input/output signals can be obtained from the integrated circuit chip, and that cells can be efficiently laid out on the integrated circuit chip.

For examples of bonding pad placement on conventional integrated circuit chips, see the front page photo of ``Ultrahigh-speed Compound Semiconductor Devices'' by Kanno and Omori (Baifukan) and ``Revised Integrated Circuit Optics'' (1) Process Devices by Yanai and Nagata. Technical edition pp
199 etc.

[Problems to be Solved by the Invention] However, in the above-mentioned conventional technology, the bonding pad on the integrated circuit chip is connected to the IC package (hereinafter referred to as ICPK).
The signal propagation distance to the pin tip of G and l1i8) was not considered. Therefore, multiple ultra-high speed signals (≧GH
z), there is a problem in that a propagation delay difference occurs inside the IC package.

Generally, the setup time (t,) and hold time (t,) of a flip-flop (FF) having an operating speed of GHz or higher are several tens of ps or less.

In addition, the propagation delay time (tpd) per gate stage is also L
It tends to be less than oops. With the ultra-high speed of optical transmission equipment C, these numbers are steadily becoming smaller.

On the other hand, when a microstrip line is constructed using a substrate material with a specific dielectric constant (εr) of 10, the signal propagation time is approximately 8 ps/rrrn.

Therefore, as transmission speeds become increasingly faster, it is expected that this propagation time will reduce the signal margin.

In particular, in communication ICs, in order to ensure t#+t, it is necessary to strictly maintain the phase difference between data and clock on the same channel. However, it is becoming difficult to equalize these propagation times without very careful layout design.

Particularly in ICs that function as signal insertion and branching, the number of input/output data and clock pairs increases, making it difficult to design signal propagation time.

In this case, unlike the case of metal wiring inside an IC, it is almost impossible to design the signal propagation time in bonding wire wiring.

In particular, in the case of a quadrilateral ICPKG, the delay difference that occurs between the signal passing through the pin near the apex of the quadrilateral and the signal passing through the pin near the midpoint of each side cannot be ignored. Although delay differences can be minimized by using only pins, this is disadvantageous from the standpoint of effective use of pins.

If you use a round ICPKG, the IC on all pins will be
It is possible to minimize the delay difference on the ICPKG by making the transmission line length on the PKG the same. However, generally, the chip mounted on the ICPKG is square, and the bonding pads of the chip are arranged along the four sides of the chip.

Therefore, the length of the bonding wire connecting the bonding pad of the chip and the bonding pad of the ICPKG differs for each pad, and as a result, the propagation delay time cannot be made uniform. In addition, it is difficult to string wires at equal intervals and lengths, which can lead to noise generation due to parasitic elements (inductance, etc.) 9 In addition, probe cards for testing the characteristics of integrated circuit elements have circular measurement holes. Nevertheless, the chip to be measured is
It is often rectangular with bonding pads arranged on each side. Therefore, the probe tip is set in a rectangular shape or in a similar shape, which is cumbersome to set.

The present invention aims to achieve ultra-high-speed and highly reliable integration that equalizes the propagation delay time between transmission lines within an ICPKG and reduces parasitic elements in order to ensure mutual timing margins between signals that are essential for ultra-high-speed digital transmission. The purpose is to provide circuit elements.

Another object of the present invention is to provide an integrated circuit element that can be easily measured using a probe.

[Means for Solving the Problems] The present invention has been made to achieve the above-mentioned objects, and its aspects include an integrated circuit having a substrate, a circuit provided on the substrate, and a first bonding pad. a package containing a chip and a second bonding pad used for connection with the integrated circuit and housing the integrated circuit;
An integrated circuit device comprising a bonding pad and a bonding wire connecting the second bonding pad, wherein the first bonding pad is arranged on the same circumference on the substrate. provided.

In this case, it is preferable that the second bonding pads are arranged on the same circumference, and the center of the circle formed by the second bonding pads is made to coincide with the center of the circle formed by the first bonding pads. .

Further, it is preferable that the substrate is circular or polygonal with five or more vertices.

As another aspect, an integrated circuit chip having a substrate and a circuit provided on the substrate is provided with a probe measurement pad used when measuring the characteristics of the integrated circuit, and the probe measurement pad is placed in the same circle on the substrate. An integrated circuit chip is provided that is characterized in that it is arranged on a circumference.

In another aspect, an integrated circuit chip includes a substrate, a circuit provided on the substrate, and a first bonding pad, and a second bonding pad used for connection with the integrated circuit. A package that stores the
An integrated circuit device comprising a bonding wire connecting the first bonding pad and the second bonding pad, the integrated circuit device having the first bonding pad arranged on the same circumference on the substrate. An electronic device is provided. Note that this electronic device includes an optical/electrical converter that converts an optical signal into an electrical signal and inputs it to the integrated circuit element, and an electrical/optical converter that converts the electrical signal output from the integrated circuit element into an optical signal and outputs it. It may include a converting means, a multiplexing means for multiplexing signals and inputting the multiplexed signal to the integrated circuit element, and a separating means for separating and outputting the signal output from the integrated circuit element. [Function] The first bonding pad and the second bonding pad are both arranged on the circumference and have the same center, so the distances between each bonding pad and each corresponding second bonding pad are all equal. Therefore, the lengths of the bonding wires connecting these wires are all equal. Further, the intervals between the bonding wires are equal.

Furthermore, if the shape of the substrate is a circle or a polygon with five or more vertices, when arranging the second bonding pad on the circumference, the diameter of the circle can be adjusted without being obstructed by the corners of the substrate. The diameter can be made close to that of the first bonding pad. That is, the distance between the first bonding pad and the second bonding pad becomes smaller, and the length of the bonding wire becomes shorter.

In addition, by arranging the probe measurement pads used when measuring the characteristics of integrated circuits on the same circumference, it is possible to set the probe tips when making measurements using probe cards, etc., which often have circular measurement holes. becomes easier.

Another aspect of the electronic device includes an integrated circuit element, and an optical/electrical conversion means that converts an input optical signal into an electrical signal and inputs the electrical signal to the integrated circuit element. Further, the multiplexing means multiplexes the signals and inputs the multiplexed signals to the integrated circuit element. The integrated circuit element processes the input signal in this way and outputs it to the electro-optical conversion means or separation means. The electrical/optical conversion means converts the electrical signal output from the integrated circuit element into an optical signal and outputs the optical signal. Further, the separating means separates and outputs the signal output from the integrated circuit element.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

Figure 1 shows its configuration.

This integrated circuit element is an IC package (hereinafter referred to as ICPK).
A chip 6 on which a circuit is formed is mounted on a chip 2 (referred to as G) 2.

The overall shape of ICPKG2 is round.

In this ICPKG 2, bonding pads 4 of the ICPKG 2 for connecting bonding wires 5 to the chip 6 are arranged so as to surround the chip 6. The arrangement of the bonding pads 4 in this embodiment is circular. Note that from the bonding pad 4, a microstrip line 3 and an IC pin 1 are connected.
It is designed to transmit signals to the outside world.

The chip 6 is made by dicing a substrate made of silicon or the like into a rectangular shape, and various circuits are formed on the chip 6.

Although the chip 6 of this embodiment has a rectangular overall shape, the bonding pads 7 provided on the chip 6 for connecting the bonding wires 5 are arranged in a circle.

When this chip 6 is mounted on the ICPKG 2, it is arranged so that the center of the circle formed by the bonding pads 4 and the center of the circle formed by the bonding pads 7 are aligned with each other.

Thereby, the lengths of the bonding wires 5 and the mutual spacing between them are made equal.

Next, the operation will be explained.

A signal whose input pin is IC pin 1 passes through the microstrip line 3 in the ICPKG 2 and reaches the bonding pad 4 of the ICPKG 2 .

This signal is then transmitted to the chip 6 through the bonding wire 5, and the signal reaches the circuit provided on the chip 6 from the bonding pad 7 of the chip 6.

On the other hand, for the output signal from the chip 6, this process is reversed.

In this case, since the lengths of the bonding wires 5 and the mutual spacing between them are equal as described above, almost no signal propagation delay occurs for each transmission line.

Furthermore, parasitic elements (mainly mutual inductance) between the bonding wires 5 can be significantly reduced.

Next, Example 2 will be explained.

This integrated circuit element has almost the same configuration as Example 1, but has a unique feature in the shape of the integrated circuit chip.

That is, the shape of the chip 6' itself is a polygon, in this embodiment, a square, and the shape of the entire chip 6' is approximated to a circle. Further, in accordance with this, the bonding pad 4' is placed closer to the chip 6' than in the first embodiment, and the length of the bonding wire 5' is shortened.

The inductance of the bonding wire is around 1 nH/-, which is a value that cannot be ignored for transmitting GHz band signals.

Therefore, when the bonding pads 7' are arranged in a circle, it is ideal that the chip 6' is also round.
Dicing is difficult. However, 8
Square chips can be realized relatively easily.

Further, when a polygonal chip 6' is used, the length of the bonding wire 5' can be made uniform and significantly shortened compared to a case where a square chip 6 is used. Therefore, the utilization efficiency of the chip area in the area of ICPKG2 is also greatly improved. This significantly reduces the parasitic elements of the bonding wire 5' and reduces the influence of the bonding wire's self/mutual inductance. As a result, it is possible to manufacture integrated circuit elements with extremely excellent high frequency characteristics. Furthermore, the present technology also makes it possible to increase the number of pins in ultra-high-speed integrated circuit elements.

Example 3 will be explained.

This example is based on the example 1 above. Alternatively, it is an electronic device using the integrated circuit shown in Example 2.

Figure 3 shows its configuration.

This electronic device includes optical fibers 12a, 12b and electrical/
It consists of an optical conversion circuit 13, an optical/electrical conversion circuit 23, a multiplexing circuit 20, and a circuit C11. These elements are configured with the following relationship.

That is, the optical signal input from the optical fiber 12b is
Optical/electric conversion circuit (hereinafter referred to as "○/E circuit") 23
The data is then input to the ICII. Further, signals multiplexed by a multiplexing circuit (hereinafter referred to as rMUX circuit) 20 are input to the circuit C11.

Conversely, the signal output from the ICI 1 passes through an electrical/optical conversion circuit (hereinafter referred to as rE/circuit) 13 and is output to the optical fiber 12a. Also, the signal output from the same <IC511 is connected to a separation circuit (hereinafter referred to as rDMUX circuit).
17, and is transmitted to the peripheral circuit block.

An example of the function of the ICII of this embodiment at this time is shown in FIG.

As shown in Figure 4, the basic functions of ICII are selector 2.
6 and selector 27.

In FIGS. 4 and 3, data/clock input 2
8 corresponds to the data input 24 and the clock input 25. Data/clock input 29 is.

It corresponds to data input 21 and clock input 22.

Further, the data/clock output 30 corresponds to the data output 14 and the clock output 15.

Additionally, data/clock output 31 is connected to data output 18.
and clock output 19.

In such electronic devices, the phase relationship between data and clock is very important, and as mentioned above, in electronic devices that perform ultra-high-speed transmission at Gb/s or higher, delays due to the length of the transmission path in C and , deterioration of transmission quality due to parasitic elements becomes a major problem.

However, in this embodiment, since the integrated circuit element shown in embodiments 1 and 2 is used as ICI 1, delay deviation due to the transmission path length within ICI 1 and transmission quality due to parasitic elements may occur. There is little deterioration.

The IC 11 is configured with two input systems and two output systems, but as this configuration becomes more complex, it is inevitable to increase the number of pins for ultra-high-speed signals. However, even in such a case, Example 1. If the integrated circuit element shown in Example 2 is used, a reduction in noise can be expected due to a reduction in parasitic elements, and it is also possible to increase the number of pins for ultra-high-speed signals.

Example 4 will be explained.

FIG. 5 shows a plan view of the integrated circuit element of this example.

In this embodiment, the chip 44 has a normal pad 4.
3, a measurement pad 41 is provided. The measurement pads 41 are arranged on the circumference.

This measurement pad 41 is connected to a pad 43 by a metal wiring 42.

Further, the measurement pad 41 may be configured so that it can also be used as a pad 43.

Note that the shapes of the measurement pad 41 and pad 43 are not limited to this.

Since the chip 44 of this embodiment has the measurement pads 41 arranged in a circle, when making measurements using a probe card, etc., it is only necessary to arrange the probes in a circle, and the adjustment of the probes is very easy. It gets easier. Further, the metal wiring 42 can be designed with wiring delay on the IC layout with respect to the bonding wire, and signal delay due to the difference in length of the metal wiring 42 can be avoided.

In the above embodiments, the transmission path delay difference is minimized (
0) in principle, and can prevent timing shifts due to delays in the transmission path. Therefore, at the time of design, even when designing an integrated circuit that handles ultra-high-speed signals (≧IGHz), there is no need to consider transmission path delays, and only timing conditions with peripheral printed circuit boards and the like need be considered. As a result, highly accurate timing design can be expected.

Furthermore, by changing the package shape, bonding pad arrangement, chip shape, etc. to a polygon instead of a circular one, the length of the bonding wire can be shortened. This reduces parasitic elements such as inductance and reduces sources of oscillation and noise. For example, if the length of the bonding wire is shortened by about one inch, the self-inductance will be reduced to 1n.
It decreases around H. Furthermore, chip utilization efficiency does not need to be reduced.

Furthermore, when inspecting a wafer using a probe card, it is possible to perform measurement simply by arranging the probes in a circular shape with equal lengths, making the measurement easier.

[Effects of the Invention] As explained above, according to the present invention, the delay due to the length of the transmission path of an integrated circuit can be reduced. Furthermore, the length of the transmission path can be shortened and parasitic inductance can be reduced.

Furthermore, it is easier to adjust the measuring device when measuring characteristics.

[Brief explanation of the drawing]

FIG. 1 is a plan view of an integrated circuit device showing Example 1 to which the present invention is applied, FIG. 2 is a plan view of an integrated circuit device showing Example 2, and FIG. 3 is a plan view of an integrated circuit device using the integrated circuit device of the present invention. FIG. 4 is a block diagram showing the functions of integrated circuit elements in the electronic device, and FIG. 5 is a plan view of an integrated circuit chip according to another embodiment. 1... IC pin, 2... ICPKG, 3... Microstrip line, 4... Bonding pad, 5
... bonding wire, 6... chip, 7...
Bonding pad, 11...IC512a...Optical fiber. 12b... Optical fiber, 13... Electric/optical conversion circuit, 14... Data output, 15... Clock output, 1
7... Separation circuit, 18... Data output, 19...
Clock output, 20... Multiplexing circuit, 21... Data input, 22... Clock input, 23... Optical/electric conversion circuit, 24... Data input, 25... Clock input, 26 ...Selector, 27...Selector, 28
...Data/clock input, 29...Data/clock input, 30...Data/clock output, data/
Clock output, 41...Measurement pad, 42...Metal wiring, 43...Pad, 44...Chip.

Claims (1)

[Claims] 1. An integrated circuit chip having a substrate, a circuit provided on the substrate and a first bonding pad, and a second bonding pad used for connection with the integrated circuit chip. In an integrated circuit device comprising a package that accommodates a circuit chip and a bonding wire that connects the first bonding pad and the second bonding pad, the first bonding pad is placed on the same circumference on the substrate. An integrated circuit element characterized in that: 2. The second bonding pads are arranged on the same circumference, and the center of the circle formed by the second bonding pads,
2. The integrated circuit device according to claim 1, wherein the center of a circle formed by said first bonding pad is coincident with said first bonding pad. 3. The integrated circuit device according to claim 1, wherein the substrate is circular or polygonal with five or more vertices. 4. In an integrated circuit chip having a substrate and a circuit provided on the substrate, a probe measurement pad used for measuring the characteristics of the integrated circuit is provided, and these are arranged on the same circumference on the substrate. An integrated circuit chip characterized by: 5. An integrated circuit chip having a substrate, a circuit provided on the substrate, and bonding pads, wherein the bonding pads are arranged on the same circumference on the substrate. 6. An electronic device comprising the integrated circuit element according to claim 1 or 2. 7. An integrated circuit element according to claim 1 or 2, an optical/electrical conversion means for converting an optical signal into an electrical signal and inputting it to the integrated circuit element, and an electrical signal output from the integrated circuit element into an optical signal. electrical/optical conversion means for converting and outputting; multiplexing means for multiplexing signals and inputting the multiplexed signals to the integrated circuit element; and separating and outputting the signals output from the integrated circuit element. An electronic device comprising: separation means.