JPH04184540A - Parallelized compilation systems - Google Patents

Abstract

PURPOSE:To prepare an executable object program with parallel computer systems even when a scalar variable or branching instruction exists in a DO loop by providing a parallelism extracting section which extracts parts which can be executed in parallel by detecting a loop structure in a program. CONSTITUTION:A compiler 101 converts a source program 100 into an object program 106. At the time of conversion, a sentence structure analyzing section 103 confirms a sentence structure from the word and phrase analyzed results of a word and phrase analyzing section 102 and generates an intermediate code. A parallelism extracting section 104 detects a loop structure in the program from the intermediate code and, when the detected loop is multiple loops, generates a parallel executing instruction on the loops which do not cause any data referring relation between loops by analyzing the data referring relation on each loop. Therefore, the processing capacity of the compiler is improved, since the parallel executing instruction can be generated even when a scalar variable or branching instruction exists in a DO loop.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to 6. Generating and supplying an object program from a given source program to a parallel computer system consisting of a plurality of parallel executable programs. The present invention relates to a parallel compilation method in which a compiler detects loop structures in a program and generates parallel execution instructions.

BACKGROUND OF THE INVENTION Consider the case where a FORTRAN program shown in FIG. 3, which calculates the product of matrix a and vector b and stores the result in vector C, is executed in parallel.

In the program shown in FIG. 3, the outer dO small loop 00 can be executed in parallel for index variable i, and therefore the assignment statement 301 and do/rape 302 inside the dO small loop 00 can be executed in parallel. It is possible to fix the index variable i that appears and execute in parallel. FIG. 4 shows how the program shown in FIG. 3 is executed in parallel using eight processors.

In FIG. 4(1), the above-mentioned index i=1 is fixed, and the first processor executes the assignment statement 301 and the do/rape 30.
Similarly, in FIG. 4(k), the assignment statement 301 and the do loop 302 are executed with the inte x variable i= fixed in the second processor. ing. However, they are k-2, . . . , 8.

To execute a FORTRAN program in parallel as shown in Figure 3, for example, use eight processors and fix the do loose index variable in each processor as shown in Figure 4. I will let you do it.

Next, as shown in FIG. 5, the FO loop 500 includes a scalar variable X and a branch instruction 503
Consider the RTRAN program. Conventionally, as shown in FIG. 5, if a scalar variable X recursively appears in an inner dO loose 502 as in an assignment statement 504 or a branch instruction 503 exists, a compilation method that does not allow parallel execution has been used. It is being

Problems to be Solved by the Invention However, in the above-mentioned system, even if a program can actually be executed in parallel, parallel execution instructions may not be generated, and the compiler's performance is degraded.

The present invention solves this problem, and aims to provide a parallelization compilation method that generates an object program that can be executed on a parallel computer system even when a scalar variable or branch instruction exists in a do loop. It is.

Means for Solving the Problems In order to solve the above problems, the parallel compilation method of the present invention compiles objects from four obtained source programs for a parallel computer system consisting of a plurality of 107 computers that can be executed in parallel. A compiler that generates and supplies a program includes a lexical analysis unit that decomposes the source code into words, a syntax analysis unit that recognizes syntax from the result of lexical analysis in the lexical analysis unit and generates intermediate code, and The parallelism extraction unit includes a parallelism extraction unit that detects a loop structure from code and extracts a part that can be executed in parallel, and a code generation unit that is activated by an instruction from the parallelism extraction unit. The present invention has a function of detecting the above-mentioned loops, analyzing data reference relationships for each loop when the loops are multiple loops, and generating parallel execution instructions for loops in which no data reference relationship occurs between loops.

In the intermediate code of the present invention, the part corresponding to the syntax constituting the loop in the source program is set as a parent node that has link information with other nodes, and the part corresponding to the executable statement in the loop is set as a parent node with link information with other nodes. It is expressed as a list addendum that is a child node with information, and if the executable statement corresponding to the child node is a branch instruction, it is expressed so as to be linked to the node corresponding to the executable statement at the branch destination. be.

Further, the parallelism extraction unit of the present invention traces a link from a first node of the intermediate code to a second node corresponding to its child node, and further traces the link sequentially to It has a function of generating parallel execution instructions regarding the loop corresponding to the n-th node from the first node when the n-th node is reached.

Further, the parallelism detection unit of the present invention has a function of generating a parallel execution instruction when a scalar variable appears in a loop and the scalar variable first appears on the left side of an assignment statement. be.

In fact, when a branch instruction appears in a loop, the parallelism extraction unit of the present invention generates parallel execution instructions for the outer loop from the loop corresponding to the parent node of the node linked to the branch destination of the branch instruction. It has a function.

Operation The present invention uses the method described above to analyze data reference relationships from a program written in a conventional programming language, and generate parallel execution instructions in a manner that does not disrupt the data reference relationships. At this time, even if a scalar variable and a branch instruction exist in the dO loop, a parallel execution instruction can be generated by analyzing the data dependence of the scalar variable and the branch destination of the branch instruction.

Example An embodiment of the present invention will be described below based on the drawings.

FIG. 1 is a configuration diagram of a computer in an embodiment of the present invention. In FIG. a syntactic analysis unit 103 that recognizes syntax from the result of lexical analysis and generates intermediate code; a parallelism extraction unit 104 that detects a loop structure from the intermediate code and extracts a part that can be executed in parallel; Code generation unit 105 activated by instructions from unit 104
and a compiler, 106 each representing an object program.

In FIG. 1, a compiler 101 converts a source program 100 into an object program 106.
This conversion process is carried out by the lexical analyzer 102, syntactic analyzer 103, parallelism extractor 104, and code generator 10 shown in FIG.
It will be held at 5. Then, the parallelism extraction unit 104 recognizes the loop structure in the program and extracts parts that can be executed in parallel.

FIG. 2 is a flowchart showing the detailed processing procedure of the parallelism extraction unit 104. In FIG. 2, first a procedure 200 for detecting a loop structure in a program is performed, then a procedure 201 for examining the loop structure is performed, and a judgment 202 is made as to whether or not there is a loop that can be parallelized. If there are loops, a procedure 203 for checking data reference relationships is performed for each loop, and a judgment 205 is made as to whether or not it can be parallelized. If parallelization is possible, a code generation procedure 206 is performed when parallelization is possible. As a result of the judgment 205 to determine whether parallelization is possible, if parallelization is not possible, a code generation procedure 204 for when parallelization is not possible is performed. Also, determining whether a parallelizable loop exists 202
As a result of performing this, if there is no loop that can be parallelized, a code generation procedure 204 for when parallelization cannot be performed is performed.

Regarding the procedure 201 for checking the loop structure in FIG.
This will be explained using the program shown in FIG. 5 as an example.

Consider a case where the program shown in FIG. 5 is converted into intermediate code as shown in FIG. 6 by the syntax analysis unit 103 of the controller 101.

In FIG. 6, 600 and 602 respectively represent the first 60 statements and the second 60 statements for configuring the dO loop, and the executable statements in the dO loop 500 outside of FIG.
The first assignment statement 601 and the second assignment statement 601 are child nodes, respectively.
0 statement 602, second assignment statement 603, first cant 1
Nue statement 604, each first link 608
It is connected to the first 60 sentences 600 which is the parent node. Similarly, each executable statement in the inner dO route 502 in FIG.
, conditional branch statement 606, second continue statement 607
are each connected to the second do statement 602 by a second link 609. Furthermore, conditional branch statement 6
06 is connected by a link 610 to a second assignment statement 603, which is a node corresponding to the branch destination executable statement.

In FIG. 6, the first link 608 from the first 60 sentences 600
As you follow, you will find multiple executable statements 601, 602, 603.
The second assignment statement 603, which is the branch destination of the conditional branch statement 606, has the first link 60 in the first 60 statement 600.
They are connected by 08. Therefore, from this intermediate code, the procedure 201 that examines the structure of the loop determines that the outer loop 500 is parallelizable.
Procedure 203 for checking data reference relationships for each loop
checks whether the executable statements in the outer dO loop 500 can be executed in parallel with respect to index i. In the inner do route 502, a scalar variable X recursively appears in the third assignment statement 504, but this scalar variable , since there is no data reference relationship, it can be determined that parallelization is possible.

Therefore, when executing in parallel with eight processors, as shown in FIG. 7, the outer Qll do loop 500 is
By fixing the index variable i in each processor, parallel execution is possible.

In FIG. 7(1), the index variable i is fixed to 1, and the first assignment statement 501 and the inner d
1502, the second assignment statement 505 is executed, and the remaining processors similarly fix the value of the index variable i, and execute the first assignment statement 501, the inner dO routine 1502, and the second assignment statement 505. This indicates that the second assignment statement 505 is to be executed. In this way, the outer do loop 500
It is possible to generate instructions that can be executed in parallel.

As described in detail, according to the present invention, even if a scalar variable and a branch instruction exist in a do loop, by analyzing the data dependence of the scalar variable and the branch destination of the branch instruction, parallel processing can be performed. It is possible to generate executable instructions, improve the processing power of the compiler, and have great practical effects.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a compiler according to an embodiment of the present invention, and FIG.
The figure is a flowchart showing the detailed processing procedure of the parallelism extraction section of the compiler, Figure 3 is an example of a FORTRAN program, and Figure 4 is a diagram showing how the program in Figure 3 is executed on a parallel computer system. , Figure 5 is another example of a FORTRAN program, Figure 6 is a diagram showing the intermediate code created by syntax analysis of the program in Figure 5, and Figure 7 is a diagram showing the program in Figure 5 executed on a parallel computer system. FIG. 100... Source program, 101... Compiler, 102... Lexical analysis section, 103... Syntax analysis section, 104... Parallelism extraction section, 105... Code generation section, 106... Object program, 200...
- Loop detection procedure, 201... Procedure to check loop structure, 202... Procedure to judge whether a parallelizable loop exists, 203... Procedure to check data reference relationship for each loose, 204. . . . Code generation procedure when parallelization is not possible, 205 . . . A check to determine whether parallelization is possible, 206 . . . Code generation procedure when parallelization is possible. Agent Yoshihiro Morimoto Figure 1 Figure 2 -: Figure j3 Kojima N QN N

Claims (1)

[Claims] 1. In a compiler that generates and supplies an object program from a given source program to a parallel computer system consisting of a plurality of parallel-executable processors, a lexical unit that decomposes the source code into lexical units. an analysis unit; a syntax analysis unit that recognizes syntax from the results of lexical analysis in the lexical analysis unit and generates intermediate code; and a parallelism extraction unit that detects loop structures from the intermediate code and extracts parts that can be executed in parallel. and a code generation unit activated by an instruction from the parallelism extraction unit, the parallelism extraction unit detects a structure of a loop, and when the loop is a multiple loop, generates a code for each loop. A parallel compilation method characterized by having a function of analyzing data reference relationships and generating parallel execution instructions for loops in which no data reference relationships occur between loops. 2. In the intermediate code, the part corresponding to the syntax that constitutes the loop in the source program is set as a parent node that has link information with other nodes, and the part corresponding to the executable statement in the loop is set as a parent node that has link information with other nodes. If the executable statement corresponding to the child node is a branch instruction, it is expressed as a list structure in which the executable statement corresponding to the child node is a branch instruction. 2. The parallel compilation method according to claim 1. 3. The parallelism extraction unit traces a link from the first node of the intermediate code to a second node corresponding to its child node, and further traces the link sequentially to find the n-th node that has two or more child nodes. 2. The parallel compilation method according to claim 1, further comprising a function of generating a parallel execution instruction for a loop corresponding to the n-th node from the first node when reaching a node. 4. The parallelism extraction unit has a function of generating a parallel execution instruction when a scalar variable appears in a loop and the scalar variable first appears on the left side of an assignment statement. A parallel compilation method according to claim 1. 5. When a branch instruction appears in a loop, the parallelism extraction unit has a function of generating parallel execution instructions for the outer loop from the loop corresponding to the parent node of the node linked to the branch destination of the branch instruction. A parallel compilation method according to claim 1, characterized in that: