JPH0418336B2 - - Google Patents
Info
- Publication number
- JPH0418336B2 JPH0418336B2 JP59276259A JP27625984A JPH0418336B2 JP H0418336 B2 JPH0418336 B2 JP H0418336B2 JP 59276259 A JP59276259 A JP 59276259A JP 27625984 A JP27625984 A JP 27625984A JP H0418336 B2 JPH0418336 B2 JP H0418336B2
- Authority
- JP
- Japan
- Prior art keywords
- basic cell
- adder
- carry
- bit
- multiplier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000000295 complement effect Effects 0.000 claims description 3
- 239000000047 product Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
- G06F7/5306—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products
- G06F7/5312—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with row wise addition of partial products using carry save adders
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59276259A JPS61156433A (ja) | 1984-12-28 | 1984-12-28 | 並列乗算器 |
DE19853545433 DE3545433A1 (de) | 1984-12-28 | 1985-12-20 | Parallelmultiplizierschaltung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59276259A JPS61156433A (ja) | 1984-12-28 | 1984-12-28 | 並列乗算器 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS61156433A JPS61156433A (ja) | 1986-07-16 |
JPH0418336B2 true JPH0418336B2 (pt) | 1992-03-27 |
Family
ID=17566932
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59276259A Granted JPS61156433A (ja) | 1984-12-28 | 1984-12-28 | 並列乗算器 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS61156433A (pt) |
DE (1) | DE3545433A1 (pt) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4864529A (en) * | 1986-10-09 | 1989-09-05 | North American Philips Corporation | Fast multiplier architecture |
US4958312A (en) * | 1987-11-09 | 1990-09-18 | Lsi Logic Corporation | Digital multiplier circuit and a digital multiplier-accumulator circuit which preloads and accumulates subresults |
US5638313A (en) * | 1995-01-30 | 1997-06-10 | Cirrus Logic, Inc. | Booth multiplier with high speed output circuitry |
US5734601A (en) | 1995-01-30 | 1998-03-31 | Cirrus Logic, Inc. | Booth multiplier with low power, high performance input circuitry |
DE19528210C1 (de) * | 1995-08-01 | 1996-12-19 | Siemens Ag | Halbleiter-Baustein mit mindestens einer Schaltungsanordnung zur eingeschränkten Bearbeitung von an Eingangsanschlüssen des Bausteins anliegenden Eingangsgrößen |
US7401110B1 (en) * | 2004-09-09 | 2008-07-15 | Sun Microsystems, Inc. | System, method and apparatus for an improved MD5 hash algorithm |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54114941A (en) * | 1978-02-13 | 1979-09-07 | Burroughs Corp | Binary multiplying circuit |
JPS55105732A (en) * | 1979-02-08 | 1980-08-13 | Nippon Telegr & Teleph Corp <Ntt> | Multiplier |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4130878A (en) * | 1978-04-03 | 1978-12-19 | Motorola, Inc. | Expandable 4 × 8 array multiplier |
JPS57141753A (en) * | 1981-02-25 | 1982-09-02 | Nec Corp | Multiplication circuit |
-
1984
- 1984-12-28 JP JP59276259A patent/JPS61156433A/ja active Granted
-
1985
- 1985-12-20 DE DE19853545433 patent/DE3545433A1/de active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54114941A (en) * | 1978-02-13 | 1979-09-07 | Burroughs Corp | Binary multiplying circuit |
JPS55105732A (en) * | 1979-02-08 | 1980-08-13 | Nippon Telegr & Teleph Corp <Ntt> | Multiplier |
Also Published As
Publication number | Publication date |
---|---|
DE3545433A1 (de) | 1986-07-03 |
JPS61156433A (ja) | 1986-07-16 |
DE3545433C2 (pt) | 1992-10-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |