JPH04180661A - Lead frame and manufacture thereof - Google Patents
Lead frame and manufacture thereofInfo
- Publication number
- JPH04180661A JPH04180661A JP30969190A JP30969190A JPH04180661A JP H04180661 A JPH04180661 A JP H04180661A JP 30969190 A JP30969190 A JP 30969190A JP 30969190 A JP30969190 A JP 30969190A JP H04180661 A JPH04180661 A JP H04180661A
- Authority
- JP
- Japan
- Prior art keywords
- inner leads
- lead frame
- leads
- lead
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000005530 etching Methods 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 6
- 239000011295 pitch Substances 0.000 abstract 3
- 239000000463 material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はリードフレームおよびその製造方法に間し、特
にエツチング加工による半導体装置用のリードフレーム
およびその製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a lead frame and a method for manufacturing the same, and more particularly to a lead frame for a semiconductor device by etching and a method for manufacturing the same.
従来、この種のエツチング加工による半導体装置用リー
ドフレームの製造方法は、第2図(a)に示す様に素材
金属板1の形成されるインナリード6の表裏両面の対応
する位1にそれぞれレジスト膜2を塗布し、表裏両面か
らエツチングすることで、第2図(b)に示す様に、イ
ンナリード6を形成していた。Conventionally, in a method for manufacturing a lead frame for a semiconductor device using this type of etching process, as shown in FIG. By applying the film 2 and etching it from both the front and back sides, the inner leads 6 were formed as shown in FIG. 2(b).
上述した従来のリードフレームの製造方法では、形成し
ようとするインナリード6の素材金属板1の表裏両面に
レジスト膜2を塗布するために、インナリード6のすき
まのみがエツチングされる。従って、隣接するインナリ
ード6同志がインナリード6の中程度のすきまを必要と
するために、インナリード6のピッチが一定以上小さく
設定できないという欠点があった。In the conventional lead frame manufacturing method described above, only the gaps in the inner leads 6 are etched in order to apply the resist film 2 to both the front and back surfaces of the metal plate 1 of the inner leads 6 to be formed. Therefore, since the adjacent inner leads 6 require a moderate gap between the inner leads 6, there is a drawback that the pitch of the inner leads 6 cannot be set smaller than a certain level.
本発明の目的はインナーリードのピッチを小さく設定で
きるリードフレームおよびその製造方法を提供すること
にある。SUMMARY OF THE INVENTION An object of the present invention is to provide a lead frame in which the pitch of inner leads can be set small, and a method for manufacturing the lead frame.
本発明は、インナーリードが表裏両面の2層構造に形成
され、それぞれの層の前記インナーリードが互いに他層
のインナーリード間に位置している。In the present invention, the inner leads are formed in a two-layer structure on both the front and back surfaces, and the inner leads of each layer are located between the inner leads of the other layer.
本発明のリードフレームの製造方法は、素材金属板の表
裏両面にそれぞれにストライプ状のパターンで互いに前
記ストライプ状のパターンが他の面のストライプ状のパ
ターン間に位置するようにレジスト膜を形成し、ハーフ
エツチングすることにより、2層構造のインナーリード
を形成する工程を含んで構成されている。The method for manufacturing a lead frame of the present invention includes forming a resist film in a striped pattern on both the front and back sides of a metal plate as a material, such that the striped pattern is located between the striped patterns on the other side. The method includes steps of forming inner leads having a two-layer structure by half-etching.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図(a)〜(c)は本発明の一実施例の製造方法を
説明する工程順に示した斜視図である。FIGS. 1(a) to 1(c) are perspective views showing the order of steps for explaining a manufacturing method according to an embodiment of the present invention.
まず、第1図(a)に示す様に、素材金属板1の表裏両
面のそれぞれにストライプ状のパターンで、互いにスト
ライプ状のパターンがそれぞれの中間に位置するように
レジスト膜2を形成する。First, as shown in FIG. 1(a), a resist film 2 is formed on each of the front and back surfaces of a raw metal plate 1 in a striped pattern such that the striped patterns are located in the middle of each other.
次に、第1図(b)に示す様に、エツチング液に浸漬し
、レジスト膜2のない部分を表裏両面がらハーフエツチ
ングする。このとき、エツチング箇所は、ややふくらん
だ矩形状の断面でエツチングされていく。Next, as shown in FIG. 1(b), it is immersed in an etching solution to half-etch the portions where the resist film 2 is not present on both the front and back surfaces. At this time, the etched area is etched with a slightly bulging rectangular cross section.
エツチングが行進すると、第1図(c)に示す様に、そ
れぞれのインナーリードは分離され、上側インナーリー
ド4と下側インナーリード5と2層構造の互いにピッチ
の小さいインナーリードを形成する。アウターリード7
は、上側、下側インナーリード4,5に接続し、扇状に
広がって広いピッチで形成されているので、リード間隔
、即ち、すきま8が大きいので通常のエツチングで、形
成できる。As the etching progresses, each inner lead is separated, forming an upper inner lead 4 and a lower inner lead 5, each having a two-layer structure with a small pitch, as shown in FIG. 1(c). outer lead 7
are connected to the upper and lower inner leads 4 and 5, and are fan-shaped and formed at a wide pitch, so that the lead spacing, that is, the gap 8 is large, so that they can be formed by normal etching.
以上説明したように本発明は、それぞれの中間に位置す
る2層構造のインナーリードを形成することにより、イ
ンナーリードのピッチを小さく設定できると共に、素材
金属板の無駄を少くできる効果がある。As explained above, the present invention has the effect of making it possible to set the pitch of the inner leads small and reducing the waste of the raw metal plate by forming the inner leads with a two-layer structure located in the middle of each lead.
第1図(a)〜(c)は本発明の一実施例の製造方法を
説明する工程順に示した斜視図、第2図(a)、(b)
は従来のリードフレームの製造方法を説明する工程順に
示した断面図である。
l・・・素材金属板、2・・・レジスト膜、3・・・イ
ンナリード、4・・・上側インナリード、5・・・下側
インナリード、6・・・インナリード、7・・・アウタ
リード、8・・・すきま。FIGS. 1(a) to (c) are perspective views showing the manufacturing method according to an embodiment of the present invention in the order of steps, and FIGS. 2(a) and (b)
1A and 1B are cross-sectional views showing the steps of a conventional lead frame manufacturing method. l...Material metal plate, 2...Resist film, 3...Inner lead, 4...Upper inner lead, 5...Lower inner lead, 6...Inner lead, 7... Outer lead, 8...Gap.
Claims (1)
それぞれの層の前記インナーリードが互いに他層のイン
ナーリード間に位置していることを特徴とするリードフ
レーム。 2、素材金属板の表裏両面にそれぞれにストライプ状の
パターンで互いに前記ストライプ状のパターンが他の面
のストライプ状のパターン間に位置するようにレジスト
膜を形成し、ハーフエッチングすることにより、2層構
造のインナーリードを形成する工程を含むことを特徴と
するリードフレームの製造方法。[Claims] 1. The inner lead is formed in a two-layer structure on both the front and back surfaces,
A lead frame characterized in that the inner leads of each layer are located between inner leads of other layers. 2. By forming a resist film in a striped pattern on both the front and back sides of the raw metal plate so that the striped pattern is located between the striped patterns on the other side, and half-etching, 2. A method for manufacturing a lead frame, comprising the step of forming an inner lead having a layered structure.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30969190A JPH04180661A (en) | 1990-11-15 | 1990-11-15 | Lead frame and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30969190A JPH04180661A (en) | 1990-11-15 | 1990-11-15 | Lead frame and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04180661A true JPH04180661A (en) | 1992-06-26 |
Family
ID=17996123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30969190A Pending JPH04180661A (en) | 1990-11-15 | 1990-11-15 | Lead frame and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04180661A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5557143A (en) * | 1993-09-16 | 1996-09-17 | Rohm Co., Ltd. | Semiconductor device having two staggered lead frame stages |
US5939774A (en) * | 1994-06-14 | 1999-08-17 | Dai Nippon Printing Co., Ltd. | Semiconductor lead frame |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62216257A (en) * | 1986-03-17 | 1987-09-22 | Shinko Electric Ind Co Ltd | Manufacture of lead frame |
JPH03283645A (en) * | 1990-03-30 | 1991-12-13 | Toppan Printing Co Ltd | Lead frame and manufacture thereof |
-
1990
- 1990-11-15 JP JP30969190A patent/JPH04180661A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62216257A (en) * | 1986-03-17 | 1987-09-22 | Shinko Electric Ind Co Ltd | Manufacture of lead frame |
JPH03283645A (en) * | 1990-03-30 | 1991-12-13 | Toppan Printing Co Ltd | Lead frame and manufacture thereof |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5557143A (en) * | 1993-09-16 | 1996-09-17 | Rohm Co., Ltd. | Semiconductor device having two staggered lead frame stages |
US5939774A (en) * | 1994-06-14 | 1999-08-17 | Dai Nippon Printing Co., Ltd. | Semiconductor lead frame |
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